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Tsubai has convinced me that openpic_init() should remain machine-dependant

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as the details might differ between archs, and passing the various options
leads to some clutter.
This commit is contained in:
briggs 2001-02-05 19:22:23 +00:00
parent 5d05ca039b
commit e96035c57c
8 changed files with 102 additions and 64 deletions
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4
sys/arch/macppc/include/openpicreg.h
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@ -1,3 +1,5 @@
/* $NetBSD: openpicreg.h,v 1.1 2001/02/02 06:11:53 briggs Exp $ */ /* $NetBSD: openpicreg.h,v 1.2 2001/02/05 19:22:24 briggs Exp $ */
void openpic_init __P((void));
#include <powerpc/openpicreg.h> #include <powerpc/openpicreg.h>

48
sys/arch/macppc/macppc/extintr.c
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@ -1,4 +1,4 @@
/* $NetBSD: extintr.c,v 1.25 2001/02/04 17:46:33 briggs Exp $ */ /* $NetBSD: extintr.c,v 1.26 2001/02/05 19:22:24 briggs Exp $ */
/*- /*-
* Copyright (c) 1995 Per Fogelstrom * Copyright (c) 1995 Per Fogelstrom
@ -676,9 +676,49 @@ softintr(ipl)
} }
void void
macppc_openpic_init() openpic_init()
{ {
openpic_init(macppc_openpic_base, ICU_LEN); int irq;
u_int x;
openpic_base = (volatile unsigned char *) macppc_openpic_base;
/* disable all interrupts */
for (irq = 0; irq < 256; irq++)
openpic_write(OPENPIC_SRC_VECTOR(irq), OPENPIC_IMASK);
openpic_set_priority(0, 15);
/* we don't need 8259 pass through mode */
x = openpic_read(OPENPIC_CONFIG);
x |= OPENPIC_CONFIG_8259_PASSTHRU_DISABLE;
openpic_write(OPENPIC_CONFIG, x);
/* send all interrupts to cpu 0 */
for (irq = 0; irq < ICU_LEN; irq++)
openpic_write(OPENPIC_IDEST(irq), 1 << 0);
for (irq = 0; irq < ICU_LEN; irq++) {
x = irq;
x |= OPENPIC_IMASK;
x |= OPENPIC_POLARITY_POSITIVE;
x |= OPENPIC_SENSE_LEVEL;
x |= 8 << OPENPIC_PRIORITY_SHIFT;
openpic_write(OPENPIC_SRC_VECTOR(irq), x);
}
/* XXX set spurious intr vector */
openpic_set_priority(0, 0);
/* clear all pending interrunts */
for (irq = 0; irq < 256; irq++) {
openpic_read_irq(0);
openpic_eoi(0);
}
for (irq = 0; irq < ICU_LEN; irq++)
openpic_disable_irq(irq);
install_extint(ext_intr_openpic); install_extint(ext_intr_openpic);
} }
@ -743,7 +783,7 @@ init_interrupt()
goto failed; goto failed;
macppc_openpic_base = (void *)(obio_base + reg[0]); macppc_openpic_base = (void *)(obio_base + reg[0]);
macppc_openpic_init(); openpic_init();
return; return;
} }

4
sys/arch/powerpc/include/openpic.h
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@ -1,4 +1,4 @@
/* $NetBSD: openpic.h,v 1.2 2001/02/04 17:38:10 briggs Exp $ */ /* $NetBSD: openpic.h,v 1.3 2001/02/05 19:22:23 briggs Exp $ */
/*- /*-
* Copyright (c) 2000 Tsubai Masanari. All rights reserved. * Copyright (c) 2000 Tsubai Masanari. All rights reserved.
@ -30,7 +30,7 @@
#include <machine/openpicreg.h> #include <machine/openpicreg.h>
void openpic_init __P((unsigned char *, int)); /* void openpic_init(): defined in machdep code, must set openpic_base */
void openpic_enable_irq __P((int, int)); void openpic_enable_irq __P((int, int));
void openpic_disable_irq __P((int)); void openpic_disable_irq __P((int));
void openpic_set_priority __P((int, int)); void openpic_set_priority __P((int, int));

8
sys/arch/powerpc/include/openpicreg.h
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@ -1,4 +1,4 @@
/* $NetBSD: openpicreg.h,v 1.1 2001/02/02 06:11:52 briggs Exp $ */ /* $NetBSD: openpicreg.h,v 1.2 2001/02/05 19:22:23 briggs Exp $ */
/*- /*-
* Copyright (c) 2000 Tsubai Masanari. All rights reserved. * Copyright (c) 2000 Tsubai Masanari. All rights reserved.
@ -74,12 +74,6 @@
#define OPENPIC_IDEST(irq) (0x10010 + (irq) * 0x20) #define OPENPIC_IDEST(irq) (0x10010 + (irq) * 0x20)
#endif #endif
#ifndef OPENPIC_INIT_SRC
#define OPENPIC_INIT_SRC(irq) \
((irq) | OPENPIC_IMASK | OPENPIC_POLARITY_POSITIVE | \
OPENPIC_SENSE_LEVEL | (8 << OPENPIC_PRIORITY_SHIFT))
#endif
/* /*
* PROCESSOR register (IDU base + 0x20000) * PROCESSOR register (IDU base + 0x20000)
*/ */

47
sys/arch/powerpc/powerpc/openpic.c
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@ -1,4 +1,4 @@
/* $NetBSD: openpic.c,v 1.2 2001/02/04 17:35:28 briggs Exp $ */ /* $NetBSD: openpic.c,v 1.3 2001/02/05 19:22:24 briggs Exp $ */
#include <sys/types.h> #include <sys/types.h>
#include <sys/param.h> #include <sys/param.h>
@ -6,51 +6,6 @@
volatile unsigned char *openpic_base; volatile unsigned char *openpic_base;
void
openpic_init(unsigned char *base, int topirq)
{
int irq, maxirq;
u_int x;
openpic_base = (volatile unsigned char *) base;
x = openpic_read(OPENPIC_FEATURE);
maxirq = (x >> 16) & 0x7ff;
/* disable all interrupts */
for (irq = 0; irq < maxirq; irq++)
openpic_write(OPENPIC_SRC_VECTOR(irq), OPENPIC_IMASK);
openpic_set_priority(0, 15);
/* we don't need 8259 pass through mode */
x = openpic_read(OPENPIC_CONFIG);
x |= OPENPIC_CONFIG_8259_PASSTHRU_DISABLE;
openpic_write(OPENPIC_CONFIG, x);
/* send all interrupts to cpu 0 */
for (irq = 0; irq < topirq; irq++)
openpic_write(OPENPIC_IDEST(irq), 1 << 0);
for (irq = 0; irq < topirq; irq++) {
x = OPENPIC_INIT_SRC(irq);
openpic_write(OPENPIC_SRC_VECTOR(irq), x);
}
openpic_write(OPENPIC_SPURIOUS_VECTOR, 0xff);
openpic_set_priority(0, 0);
/* clear all pending interrunts */
for (irq = 0; irq < maxirq; irq++) {
openpic_read_irq(0);
openpic_eoi(0);
}
for (irq = 0; irq < topirq; irq++)
openpic_disable_irq(irq);
}
void void
openpic_enable_irq(irq, type) openpic_enable_irq(irq, type)
int irq, type; int irq, type;

4
sys/arch/sandpoint/include/openpicreg.h
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@ -1,4 +1,4 @@
/* $NetBSD: openpicreg.h,v 1.1 2001/02/04 18:32:14 briggs Exp $ */ /* $NetBSD: openpicreg.h,v 1.2 2001/02/05 19:22:24 briggs Exp $ */
/* /*
* Copyright 2001 Wasabi Systems, Inc. * Copyright 2001 Wasabi Systems, Inc.
@ -60,4 +60,6 @@
#define OPENPIC_IDEST(irq) OPENPIC_SRC_VECTOR(irq) + 0x10 #define OPENPIC_IDEST(irq) OPENPIC_SRC_VECTOR(irq) + 0x10
void openpic_init __P((unsigned char *));
#include <powerpc/openpicreg.h> #include <powerpc/openpicreg.h>

47
sys/arch/sandpoint/sandpoint/extintr.c
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@ -1,4 +1,4 @@
/* $NetBSD: extintr.c,v 1.1 2001/02/04 18:32:17 briggs Exp $ */ /* $NetBSD: extintr.c,v 1.2 2001/02/05 19:22:25 briggs Exp $ */
/*- /*-
* Copyright (c) 1995 Per Fogelstrom * Copyright (c) 1995 Per Fogelstrom
@ -422,3 +422,48 @@ do_pending_int()
processing = 0; processing = 0;
asm volatile("mtmsr %0" :: "r"(emsr)); asm volatile("mtmsr %0" :: "r"(emsr));
} }
void
openpic_init(unsigned char *base)
{
int irq, maxirq;
u_int x;
openpic_base = (volatile unsigned char *) base;
x = openpic_read(OPENPIC_FEATURE);
maxirq = (x >> 16) & 0x7ff;
/* disable all interrupts */
for (irq = 0; irq < maxirq; irq++)
openpic_write(OPENPIC_SRC_VECTOR(irq), OPENPIC_IMASK);
openpic_set_priority(0, 15);
/* we don't need 8259 pass through mode */
x = openpic_read(OPENPIC_CONFIG);
x |= OPENPIC_CONFIG_8259_PASSTHRU_DISABLE;
openpic_write(OPENPIC_CONFIG, x);
/* send all interrupts to cpu 0 */
for (irq = 0; irq < ICU_LEN; irq++)
openpic_write(OPENPIC_IDEST(irq), 1 << 0);
for (irq = 0; irq < ICU_LEN; irq++) {
x = OPENPIC_INIT_SRC(irq);
openpic_write(OPENPIC_SRC_VECTOR(irq), x);
}
openpic_write(OPENPIC_SPURIOUS_VECTOR, 0xff);
openpic_set_priority(0, 0);
/* clear all pending interrunts */
for (irq = 0; irq < maxirq; irq++) {
openpic_read_irq(0);
openpic_eoi(0);
}
for (irq = 0; irq < ICU_LEN; irq++)
openpic_disable_irq(irq);
}

4
sys/arch/sandpoint/sandpoint/machdep.c
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@ -1,4 +1,4 @@
/* $NetBSD: machdep.c,v 1.1 2001/02/04 18:32:18 briggs Exp $ */ /* $NetBSD: machdep.c,v 1.2 2001/02/05 19:22:25 briggs Exp $ */
/* /*
* Copyright (C) 1995, 1996 Wolfgang Solfrank. * Copyright (C) 1995, 1996 Wolfgang Solfrank.
@ -335,7 +335,7 @@ initppc(startkernel, endkernel, args, btinfo)
out32rb(SANDPOINT_PCI_CONFIG_DATA, SANDPOINT_BUS_SPACE_EUMB); out32rb(SANDPOINT_PCI_CONFIG_DATA, SANDPOINT_BUS_SPACE_EUMB);
out32rb(SANDPOINT_PCI_CONFIG_ADDR, 0); out32rb(SANDPOINT_PCI_CONFIG_ADDR, 0);
openpic_init(eumb_base + 0x40000, ICU_LEN); openpic_init(eumb_base + 0x40000);
#if (NISA > 0) #if (NISA > 0)
isa_intr_init(); isa_intr_init();
#endif #endif