* Make changing the PLT slot entry (lazy function binding) thread-safe.
* Insert `iflush' instructions for the patched words in PLT entries.
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@ -1,4 +1,4 @@
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/* $NetBSD: mdreloc.c,v 1.5 1999/02/27 11:36:02 pk Exp $ */
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/* $NetBSD: mdreloc.c,v 1.6 1999/02/27 17:12:13 pk Exp $ */
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/*-
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/*-
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* Copyright (c) 1999 The NetBSD Foundation, Inc.
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* Copyright (c) 1999 The NetBSD Foundation, Inc.
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@ -297,16 +297,22 @@ _rtld_relocate_plt_object(
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* a direct transfer to the now fully resolved function
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* a direct transfer to the now fully resolved function
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* address. The resulting code in the jump slot is:
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* address. The resulting code in the jump slot is:
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*
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*
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* sethi %hi(roffset), %g1
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* sethi %hi(addr), %g1
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* sethi %hi(addr), %g1
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* jmp %g1+%lo(addr)
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* jmp %g1+%lo(addr)
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* nop ! delay slot
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*
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* We write the third instruction first, since that leaves the
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* previous `b,a' at the second word in place. Hence the whole
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* PLT slot can be atomically change to the new sequence by
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* writing the `sethi' instruction at word 2.
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*/
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*/
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#define SETHI 0x03000000
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#define SETHI 0x03000000
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#define JMP 0x81c06000
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#define JMP 0x81c06000
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#define NOP 0x01000000
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#define NOP 0x01000000
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where[0] = SETHI | ((value >> 10) & 0x003fffff);
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where[2] = JMP | (value & 0x000003ff);
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where[1] = JMP | (value & 0x000003ff);
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where[1] = SETHI | ((value >> 10) & 0x003fffff);
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where[2] = NOP;
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__asm __volatile("iflush %0+8" : : "r" (where));
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__asm __volatile("iflush %0+4" : : "r" (where));
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if (addrp != NULL)
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if (addrp != NULL)
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*addrp = (caddr_t)value;
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*addrp = (caddr_t)value;
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