From e7e28765736b689b28dead20920307dbdcdf9167 Mon Sep 17 00:00:00 2001
From: skrll <skrll@NetBSD.org>
Date: Thu, 30 Mar 2017 08:43:40 +0000
Subject: [PATCH] Indentation

---
 sys/arch/mips/cavium/octeon_intr.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/sys/arch/mips/cavium/octeon_intr.c b/sys/arch/mips/cavium/octeon_intr.c
index 04dcce7d8ded..89b19c67b9d9 100644
--- a/sys/arch/mips/cavium/octeon_intr.c
+++ b/sys/arch/mips/cavium/octeon_intr.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: octeon_intr.c,v 1.9 2016/11/28 04:18:08 mrg Exp $	*/
+/*	$NetBSD: octeon_intr.c,v 1.10 2017/03/30 08:43:40 skrll Exp $	*/
 /*
  * Copyright 2001, 2002 Wasabi Systems, Inc.
  * All rights reserved.
@@ -45,7 +45,7 @@
 #define __INTR_PRIVATE
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: octeon_intr.c,v 1.9 2016/11/28 04:18:08 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: octeon_intr.c,v 1.10 2017/03/30 08:43:40 skrll Exp $");
 
 #include <sys/param.h>
 #include <sys/cpu.h>
@@ -333,9 +333,10 @@ octeon_intr_init(struct cpu_info *ci)
 #endif
 
 	if (ci->ci_dev)
-	aprint_verbose_dev(ci->ci_dev,
-	    "enabling intr masks %#"PRIx64"/%#"PRIx64"/%#"PRIx64"\n",
-	    cpu->cpu_int0_enable0, cpu->cpu_int1_enable0, cpu->cpu_int2_enable0);
+		aprint_verbose_dev(ci->ci_dev,
+		    "enabling intr masks %#"PRIx64"/%#"PRIx64"/%#"PRIx64"\n",
+		    cpu->cpu_int0_enable0, cpu->cpu_int1_enable0,
+		    cpu->cpu_int2_enable0);
 
 	mips3_sd(cpu->cpu_int0_en0, cpu->cpu_int0_enable0);
 	mips3_sd(cpu->cpu_int1_en0, cpu->cpu_int1_enable0);