blast_dcache() SMP friendly:
- blast_dcache() becomes sp_blast_dcache(dcache_size, dcache_line_size) - new smp_blast_dcache(sparc64_cpuset_t) that blasts the D$ on this cpuset - sparc64_ipi_blast_dcache() to support the above - in pmap_remove_all(), when freeing mmu contexts for this pmap, mark the set of cpus to blast the d$ on as well and convert the blast_dcache() call into smp_blast_dcache() on the cpus who ran this pmap, or, sp_blast_dcache(dcache_size, dcache_line_size) - convert the remaining blast_dcache() in machdep.c to sp_blast_dcache() - in pmap_destroy()/pmap_remove_all() take the pmap_lock() always since we assert it is held always. with these changes, NFS builds on the U60 seem to be stable now, and the USIII machines also can often complete a single build.sh run now, diskful or diskless. reviewed by mlelstv and partially by martin, tested by martin and myself, with some ideas from chuq as well.
This commit is contained in:
mrg
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582004928e
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@ -1,4 +1,4 @@
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/* $NetBSD: cache.h,v 1.16 2010/03/06 08:08:29 mrg Exp $ */
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/* $NetBSD: cache.h,v 1.17 2010/03/08 08:59:06 mrg Exp $ */
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/*
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* Copyright (c) 1996
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@ -72,10 +72,17 @@
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* set-associative -- each bank is 8K. No conflict there.)
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*/
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/* Various cache size/line sizes */
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extern int ecache_min_line_size;
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extern int dcache_line_size;
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extern int dcache_size;
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extern int icache_line_size;
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extern int icache_size;
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/* The following are for I$ and D$ flushes and are in locore.s */
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void dcache_flush_page_us(paddr_t); /* flush page from D$ */
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void dcache_flush_page_usiii(paddr_t); /* flush page from D$ */
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void blast_dcache(void); /* Clear entire D$ */
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void sp_blast_dcache(int, int); /* Clear entire D$ */
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void blast_icache_us(void); /* Clear entire I$ */
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void blast_icache_usiii(void); /* Clear entire I$ */
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@ -137,17 +144,14 @@ sp_tlb_flush_all(void)
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#ifdef MULTIPROCESSOR
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void smp_tlb_flush_pte(vaddr_t, struct pmap *);
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#define tlb_flush_pte(va,pm) smp_tlb_flush_pte(va, pm)
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void smp_dcache_flush_page_all(paddr_t pa);
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void smp_blast_dcache(sparc64_cpuset_t);
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#define tlb_flush_pte(va,pm ) smp_tlb_flush_pte(va, pm)
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#define dcache_flush_page_all(pa) smp_dcache_flush_page_all(pa)
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#define blast_dcache() smp_blast_dcache(cpus_active)
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#else
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#define tlb_flush_pte(va,pm) sp_tlb_flush_pte(va, (pm)->pm_ctx[0])
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#define tlb_flush_pte(va,pm) sp_tlb_flush_pte(va, (pm)->pm_ctx[0])
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#define dcache_flush_page_all(pa) dcache_flush_page(pa)
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#define blast_dcache() sp_blast_dcache(dcache_size, \
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dcache_line_size)
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#endif
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/* Various cache size/line sizes */
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extern int ecache_min_line_size;
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extern int dcache_line_size;
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extern int dcache_size;
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extern int icache_line_size;
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extern int icache_size;
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@ -1,4 +1,4 @@
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/* $NetBSD: ipifuncs.c,v 1.34 2010/02/24 09:49:36 mrg Exp $ */
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/* $NetBSD: ipifuncs.c,v 1.35 2010/03/08 08:59:06 mrg Exp $ */
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/*-
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* Copyright (c) 2004 The NetBSD Foundation, Inc.
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@ -27,7 +27,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.34 2010/02/24 09:49:36 mrg Exp $");
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__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.35 2010/03/08 08:59:06 mrg Exp $");
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#include "opt_ddb.h"
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@ -73,6 +73,7 @@ void sparc64_ipi_flush_pte_us(void *);
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void sparc64_ipi_flush_pte_usiii(void *);
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void sparc64_ipi_dcache_flush_page_us(void *);
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void sparc64_ipi_dcache_flush_page_usiii(void *);
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void sparc64_ipi_blast_dcache(void *);
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/*
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* Process cpu stop-self event.
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@ -427,6 +428,18 @@ smp_dcache_flush_page_all(paddr_t pa)
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dcache_flush_page(pa);
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}
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/*
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* Flush the D$ on this set of CPUs.
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*/
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void
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smp_blast_dcache(sparc64_cpuset_t activecpus)
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{
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sparc64_multicast_ipi(activecpus, sparc64_ipi_blast_dcache,
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dcache_size, dcache_line_size);
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sp_blast_dcache(dcache_size, dcache_line_size);
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}
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/*
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* Print an error message.
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*/
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@ -1,6 +1,7 @@
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/* $NetBSD: locore.s,v 1.325 2010/03/07 01:52:44 mrg Exp $ */
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/* $NetBSD: locore.s,v 1.326 2010/03/08 08:59:06 mrg Exp $ */
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/*
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* Copyright (c) 2006-2010 Matthew R. Green
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* Copyright (c) 1996-2002 Eduardo Horvath
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* Copyright (c) 1996 Paul Kranenburg
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* Copyright (c) 1996
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@ -4918,14 +4919,12 @@ ENTRY(sp_tlb_flush_all_usiii)
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wrpr %o3, %pstate
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/*
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* blast_dcache()
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* sp_blast_dcache(int dcache_size, int dcache_line_size)
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*
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* Clear out all of D$ regardless of contents
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* Does not modify %o0
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*
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*/
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.align 8
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ENTRY(blast_dcache)
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ENTRY(sp_blast_dcache)
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/*
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* We turn off interrupts for the duration to prevent RED exceptions.
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*/
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@ -4934,18 +4933,14 @@ ENTRY(blast_dcache)
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#endif
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rdpr %pstate, %o3
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sethi %hi(dcache_size), %o1
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ld [%o1 + %lo(dcache_size)], %o1
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sethi %hi(dcache_line_size), %o5
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ld [%o5 + %lo(dcache_line_size)], %o5
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sub %o1, %o5, %o1
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sub %o0, %o1, %o0
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andn %o3, PSTATE_IE, %o4 ! Turn off PSTATE_IE bit
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wrpr %o4, 0, %pstate
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1:
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stxa %g0, [%o1] ASI_DCACHE_TAG
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stxa %g0, [%o0] ASI_DCACHE_TAG
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membar #Sync
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brnz,pt %o1, 1b
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sub %o1, %o5, %o1
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brnz,pt %o0, 1b
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sub %o0, %o1, %o0
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sethi %hi(KERNBASE), %o2
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flush %o2
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@ -4959,6 +4954,33 @@ ENTRY(blast_dcache)
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wrpr %o3, %pstate
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#endif
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#ifdef MULTIPROCESSOR
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/*
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* void sparc64_ipi_blast_dcache(int dcache_size, int dcache_line_size)
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*
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* Clear out all of D$ regardless of contents
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*
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* On entry:
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* %g2 = dcache_size
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* %g3 = dcache_line_size
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*/
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.align 8
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ENTRY(sparc64_ipi_blast_dcache)
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sub %g2, %g3, %g2
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1:
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stxa %g0, [%g2] ASI_DCACHE_TAG
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membar #Sync
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brnz,pt %g2, 1b
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sub %g2, %g3, %g2
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sethi %hi(KERNBASE), %g5
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flush %g5
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membar #Sync
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ba,a ret_from_intr_vector
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nop
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#endif /* MULTIPROCESSOR */
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/*
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* blast_icache_us()
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* blast_icache_usiii()
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@ -1,4 +1,4 @@
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/* $NetBSD: pmap.c,v 1.257 2010/03/06 08:08:30 mrg Exp $ */
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/* $NetBSD: pmap.c,v 1.258 2010/03/08 08:59:06 mrg Exp $ */
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/*
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*
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* Copyright (C) 1996-1999 Eduardo Horvath.
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@ -26,7 +26,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.257 2010/03/06 08:08:30 mrg Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.258 2010/03/08 08:59:06 mrg Exp $");
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#undef NO_VCACHE /* Don't forget the locked TLB in dostart */
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#define HWREF
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@ -1365,16 +1365,16 @@ pmap_destroy(struct pmap *pm)
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return;
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}
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DPRINTF(PDB_DESTROY, ("pmap_destroy: freeing pmap %p\n", pm));
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#ifdef MULTIPROCESSOR
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mutex_enter(&pmap_lock);
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#ifdef MULTIPROCESSOR
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for (ci = cpus; ci != NULL; ci = ci->ci_next) {
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if (CPUSET_HAS(cpus_active, ci->ci_index))
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ctx_free(pm, ci);
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}
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mutex_exit(&pmap_lock);
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#else
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ctx_free(pm, curcpu());
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#endif
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mutex_exit(&pmap_lock);
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/* we could be a little smarter and leave pages zeroed */
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for (pg = TAILQ_FIRST(&pm->pm_obj.memq); pg != NULL; pg = nextpg) {
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@ -1863,6 +1863,7 @@ pmap_remove_all(struct pmap *pm)
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{
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#ifdef MULTIPROCESSOR
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struct cpu_info *ci;
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sparc64_cpuset_t pmap_cpus_active;
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#endif
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if (pm == pmap_kernel()) {
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@ -1870,18 +1871,28 @@ pmap_remove_all(struct pmap *pm)
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}
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write_user_windows();
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pm->pm_refs = 0;
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#ifdef MULTIPROCESSOR
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mutex_enter(&pmap_lock);
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#ifdef MULTIPROCESSOR
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CPUSET_CLEAR(pmap_cpus_active);
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for (ci = cpus; ci != NULL; ci = ci->ci_next) {
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if (CPUSET_HAS(cpus_active, ci->ci_index))
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if (CPUSET_HAS(cpus_active, ci->ci_index)) {
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if (pm->pm_ctx[ci->ci_index] > 0)
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CPUSET_ADD(pmap_cpus_active, ci->ci_index);
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ctx_free(pm, ci);
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}
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}
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mutex_exit(&pmap_lock);
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#else
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ctx_free(pm, curcpu());
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#endif
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mutex_exit(&pmap_lock);
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REMOVE_STAT(flushes);
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blast_dcache();
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#ifdef MULTIPROCESSOR
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smp_blast_dcache(pmap_cpus_active);
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#else
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sp_blast_dcache(dcache_size, dcache_line_size);
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#endif
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}
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/*
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