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Remove duplicated / slightly-tweaked loadustp() (load user segment table) 

routines from all of the m68k ports using the shared pmap.  Instead, in
pmap_init(), set up a function pointer to the appropriate mmu_load_urp*()
function in mmu_subr.s.
This commit is contained in:
thorpej 2024-01-09 04:16:23 +00:00
parent 6bc9cd3294
commit e697980812
45 changed files with 148 additions and 432 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
sys/arch/amiga/amiga/genassym.cf
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@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.35 2023/12/27 17:35:34 thorpej Exp $
# $NetBSD: genassym.cf,v 1.36 2024/01/09 04:16:23 thorpej Exp $
#
# Copyright (c) 1982, 1990, 1993
@ -91,6 +91,8 @@ export MMU51_CRP_BITS
export MMU51_TCR_BITS
export MMU40_TCR_BITS
define M68K_MMU_MOTOROLA 1
# lwp & proc fields and values
define L_PCB offsetof(struct lwp, l_addr)
define L_PROC offsetof(struct lwp, l_proc)

33
sys/arch/amiga/amiga/locore.s
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@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.165 2023/12/27 03:03:40 thorpej Exp $ */
/* $NetBSD: locore.s,v 1.166 2024/01/09 04:16:23 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -1118,35 +1118,6 @@ ENTRY(probeva)
.word 0x4e7a,0x0805 | movec MMUSR,d0
rts
/*
* Load a new user segment table pointer.
*/
ENTRY(loadustp)
movl %sp@(4),%d0 | new USTP
#ifdef M68060
cmpl #CPU_68060,_C_LABEL(cputype) | 68060?
jeq Lldustp060 | yes, skip
#endif
cmpl #MMU_68040,_C_LABEL(mmutype) | 68040?
jeq Lldustp040 | yes, skip
pflusha | flush entire TLB
lea _C_LABEL(protorp),%a0 | CRP prototype
movl %d0,%a0@(4) | stash USTP
pmove %a0@,%crp | load root pointer
movl #CACHE_CLR,%d0
movc %d0,%cacr | invalidate cache(s)
rts
#ifdef M68060
Lldustp060:
movc %cacr,%d1
orl #IC60_CUBC,%d1 | clear user btc entries
movc %d1,%cacr
#endif
Lldustp040:
.word 0xf518 | pflusha
.word 0x4e7b,0x0806 | movec d0,URP
rts
/*
* Handle the nitty-gritty of rebooting the machine.
*
@ -1417,8 +1388,6 @@ GLOBAL(ectype)
.long EC_NONE
GLOBAL(fputype)
.long FPU_NONE
GLOBAL(protorp)
.long MMU51_CRP_BITS,0 | prototype root pointer
GLOBAL(delaydivisor)
.long 12 | should be enough for 80 MHz 68060
| will be adapted to other CPUs in

3
sys/arch/amiga/conf/files.amiga
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@ -1,4 +1,4 @@
# $NetBSD: files.amiga,v 1.185 2023/05/03 13:49:30 phx Exp $
# $NetBSD: files.amiga,v 1.186 2024/01/09 04:16:23 thorpej Exp $
# maxpartitions must be first item in files.${ARCH}.newconf
maxpartitions 16 # NOTE THAT AMIGA IS SPECIAL!
@ -491,6 +491,7 @@ file arch/amiga/amiga/cc.c
file dev/md_root.c memory_disk_hooks
file arch/m68k/m68k/cacheops.c
file arch/m68k/m68k/db_memrw.c ddb
file arch/m68k/m68k/mmu_subr.s
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

3
sys/arch/amiga/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.83 2019/11/23 19:40:34 ad Exp $ */
/* $NetBSD: cpu.h,v 1.84 2024/01/09 04:16:23 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -148,7 +148,6 @@ void drsc_handler(void);
*/
void clearseg(vm_offset_t);
void doboot(void) __attribute__((__noreturn__));
void loadustp(int);
void physcopyseg(vm_offset_t, vm_offset_t);
u_int probeva(u_int, u_int);

4
sys/arch/atari/atari/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.38 2023/12/27 17:35:34 thorpej Exp $
# $NetBSD: genassym.cf,v 1.39 2024/01/09 04:16:23 thorpej Exp $
#-
# Copyright (c) 1997 The NetBSD Foundation, Inc.
@ -74,6 +74,8 @@ export MMU51_CRP_BITS
export MMU51_TCR_BITS
export MMU40_TCR_BITS
define M68K_MMU_MOTOROLA 1
# lwp & proc fields and values
define L_PCB offsetof(struct lwp, l_addr)
define L_PROC offsetof(struct lwp, l_proc)

33
sys/arch/atari/atari/locore.s
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.121 2023/12/27 03:03:41 thorpej Exp $ */
/* $NetBSD: locore.s,v 1.122 2024/01/09 04:16:23 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -1136,35 +1136,6 @@ ENTRY(probeva)
.word 0x4e7a,0x0805 | movec MMUSR,d0
rts
/*
* Load a new user segment table pointer.
*/
ENTRY(loadustp)
movl %sp@(4),%d0 | new USTP
#if defined(M68060)
cmpl #CPU_68060,_C_LABEL(cputype) | 68060?
jeq Lldustp060 | yes, skip
#endif
cmpl #MMU_68040,_C_LABEL(mmutype) | 68040?
jeq Lldustp040 | yes, skip
pflusha | flush entire TLB
lea _C_LABEL(protorp),%a0 | CRP prototype
movl %d0,%a0@(4) | stash USTP
pmove %a0@,%crp | load root pointer
movl #CACHE_CLR,%d0
movc %d0,%cacr | invalidate on-chip d-cache
rts
#if defined(M68060)
Lldustp060:
movc %cacr,%d1
orl #IC60_CUBC,%d1 | clear user branch cache entries
movc %d1,%cacr
#endif
Lldustp040:
.word 0xf518 | pflusha
.word 0x4e7b,0x0806 | movec d0,URP
rts
/*
* Set processor priority level calls. Most are implemented with
* inline asm expansions. However, spl0 requires special handling
@ -1259,8 +1230,6 @@ Ldorebootend:
.p2align 2
.space PAGE_SIZE
ASLOCAL(tmpstk)
GLOBAL(protorp)
.long MMU51_CRP_BITS,0 | prototype root pointer
#ifdef M68060 /* XXX */
L60iem: .long 0

3
sys/arch/atari/conf/files.atari
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@ -1,5 +1,5 @@
#
# $NetBSD: files.atari,v 1.124 2022/06/25 13:17:04 tsutsui Exp $
# $NetBSD: files.atari,v 1.125 2024/01/09 04:16:23 thorpej Exp $
maxpartitions 16
@ -220,6 +220,7 @@ file arch/m68k/m68k/cacheops.c
file arch/m68k/m68k/db_memrw.c ddb
file arch/m68k/m68k/fpu.c compile-with "${M68K_KERN_FPU}"
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/mmu_subr.s
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

3
sys/arch/atari/include/cpu.h
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@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.74 2023/01/06 10:28:28 tsutsui Exp $ */
/* $NetBSD: cpu.h,v 1.75 2024/01/09 04:16:23 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -160,7 +160,6 @@ const char *fpu_describe(int);
*/
void clearseg(paddr_t);
void doboot(void);
void loadustp(int);
void physcopyseg(paddr_t, paddr_t);
u_int probeva(u_int, u_int);

7
sys/arch/cesfic/cesfic/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.20 2023/12/27 17:35:34 thorpej Exp $
# $NetBSD: genassym.cf,v 1.21 2024/01/09 04:16:24 thorpej Exp $
#
# Copyright (c) 1982, 1990, 1993
@ -54,12 +54,7 @@ define MMU_HP MMU_HP
define MMU_68851 MMU_68851
# MMU configuration options
ifdef M68K_MMU_HP
define M68K_MMU_HP 1
endif
ifdef M68K_MMU_MOTOROLA
define M68K_MMU_MOTOROLA 1
endif
# values for cputype
define CPU_68020 CPU_68020

48
sys/arch/cesfic/cesfic/locore.s
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.37 2023/12/27 03:03:41 thorpej Exp $ */
/* $NetBSD: locore.s,v 1.38 2024/01/09 04:16:24 thorpej Exp $ */
/*
* Copyright (c) 1980, 1990, 1993
@ -277,11 +277,13 @@ Lstart2:
.long 0x4e7b1807 | movc d1,srp
jra Lstploaddone
Lmotommu1:
#ifdef M68030
RELOC(protorp, %a0)
movl #MMU51_SRP_BITS,%a0@ | see pmap.h
movl %d1,%a0@(4) | + segtable address
pmove %a0@,%srp | load the supervisor root pointer
movl #MMU51_CRP_BITS,%a0@ | reinit upper half for CRP loads
#endif /* M68030 */
Lstploaddone:
RELOC(mmutype, %a0)
@ -797,48 +799,6 @@ Lsldone:
rts
#endif
/*
* Load a new user segment table pointer.
*/
ENTRY(loadustp)
#if defined(M68K_MMU_MOTOROLA)
tstl _C_LABEL(mmutype) | HP MMU?
jeq Lhpmmu9 | yes, skip
movl %sp@(4),%d0 | new USTP
#if defined(M68040)
cmpl #MMU_68040,_C_LABEL(mmutype) | 68040?
jne LmotommuC | no, skip
.word 0xf518 | yes, pflusha
.long 0x4e7b0806 | movc %d0,%urp
rts
LmotommuC:
#endif
pflusha | flush entire TLB
lea _C_LABEL(protorp),%a0 | CRP prototype
movl %d0,%a0@(4) | stash USTP
pmove %a0@,%crp | load root pointer
movl #CACHE_CLR,%d0
movc %d0,%cacr | invalidate cache(s)
rts
Lhpmmu9:
#endif
#if defined(M68K_MMU_HP)
movl #CACHE_CLR,%d0
movc %d0,%cacr | invalidate cache(s)
MMUADDR(%a0)
movl %a0@(MMUTBINVAL),%d1 | invalidate TLB
tstl _C_LABEL(ectype) | have external VAC?
jle 1f | no, skip
andl #~MMU_CEN,%a0@(MMUCMD) | toggle cache enable
orl #MMU_CEN,%a0@(MMUCMD) | to clear data cache
1:
movl %sp@(4),%d0
moveq #PGSHIFT,%d1
lsrl %d1,%d0 | convert to page frame
movl %d0,%a0@(MMUUSTP) | load a new USTP
#endif
rts
/*
* Set processor priority level calls. Most are implemented with
* inline asm expansions. However, spl0 requires special handling
@ -889,8 +849,6 @@ GLOBAL(cputype)
.long CPU_68020 | default to 68020 CPU
GLOBAL(fputype)
.long FPU_68881 | default to 68881 FPU
GLOBAL(protorp)
.long 0,0 | prototype root pointer
GLOBAL(prototc)
.long 0 | prototype translation control

3
sys/arch/cesfic/conf/files.cesfic
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@ -1,4 +1,4 @@
# $NetBSD: files.cesfic,v 1.18 2019/02/18 01:12:22 thorpej Exp $
# $NetBSD: files.cesfic,v 1.19 2024/01/09 04:16:24 thorpej Exp $
#
# cesfic-specific configuration info
@ -59,6 +59,7 @@ file arch/m68k/m68k/cacheops.c
file arch/m68k/m68k/db_memrw.c ddb | kgdb
file arch/m68k/m68k/kgdb_machdep.c kgdb
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/mmu_subr.s
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

4
sys/arch/cesfic/conf/std.cesfic
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@ -1,4 +1,4 @@
# $NetBSD: std.cesfic,v 1.5 2010/09/19 02:09:27 tsutsui Exp $
# $NetBSD: std.cesfic,v 1.6 2024/01/09 04:16:24 thorpej Exp $
#
# Options/devices that all cesfics should have
#
@ -7,4 +7,6 @@ machine cesfic m68k
include "conf/std" # MI standard options
include "arch/m68k/conf/std.m68k" # m68k standard options
options M68040 # All FIC8234 have a 68040
options EXEC_AOUT # support for exec'ing a.out

4
sys/arch/cesfic/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.33 2019/11/23 19:40:34 ad Exp $ */
/* $NetBSD: cpu.h,v 1.34 2024/01/09 04:16:24 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -110,8 +110,6 @@ extern int astpending; /* need to trap before returning to user mode */
#endif /* ! M68K_MMU_MOTOROLA */
/* locore.s functions */
void loadustp(int);
void doboot(void)
__attribute__((__noreturn__));

3
sys/arch/hp300/conf/files.hp300
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@ -1,4 +1,4 @@
# $NetBSD: files.hp300,v 1.92 2019/02/18 01:12:22 thorpej Exp $
# $NetBSD: files.hp300,v 1.93 2024/01/09 04:16:24 thorpej Exp $
#
# hp300-specific configuration info
@ -220,6 +220,7 @@ file arch/m68k/m68k/db_memrw.c ddb | kgdb
file arch/m68k/m68k/fpu.c compile-with "${M68K_KERN_FPU}"
file arch/m68k/m68k/kgdb_machdep.c kgdb
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/mmu_subr.s
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

47
sys/arch/hp300/hp300/locore.s
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.177 2023/12/27 03:03:41 thorpej Exp $ */
/* $NetBSD: locore.s,v 1.178 2024/01/09 04:16:24 thorpej Exp $ */
/*
* Copyright (c) 1980, 1990, 1993
@ -1071,48 +1071,6 @@ ENTRY(ecacheoff)
Lnocache8:
rts
/*
* Load a new user segment table pointer.
*/
ENTRY(loadustp)
#if defined(M68K_MMU_MOTOROLA)
tstl _C_LABEL(mmutype) | HP MMU?
jeq Lhpmmu9 | yes, skip
movl %sp@(4),%d0 | new USTP
#if defined(M68040)
cmpl #MMU_68040,_C_LABEL(mmutype) | 68040?
jne LmotommuC | no, skip
.word 0xf518 | yes, pflusha
.long 0x4e7b0806 | movc %d0,%urp
rts
LmotommuC:
#endif
pflusha | flush entire TLB
lea _C_LABEL(protorp),%a0 | CRP prototype
movl %d0,%a0@(4) | stash USTP
pmove %a0@,%crp | load root pointer
movl #CACHE_CLR,%d0
movc %d0,%cacr | invalidate cache(s)
rts
Lhpmmu9:
#endif
#if defined(M68K_MMU_HP)
movl #CACHE_CLR,%d0
movc %d0,%cacr | invalidate cache(s)
MMUADDR(%a0)
movl %a0@(MMUTBINVAL),%d1 | invalidate TLB
tstl _C_LABEL(ectype) | have external VAC?
jle 1f | no, skip
andl #~MMU_CEN,%a0@(MMUCMD) | toggle cache enable
orl #MMU_CEN,%a0@(MMUCMD) | to clear data cache
1:
movl %sp@(4),%d0
moveq #PGSHIFT,%d1
lsrl %d1,%d0 | convert to page frame
movl %d0,%a0@(MMUUSTP) | load a new USTP
#endif
rts
/*
* _delay(u_int N)
*
@ -1263,9 +1221,6 @@ GLOBAL(ectype)
GLOBAL(fputype)
.long FPU_68882 | default to 68882 FPU
GLOBAL(protorp)
.long 0,0 | prototype root pointer
GLOBAL(prototc)
.long 0 | prototype translation control

4
sys/arch/hp300/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.73 2023/01/15 06:19:46 tsutsui Exp $ */
/* $NetBSD: cpu.h,v 1.74 2024/01/09 04:16:24 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -119,8 +119,6 @@ extern uint8_t *intiobase, *intiolimit, *extiobase;
extern void (*vectab[])(void);
/* locore.s functions */
void loadustp(int);
void doboot(void) __attribute__((__noreturn__));
void ecacheon(void);
void ecacheoff(void);

3
sys/arch/luna68k/conf/files.luna68k
View File

@ -1,5 +1,5 @@
#
# $NetBSD: files.luna68k,v 1.31 2023/09/17 12:30:00 andvar Exp $
# $NetBSD: files.luna68k,v 1.32 2024/01/09 04:16:24 thorpej Exp $
#
maxpartitions 8
maxusers 2 8 64
@ -19,6 +19,7 @@ file arch/m68k/m68k/db_memrw.c ddb | kgdb
file arch/m68k/m68k/kgdb_machdep.c kgdb
file arch/m68k/m68k/fpu.c compile-with "${M68K_KERN_FPU}"
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/mmu_subr.s
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

5
sys/arch/luna68k/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.38 2023/01/15 05:08:33 tsutsui Exp $ */
/* $NetBSD: cpu.h,v 1.39 2024/01/09 04:16:25 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -118,9 +118,6 @@ extern u_int intiobase_phys, intiotop_phys; /* XXX */
/* machdep.c functions */
void dumpsys(void);
/* locore.s functions */
void loadustp(int);
/* machdep.c functions */
int badaddr(void *, int);

4
sys/arch/luna68k/luna68k/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.26 2023/12/29 02:30:36 tsutsui Exp $
# $NetBSD: genassym.cf,v 1.27 2024/01/09 04:16:25 thorpej Exp $
#
# Copyright (c) 1982, 1990, 1993
@ -67,6 +67,8 @@ ifdef M68040
define M68040 1
endif
define M68K_MMU_MOTOROLA 1
# values for fputype
define FPU_NONE FPU_NONE
define FPU_68881 FPU_68881

23
sys/arch/luna68k/luna68k/locore.s
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.72 2023/12/29 02:30:36 tsutsui Exp $ */
/* $NetBSD: locore.s,v 1.73 2024/01/09 04:16:25 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -779,27 +779,6 @@ ENTRY(ecacheon)
ENTRY(ecacheoff)
rts
/*
* Load a new user segment table pointer.
*/
ENTRY(loadustp)
movl %sp@(4),%d0 | new USTP
#if defined(M68040)
cmpl #MMU_68040,_C_LABEL(mmutype) | 68040?
jne LmotommuC | no, skip
.word 0xf518 | yes, pflusha
.long 0x4e7b0806 | movc %d0,%urp
rts
LmotommuC:
#endif
pflusha | flush entire TLB
lea _C_LABEL(protocrp),%a0 | %crp prototype
movl %d0,%a0@(4) | stash USTP
pmove %a0@,%crp | load root pointer
movl #CACHE_CLR,%d0
movc %d0,%cacr | invalidate cache(s)
rts
ENTRY(getsr)
moveq #0,%d0
movw %sr,%d0

7
sys/arch/m68k/include/mmu_40.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: mmu_40.h,v 1.1 2023/12/27 02:40:31 thorpej Exp $ */
/* $NetBSD: mmu_40.h,v 1.2 2024/01/09 04:16:25 thorpej Exp $ */
/*-
* Copyright (c) 2023 The NetBSD Foundation, Inc.
@ -211,4 +211,9 @@
#define MMUSR40_T __BIT(1) /* Transparent Translation hit */
#define MMUSR40_R PTE40_RESIDENT
#ifdef _KERNEL
void mmu_load_urp40(paddr_t);
void mmu_load_urp60(paddr_t);
#endif /* _KERNEL */
#endif /* _M68K_MMU_40_H_ */

7
sys/arch/m68k/include/mmu_51.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: mmu_51.h,v 1.1 2023/12/27 02:40:32 thorpej Exp $ */
/* $NetBSD: mmu_51.h,v 1.2 2024/01/09 04:16:25 thorpej Exp $ */
/*-
* Copyright (c) 1997, 2023 The NetBSD Foundation, Inc.
@ -263,4 +263,9 @@ struct mmu51_rootptr {
#define PSR51_C __BIT(7) /* Globally Sharable */
#define PSR51_N __BITS(0,2) /* Number of levels */
#ifdef _KERNEL
void mmu_load_urp51(paddr_t);
void mmu_load_urp20hp(paddr_t); /* for convenience */
#endif /* _KERNEL */
#endif /* _M68K_MMU_51_H_ */

65
sys/arch/m68k/m68k/pmap_motorola.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: pmap_motorola.c,v 1.85 2023/12/31 21:59:24 thorpej Exp $ */
/* $NetBSD: pmap_motorola.c,v 1.86 2024/01/09 04:16:25 thorpej Exp $ */
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
@ -69,6 +69,7 @@
*
* Supports:
* 68020 with 68851 MMU
* 68020 with HP MMU
* 68030 with on-chip MMU
* 68040 with on-chip MMU
* 68060 with on-chip MMU
@ -119,7 +120,7 @@
#include "opt_m68k_arch.h"
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pmap_motorola.c,v 1.85 2023/12/31 21:59:24 thorpej Exp $");
__KERNEL_RCSID(0, "$NetBSD: pmap_motorola.c,v 1.86 2024/01/09 04:16:25 thorpej Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -332,6 +333,19 @@ void pmap_check_wiring(const char *, vaddr_t);
(curproc && \
(pm) != pmap_kernel() && (pm) == curproc->p_vmspace->vm_map.pmap)
static void (*pmap_load_urp_func)(paddr_t);
/*
* pmap_load_urp:
*
* Load the user root table into the MMU.
*/
static inline void
pmap_load_urp(paddr_t urp)
{
(*pmap_load_urp_func)(urp);
}
/*
* pmap_bootstrap_finalize: [ INTERFACE ]
*
@ -596,6 +610,47 @@ pmap_init(void)
}
#endif
/*
* Set up the routine that loads the MMU root table pointer.
*/
switch (cputype) {
#if defined(M68020)
case CPU_68020:
#ifdef M68K_MMU_MOTOROLA
if (mmutype == MMU_68851) {
pmap_load_urp_func = mmu_load_urp51;
}
#endif
#ifdef M68K_MMU_HP
if (mmutype == MMU_HP) {
pmap_load_urp_func = mmu_load_urp20hp;
}
#endif
break;
#endif /* M68020 */
#if defined(M68030)
case CPU_68030:
pmap_load_urp_func = mmu_load_urp51;
break;
#endif /* M68030 */
#if defined(M68040)
case CPU_68040:
pmap_load_urp_func = mmu_load_urp40;
break;
#endif /* M68040 */
#if defined(M68060)
case CPU_68060:
pmap_load_urp_func = mmu_load_urp60;
break;
#endif /* M68060 */
default:
break;
}
if (pmap_load_urp_func == NULL) {
panic("pmap_init: No mmu_load_*() for cpu=%d mmu=%d",
cputype, mmutype);
}
/*
* Now it is safe to enable pv_table recording.
*/
@ -769,7 +824,7 @@ pmap_activate(struct lwp *l)
* need to activate the kernel pmap.
*/
if (pmap != pmap_kernel()) {
loadustp((paddr_t)pmap->pm_stpa);
pmap_load_urp((paddr_t)pmap->pm_stpa);
}
}
@ -2285,7 +2340,7 @@ pmap_remove_mapping(pmap_t pmap, vaddr_t va, pt_entry_t *pte, int flags,
* MMU if it's the active user pmap.
*/
if (active_user_pmap(ptpmap)) {
loadustp((paddr_t)ptpmap->pm_stpa);
pmap_load_urp((paddr_t)ptpmap->pm_stpa);
}
}
}
@ -2508,7 +2563,7 @@ pmap_enter_ptpage(pmap_t pmap, vaddr_t va, bool can_fail)
* MMU if it's the active user pmap.
*/
if (active_user_pmap(pmap)) {
loadustp((paddr_t)pmap->pm_stpa);
pmap_load_urp((paddr_t)pmap->pm_stpa);
}
PMAP_DPRINTF(PDB_ENTER|PDB_PTPAGE|PDB_SEGTAB,

3
sys/arch/mac68k/conf/files.mac68k
View File

@ -1,4 +1,4 @@
# $NetBSD: files.mac68k,v 1.131 2021/02/26 10:54:12 rin Exp $
# $NetBSD: files.mac68k,v 1.132 2024/01/09 04:16:25 thorpej Exp $
# mac68k-specific configuration info
@ -173,6 +173,7 @@ file arch/m68k/m68k/db_memrw.c ddb | kgdb
file arch/m68k/m68k/fpu.c compile-with "${M68K_KERN_FPU}"
file arch/m68k/m68k/kgdb_machdep.c kgdb
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/mmu_subr.s
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

5
sys/arch/mac68k/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.102 2019/11/23 19:40:35 ad Exp $ */
/* $NetBSD: cpu.h,v 1.103 2024/01/09 04:16:25 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -287,9 +287,6 @@ void mac68k_set_bell_callback(int (*)(void *, int, int, int), void *);
int mac68k_ring_bell(int, int, int);
u_int get_mapping(void);
/* locore.s functions */
void loadustp(int);
/* fpu.c */
void initfpu(void);

4
sys/arch/mac68k/mac68k/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.44 2023/12/27 19:26:29 thorpej Exp $
# $NetBSD: genassym.cf,v 1.45 2024/01/09 04:16:25 thorpej Exp $
#
# Copyright (c) 1990 The Regents of the University of California.
@ -81,6 +81,8 @@ export MMU51_CRP_BITS
export MMU51_TCR_BITS
export MMU40_TCR_BITS
define M68K_MMU_MOTOROLA 1
# Transparent translation register values (from pmap.h)
export MAC68K_TT_GET_PTE

26
sys/arch/mac68k/mac68k/locore.s
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.178 2023/12/27 19:26:30 thorpej Exp $ */
/* $NetBSD: locore.s,v 1.179 2024/01/09 04:16:25 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -943,27 +943,6 @@ ENTRY(ecacheon)
ENTRY(ecacheoff)
rts
/*
* Load a new user segment table pointer.
*/
ENTRY(loadustp)
movl %sp@(4),%d0 | new USTP
#if defined(M68040)
cmpl #MMU_68040,_C_LABEL(mmutype) | 68040?
jne LmotommuC | no, skip
.word 0xf518 | pflusha
.long 0x4e7b0806 | movec %d0, URP
rts
LmotommuC:
#endif
pflusha | flush entire TLB
lea _C_LABEL(protorp),%a0 | CRP prototype
movl %d0,%a0@(4) | stash USTP
pmove %a0@,%crp | load root pointer
movl #CACHE_CLR,%d0
movc %d0,%cacr | invalidate cache(s)
rts
/*
* Set processor priority level calls. Most are implemented with
* inline asm expansions. However, spl0 requires special handling
@ -1378,9 +1357,6 @@ GLOBAL(ectype)
GLOBAL(fputype)
.long FPU_68882 | default to 68882 FPU
GLOBAL(protorp)
.long 0,0 | prototype root pointer
GLOBAL(intiolimit)
.long 0 | KVA of end of internal IO space

3
sys/arch/mvme68k/conf/files.mvme68k
View File

@ -1,4 +1,4 @@
# $NetBSD: files.mvme68k,v 1.65 2023/09/30 21:00:43 andvar Exp $
# $NetBSD: files.mvme68k,v 1.66 2024/01/09 04:16:25 thorpej Exp $
# config file for mvme68k
@ -99,6 +99,7 @@ file arch/m68k/m68k/cacheops.c
file arch/m68k/m68k/db_memrw.c ddb | kgdb
file arch/m68k/m68k/kgdb_machdep.c kgdb
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/mmu_subr.s
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

3
sys/arch/mvme68k/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.51 2019/11/23 19:40:35 ad Exp $ */
/* $NetBSD: cpu.h,v 1.52 2024/01/09 04:16:26 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -159,7 +159,6 @@ int nmihand(void *);
void mvme68k_abort(const char *);
void *iomap(u_long, size_t);
void iounmap(void *, size_t);
void loadustp(paddr_t);
/* physical memory addresses where mvme147's onboard devices live */
#define INTIOBASE147 (0xfffe0000u)

36
sys/arch/mvme68k/mvme68k/locore.s
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.121 2023/12/27 03:03:41 thorpej Exp $ */
/* $NetBSD: locore.s,v 1.122 2024/01/09 04:16:26 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -580,11 +580,13 @@ Lstart2:
.long 0x4e7b1807 | movc d1,srp
jra Lstploaddone
Lmotommu1:
#ifdef M68030
RELOC(protorp, %a0)
movl #MMU51_SRP_BITS,%a0@ | see pmap.h
movl %d1,%a0@(4) | + segtable address
pmove %a0@,%srp | load the supervisor root pointer
movl #MMU51_CRP_BITS,%a0@ | reinit upper half for CRP loads
#endif /* M68030 */
Lstploaddone:
RELOC(mmutype, %a0)
cmpl #MMU_68040,%a0@ | 68040?
@ -1092,35 +1094,6 @@ ENTRY_NOPROFILE(getsp)
movl %d0,%a0
rts
/*
* Load a new user segment table pointer.
*/
ENTRY(loadustp)
movl %sp@(4),%d0 | new USTP
#if defined(M68040) || defined(M68060)
cmpl #MMU_68040,_C_LABEL(mmutype) | 68040?
jne LmotommuC | no, skip
.word 0xf518 | pflusha
.long 0x4e7b0806 | movc d0,urp
#ifdef M68060
cmpl #CPU_68060,_C_LABEL(cputype)
jne Lldno60
movc %cacr,%d0
orl #IC60_CUBC,%d0 | clear user branch cache entries
movc %d0,%cacr
Lldno60:
#endif
rts
LmotommuC:
#endif
pflusha | flush entire TLB
lea _C_LABEL(protorp),%a0 | CRP prototype
movl %d0,%a0@(4) | stash USTP
pmove %a0@,%crp | load root pointer
movl #CACHE_CLR,%d0
movc %d0,%cacr | invalidate cache(s)
rts
ENTRY(getsr)
moveq #0,%d0
movw %sr,%d0
@ -1237,9 +1210,6 @@ GLOBAL(cputype)
GLOBAL(fputype)
.long FPU_68882 | default to FPU_68882
GLOBAL(protorp)
.long 0,0 | prototype root pointer
/*
* Information from first stage boot program
*/

3
sys/arch/news68k/conf/files.news68k
View File

@ -1,4 +1,4 @@
# $NetBSD: files.news68k,v 1.36 2023/10/01 19:28:36 andvar Exp $
# $NetBSD: files.news68k,v 1.37 2024/01/09 04:16:26 thorpej Exp $
# NEWS68K-specific configuration info
@ -25,6 +25,7 @@ file arch/m68k/m68k/cacheops.c
file arch/m68k/m68k/db_memrw.c ddb | kgdb
file arch/m68k/m68k/kgdb_machdep.c kgdb
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/mmu_subr.s
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

3
sys/arch/news68k/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.46 2019/11/23 19:40:35 ad Exp $ */
/* $NetBSD: cpu.h,v 1.47 2024/01/09 04:16:26 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -155,7 +155,6 @@ extern void *romcallvec;
struct frame;
/* locore.s functions */
void loadustp(int);
void badtrap(void);
void intrhand_vectored(void);
int getsr(void);

5
sys/arch/news68k/news68k/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.33 2023/12/27 19:26:29 thorpej Exp $
# $NetBSD: genassym.cf,v 1.34 2024/01/09 04:16:26 thorpej Exp $
#
# Copyright (c) 1982, 1990, 1993
@ -72,6 +72,8 @@ ifdef M68040
define M68040 1
endif
define M68K_MMU_MOTOROLA 1
# values for fputype
define FPU_NONE FPU_NONE
define FPU_68881 FPU_68881
@ -153,6 +155,7 @@ define CACHE40_ON CACHE40_ON
define CACHE_ON CACHE_ON
define CACHE_OFF CACHE_OFF
define DCIC_CLR DCIC_CLR
define CACHE_CLR CACHE_CLR
define CACHE_BE CACHE_BE
# pte/ste bits

21
sys/arch/news68k/news68k/locore.s
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.75 2023/12/27 19:26:29 thorpej Exp $ */
/* $NetBSD: locore.s,v 1.76 2024/01/09 04:16:26 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -355,11 +355,13 @@ Lstart2:
.long 0x4e7b1807 | movc %d1,%srp
jra Lstploaddone
Lmotommu1:
#ifdef M68030
RELOC(protorp, %a0)
movl #MMU51_SRP_BITS,%a0@ | see pmap.h
movl %d1,%a0@(4) | + segtable address
pmove %a0@,%srp | load the supervisor root pointer
movl #MMU51_CRP_BITS,%a0@ | reinit upper half for CRP loads
#endif /* M68030 */
Lstploaddone:
RELOC(mmutype, %a0)
cmpl #MMU_68040,%a0@ | 68040?
@ -880,20 +882,6 @@ ENTRY(ecacheoff)
Lnocache8:
rts
/*
* Load a new user segment table pointer.
*/
ENTRY(loadustp)
movl %sp@(4),%d0 | new USTP
pflusha | flush entire TLB
lea _C_LABEL(protorp),%a0 | CRP prototype
movl %d0,%a0@(4) | stash USTP
pmove %a0@,%crp | load root pointer
movc %cacr,%d0
orl #DCIC_CLR,%d0
movc %d0,%cacr | invalidate cache(s)
rts
ENTRY(getsr)
moveq #0,%d0
movw %sr,%d0
@ -1011,9 +999,6 @@ GLOBAL(fputype)
GLOBAL(ectype)
.long EC_NONE | external cache type, default to none
GLOBAL(protorp)
.long 0,0 | prototype root pointer
GLOBAL(prototc)
.long MMU51_TCR_BITS | prototype translation control

3
sys/arch/next68k/conf/files.next68k
View File

@ -1,4 +1,4 @@
# $NetBSD: files.next68k,v 1.42 2019/02/18 01:12:24 thorpej Exp $
# $NetBSD: files.next68k,v 1.43 2024/01/09 04:16:26 thorpej Exp $
# next68k-specific configuration info
@ -36,6 +36,7 @@ file arch/m68k/m68k/cacheops.c
file arch/m68k/m68k/db_memrw.c ddb | kgdb
file arch/m68k/m68k/kgdb_machdep.c kgdb
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/mmu_subr.s
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

4
sys/arch/next68k/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.52 2023/02/11 02:31:34 tsutsui Exp $ */
/* $NetBSD: cpu.h,v 1.53 2024/01/09 04:16:26 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -115,8 +115,6 @@ extern int astpending; /* need to trap before returning to user mode */
extern void (*vectab[])(void);
/* locore.s functions */
void loadustp(int);
void doboot(void) __attribute__((__noreturn__));
int nmihand(void *);

7
sys/arch/next68k/next68k/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.32 2023/12/27 19:47:00 thorpej Exp $
# $NetBSD: genassym.cf,v 1.33 2024/01/09 04:16:26 thorpej Exp $
#
# Copyright (c) 1982, 1990, 1993
@ -53,12 +53,7 @@ define MMU_68030 MMU_68030
define MMU_68851 MMU_68851
# MMU configuration options
ifdef M68K_MMU_HP
define M68K_MMU_HP 1
endif
ifdef M68K_MMU_MOTOROLA
define M68K_MMU_MOTOROLA 1
endif
# values for cputype
define CPU_68020 CPU_68020

47
sys/arch/next68k/next68k/locore.s
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.77 2023/12/27 19:47:00 thorpej Exp $ */
/* $NetBSD: locore.s,v 1.78 2024/01/09 04:16:26 thorpej Exp $ */
/*
* Copyright (c) 1998 Darrin B. Jewell
@ -335,12 +335,13 @@ Lstart3:
.long 0x4e7b1807 | movc %d1,%srp
jra Lstploaddone
Lmotommu1:
#ifdef M68030
RELOC(protorp, %a0)
movl #MMU51_SRP_BITS,%a0@ | see pmap.h
movl %d1,%a0@(4) | + segtable address
pmove %a0@,%srp | load the supervisor root pointer
movl #MMU51_CRP_BITS,%a0@ | reinit upper half for CRP loads
#endif /* M68030 */
Lstploaddone:
/*
@ -883,45 +884,6 @@ Lsldone:
rts
#endif
/*
* Load a new user segment table pointer.
*/
ENTRY(loadustp)
#if defined(M68K_MMU_MOTOROLA)
tstl _C_LABEL(mmutype) | HP MMU?
jeq Lhpmmu9 | yes, skip
movl %sp@(4),%d0 | new USTP
#if defined(M68040)
cmpl #MMU_68040,_C_LABEL(mmutype) | 68040?
jne LmotommuC | no, skip
.word 0xf518 | yes, pflusha
.long 0x4e7b0806 | movc %d0,urp
rts
LmotommuC:
#endif
pflusha | flush entire TLB
lea _C_LABEL(protorp),%a0 | CRP prototype
movl %d0,%a0@(4) | stash USTP
pmove %a0@,%crp | load root pointer
movl #CACHE_CLR,%d0
movc %d0,%cacr | invalidate cache(s)
rts
Lhpmmu9:
#endif
#if defined(M68K_MMU_HP)
movl #CACHE_CLR,%d0
movc %d0,%cacr | invalidate cache(s)
MMUADDR(%a0)
movl %a0@(MMUTBINVAL),%d1 | invalidate TLB
tstl _C_LABEL(ectype) | have external VAC?
jle 1f | no, skip
andl #~MMU_CEN,%a0@(MMUCMD) | toggle cache enable
orl #MMU_CEN,%a0@(MMUCMD) | to clear data cache
1:
movl %sp@(4),%a0@(MMUUSTP) | load a new USTP
#endif
rts
/*
* Set processor priority level calls. Most are implemented with
* inline asm expansions. However, spl0 requires special handling
@ -1046,9 +1008,6 @@ GLOBAL(cputype)
GLOBAL(fputype)
.long 0xdeadbeef | default to 68882 FPU
GLOBAL(protorp)
.long 0,0 | prototype root pointer
GLOBAL(prototc)
.long 0 | prototype translation control

3
sys/arch/virt68k/conf/files.virt68k
View File

@ -1,4 +1,4 @@
# $NetBSD: files.virt68k,v 1.2 2024/01/02 18:11:44 thorpej Exp $
# $NetBSD: files.virt68k,v 1.3 2024/01/09 04:16:27 thorpej Exp $
# config file for virt68k
@ -47,6 +47,7 @@ file arch/m68k/m68k/cacheops.c
file arch/m68k/m68k/db_memrw.c ddb | kgdb
file arch/m68k/m68k/kgdb_machdep.c kgdb
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/mmu_subr.s
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

3
sys/arch/virt68k/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.3 2024/01/02 18:10:36 thorpej Exp $ */
/* $NetBSD: cpu.h,v 1.4 2024/01/09 04:16:27 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -112,7 +112,6 @@ extern int astpending; /* need to trap before returning to user mode */
#ifdef _KERNEL
void cpu_set_reset_func(void (*)(void *, int), void *);
int nmihand(void *);
void loadustp(paddr_t);
#endif /* _KERNEL */

35
sys/arch/virt68k/virt68k/locore.s
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.3 2024/01/07 16:41:24 thorpej Exp $ */
/* $NetBSD: locore.s,v 1.4 2024/01/09 04:16:27 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -618,7 +618,6 @@ Laststkadj:
#define FPCOPROC /* XXX: Temp. Reqd. */
#include <m68k/m68k/switch_subr.s>
#if defined(M68040) || defined(M68060)
ENTRY(suline)
movl %sp@(4),%a0 | address to write
@ -666,35 +665,6 @@ ENTRY_NOPROFILE(getsp)
movl %d0,%a0
rts
/*
* Load a new user segment table pointer.
*/
ENTRY(loadustp)
movl %sp@(4),%d0 | new USTP
#if defined(M68040) || defined(M68060)
cmpl #MMU_68040,_C_LABEL(mmutype) | 68040?
jne LmotommuC | no, skip
.word 0xf518 | pflusha
.long 0x4e7b0806 | movc d0,urp
#ifdef M68060
cmpl #CPU_68060,_C_LABEL(cputype)
jne Lldno60
movc %cacr,%d0
orl #IC60_CUBC,%d0 | clear user branch cache entries
movc %d0,%cacr
Lldno60:
#endif
rts
LmotommuC:
#endif
pflusha | flush entire TLB
lea _C_LABEL(protorp),%a0 | CRP prototype
movl %d0,%a0@(4) | stash USTP
pmove %a0@,%crp | load root pointer
movl #CACHE_CLR,%d0
movc %d0,%cacr | invalidate cache(s)
rts
ENTRY(getsr)
moveq #0,%d0
movw %sr,%d0
@ -714,9 +684,6 @@ GLOBAL(cputype)
GLOBAL(fputype)
.long FPU_68040 | default to FPU_68040
GLOBAL(protorp)
.long 0,0 | prototype root pointer
/*
* interrupt counters.
* XXXSCW: Will go away soon; kept here to keep vmstat happy

3
sys/arch/x68k/conf/files.x68k
View File

@ -1,4 +1,4 @@
# $NetBSD: files.x68k,v 1.83 2019/05/08 13:40:17 isaki Exp $
# $NetBSD: files.x68k,v 1.84 2024/01/09 04:16:27 thorpej Exp $
#
# new style config file for x68k architecture
#
@ -35,6 +35,7 @@ file arch/m68k/m68k/cacheops.c
file arch/m68k/m68k/db_memrw.c ddb
file arch/m68k/m68k/fpu.c compile-with "${M68K_KERN_FPU}"
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/mmu_subr.s
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

5
sys/arch/x68k/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.63 2024/01/07 07:58:33 isaki Exp $ */
/* $NetBSD: cpu.h,v 1.64 2024/01/09 04:16:27 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -121,9 +121,6 @@ extern uint8_t *intiolimit;
/* machdep.c functions */
void dumpsys(void);
/* locore.s functions */
void loadustp(int);
/* machdep.c functions */
int badaddr(volatile void*);
int badbaddr(volatile void*);

4
sys/arch/x68k/x68k/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.39 2023/12/27 17:35:37 thorpej Exp $
# $NetBSD: genassym.cf,v 1.40 2024/01/09 04:16:27 thorpej Exp $
#
# Copyright (c) 1982, 1990, 1993
@ -73,6 +73,8 @@ ifdef M68060
define M68060 1
endif
define M68K_MMU_MOTOROLA 1
# values for fputype
define FPU_NONE FPU_NONE
define FPU_68881 FPU_68881

34
sys/arch/x68k/x68k/locore.s
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@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.126 2024/01/06 05:31:19 isaki Exp $ */
/* $NetBSD: locore.s,v 1.127 2024/01/09 04:16:27 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -820,35 +820,6 @@ ENTRY(ecacheon)
ENTRY(ecacheoff)
rts
/*
* Load a new user segment table pointer.
*/
ENTRY(loadustp)
movl %sp@(4),%d0 | new USTP
#if defined(M68040) || defined(M68060)
cmpl #MMU_68040,_C_LABEL(mmutype) | 68040?
jne LmotommuC | no, skip
.word 0xf518 | yes, pflusha
.long 0x4e7b0806 | movc %d0,%urp
#ifdef M68060
cmpl #CPU_68060,_C_LABEL(cputype)
jne Lldno60
movc %cacr,%d0
orl #IC60_CUBC,%d0 | clear user branch cache entries
movc %d0,%cacr
Lldno60:
#endif
rts
LmotommuC:
#endif
pflusha | flush entire TLB
lea _C_LABEL(protorp),%a0 | CRP prototype
movl %d0,%a0@(4) | stash USTP
pmove %a0@,%crp | load root pointer
movl #CACHE_CLR,%d0
movc %d0,%cacr | invalidate cache(s)
rts
/*
* _delay(u_int N)
*
@ -929,9 +900,6 @@ GLOBAL(ectype)
GLOBAL(fputype)
.long FPU_NONE
GLOBAL(protorp)
.long 0,0 | prototype root pointer
GLOBAL(intiobase)
.long 0 | KVA of base of internal IO space