fdt glue for gic
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jmcneill
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5
sys/arch/arm/fdt/files.fdt
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sys/arch/arm/fdt/files.fdt
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# $NetBSD: files.fdt,v 1.1 2015/12/13 17:45:37 jmcneill Exp $
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device gic
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attach gic at fdt with gic_fdt
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file arch/arm/fdt/gic_fdt.c gic_fdt
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202
sys/arch/arm/fdt/gic_fdt.c
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sys/arch/arm/fdt/gic_fdt.c
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/* $NetBSD: gic_fdt.c,v 1.1 2015/12/13 17:45:37 jmcneill Exp $ */
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/*-
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* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: gic_fdt.c,v 1.1 2015/12/13 17:45:37 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/device.h>
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#include <sys/intr.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/kmem.h>
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#include <arm/cortex/gic_intr.h>
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#include <dev/fdt/fdtvar.h>
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static int gic_fdt_match(device_t, cfdata_t, void *);
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static void gic_fdt_attach(device_t, device_t, void *);
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static void * gic_fdt_establish(device_t, int, u_int, int, int,
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int (*)(void *), void *);
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static void gic_fdt_disestablish(device_t, void *);
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static bool gic_fdt_intrstr(device_t, int, u_int, char *, size_t);
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struct fdtbus_interrupt_controller_func gic_fdt_funcs = {
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.establish = gic_fdt_establish,
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.disestablish = gic_fdt_disestablish,
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.intrstr = gic_fdt_intrstr
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};
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struct gic_fdt_softc {
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device_t sc_dev;
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int sc_phandle;
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};
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CFATTACH_DECL_NEW(gic_fdt, sizeof(struct gic_fdt_softc),
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gic_fdt_match, gic_fdt_attach, NULL, NULL);
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static int
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gic_fdt_match(device_t parent, cfdata_t cf, void *aux)
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{
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const char * const compatible[] = {
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"arm,gic-400",
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"arm,cortex-a15-gic",
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"arm,cortex-a9-gic",
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"arm,cortex-a7-gic",
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NULL
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};
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struct fdt_attach_args * const faa = aux;
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return of_compatible(faa->faa_phandle, compatible) >= 0;
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}
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static void
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gic_fdt_attach(device_t parent, device_t self, void *aux)
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{
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struct gic_fdt_softc * const sc = device_private(self);
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struct fdt_attach_args * const faa = aux;
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int error;
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sc->sc_dev = self;
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sc->sc_phandle = faa->faa_phandle;
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error = fdtbus_register_interrupt_controller(self, faa->faa_phandle,
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&gic_fdt_funcs);
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if (error) {
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aprint_error(": couldn't register with fdtbus: %d\n", error);
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return;
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}
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aprint_naive("\n");
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aprint_normal(": GIC\n");
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}
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static void *
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gic_fdt_establish(device_t dev, int phandle, u_int index, int ipl, int flags,
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int (*func)(void *), void *arg)
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{
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struct gic_fdt_softc * const sc = device_private(dev);
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int iflags = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;
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u_int *interrupts;
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int interrupt_cells, len;
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len = OF_getprop(sc->sc_phandle, "#interrupt-cells", &interrupt_cells,
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sizeof(interrupt_cells));
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if (len != sizeof(interrupt_cells) || interrupt_cells <= 0)
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return NULL;
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interrupt_cells = be32toh(interrupt_cells);
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len = OF_getproplen(phandle, "interrupts");
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if (len <= 0)
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return NULL;
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const u_int clen = interrupt_cells * 4;
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const u_int nintr = len / interrupt_cells;
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if (index >= nintr)
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return NULL;
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interrupts = kmem_alloc(len, KM_SLEEP);
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if (OF_getprop(phandle, "interrupts", interrupts, len) != len) {
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kmem_free(interrupts, len);
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return NULL;
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}
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/* 1st cell is the interrupt type; 0 is SPI, 1 is PPI */
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/* 2nd cell is the interrupt number */
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/* 3rd cell is flags */
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const u_int type = be32toh(interrupts[index * clen + 0]);
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const u_int intr = be32toh(interrupts[index * clen + 1]);
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const u_int irq = type == 0 ? IRQ_SPI(intr) : IRQ_PPI(intr);
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const u_int trig = be32toh(interrupts[index * clen + 2]) & 0xf;
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const u_int level = (trig & 0x3) ? IST_EDGE : IST_LEVEL;
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kmem_free(interrupts, len);
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return intr_establish(irq, ipl, level | iflags, func, arg);
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}
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static void
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gic_fdt_disestablish(device_t dev, void *ih)
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{
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intr_disestablish(ih);
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}
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static bool
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gic_fdt_intrstr(device_t dev, int phandle, u_int index, char *buf,
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size_t buflen)
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{
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struct gic_fdt_softc * const sc = device_private(dev);
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u_int *interrupts;
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int interrupt_cells, len;
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len = OF_getprop(sc->sc_phandle, "#interrupt-cells", &interrupt_cells,
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sizeof(interrupt_cells));
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if (len != sizeof(interrupt_cells) || interrupt_cells <= 0) {
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return false;
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}
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interrupt_cells = be32toh(interrupt_cells);
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len = OF_getproplen(phandle, "interrupts");
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if (len <= 0) {
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return false;
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}
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const u_int clen = interrupt_cells * 4;
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const u_int nintr = len / interrupt_cells;
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if (index >= nintr) {
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return false;
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}
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interrupts = kmem_alloc(len, KM_SLEEP);
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if (OF_getprop(phandle, "interrupts", interrupts, len) != len) {
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kmem_free(interrupts, len);
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return false;
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}
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/* 1st cell is the interrupt type; 0 is SPI, 1 is PPI */
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/* 2nd cell is the interrupt number */
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/* 3rd cell is flags */
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const u_int type = be32toh(interrupts[index * clen + 0]);
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const u_int intr = be32toh(interrupts[index * clen + 1]);
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const u_int irq = type == 0 ? IRQ_SPI(intr) : IRQ_PPI(intr);
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kmem_free(interrupts, len);
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snprintf(buf, buflen, "GIC irq %d", irq);
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return true;
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}
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