Initial import of AR2315 support, specifically the Meraki Mini (see

the Meraki web site at http://www.meraki.net/ )  This includes changes
to the AR5312 to make it more conducive to sharing code with the AR5315,
and also includes improved early console support.

All devices including ethernet and wlan interfaces on the Meraki Mini are
functional with this port, _except_ SPI flash, which will be introduced
later.

This port was funded by the Champaign-Urbana Communit Wireless Network
Project (CUWiN).
This commit is contained in:
gdamore 2006-09-26 06:37:31 +00:00
parent fa373d4d88
commit e653071cb2
16 changed files with 1640 additions and 41 deletions

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@ -1,4 +1,4 @@
/* $NetBSD: machdep.c,v 1.4 2006/08/28 07:21:15 gdamore Exp $ */
/* $NetBSD: machdep.c,v 1.5 2006/09/26 06:37:32 gdamore Exp $ */
/*
* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
@ -147,7 +147,7 @@
*/
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.4 2006/08/28 07:21:15 gdamore Exp $");
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.5 2006/09/26 06:37:32 gdamore Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@ -233,6 +233,9 @@ mach_init(void)
memset(edata, 0, kernend - (caddr_t)edata);
/* setup early console */
ar531x_early_console();
/* set CPU model info for sysctl_hw */
snprintf(cpu_model, 64, "%s", ar531x_cpuname());

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@ -1,10 +1,10 @@
# $NetBSD: AP30,v 1.5 2006/09/04 05:17:26 gdamore Exp $
# $NetBSD: AP30,v 1.6 2006/09/26 06:37:31 gdamore Exp $
include "arch/evbmips/conf/std.atheros"
#options INCLUDE_CONFIG_FILE # embed config file in kernel binary
#ident "AP30-$Revision: 1.5 $"
#ident "AP30-$Revision: 1.6 $"
maxusers 32
@ -60,7 +60,7 @@ options SYMTAB_SPACE=150000 # size for embedded symbol table
#options COMPAT_14 # NetBSD 1.4 binary compatibility
#options COMPAT_16 # NetBSD 1.6 binary compatibility
#options COMPAT_20 # NetBSD 2.0 binary compatibility
options COMPAT_30 # NetBSD 3.0 compatibility.
#options COMPAT_30 # NetBSD 3.0 compatibility.
#options EXEC_ECOFF # exec ECOFF binaries
#options COMPAT_ULTRIX # binary compatibility with Ultrix
#options COMPAT_BSDPTY # /dev/[pt]ty?? ptys.

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@ -0,0 +1,206 @@
# $NetBSD: MERAKI,v 1.1 2006/09/26 06:37:32 gdamore Exp $
include "arch/evbmips/conf/std.meraki"
#options INCLUDE_CONFIG_FILE # embed config file in kernel binary
#ident "AP30-$Revision: 1.1 $"
maxusers 32
makeoptions COPTS="-Os" # Optimise for space. Implies -O2
makeoptions ATH_MACHINE_HAL=ap51
options MIPS32
options NOFPU # No FPU
options SOFTFLOAT # emulate FPU insn
options WISOC_AR5315 # WiSoc select
# Options for necessary to use MD
#options MEMORY_DISK_HOOKS
#options MEMORY_DISK_IS_ROOT # force root on memory disk
#options MEMORY_DISK_SERVER=0 # no userspace memory disk support
#options MEMORY_DISK_ROOT_SIZE=6144 # size of memory disk, in blocks
#options MEMORY_DISK_ROOT_SIZE=16384 # size of memory disk, in blocks
#options MEMORY_DISK_ROOT_SIZE=7300
# Size reduction options
options MALLOC_NOINLINE
options VNODE_OP_NOINLINE
options PIPE_SOCKETPAIR
options SOSEND_NO_LOAN
# Standard system options
#options KTRACE # system call tracing support
#options SYSVMSG # System V message queues
#options SYSVSEM # System V semaphores
#options SYSVSHM # System V shared memory
#options SHMMAXPGS=1024 # 1024 pages is the default
#options LKM # loadable kernel modules
options NTP # network time protocol
# Debugging options
options DIAGNOSTIC # extra kernel sanity checking
#options DEBUG # extra kernel debugging support
#options KMEMSTATS # kernel memory statistics (vmstat -m)
#options USERCONF # userconf(4) support
#options SYSCTL_INCLUDE_DESCR # Include sysctl descriptions in kernel
options DDB # kernel dynamic debugger
options DDB_HISTORY_SIZE=100 # enable history editing in DDB
makeoptions DEBUG="-g" # compile full symbol table
options SYMTAB_SPACE=150000 # size for embedded symbol table
# Compatibility options
#options COMPAT_43 # compatibility with 4.3BSD binaries
#options COMPAT_09 # NetBSD 0.9 binary compatibility
#options COMPAT_10 # NetBSD 1.0 binary compatibility
#options COMPAT_11 # NetBSD 1.1 binary compatibility
#options COMPAT_12 # NetBSD 1.2 binary compatibility
#options COMPAT_13 # NetBSD 1.3 binary compatibility
#options COMPAT_14 # NetBSD 1.4 binary compatibility
#options COMPAT_16 # NetBSD 1.6 binary compatibility
#options COMPAT_20 # NetBSD 2.0 binary compatibility
#options COMPAT_30 # NetBSD 3.0 compatibility.
#options EXEC_ECOFF # exec ECOFF binaries
#options COMPAT_ULTRIX # binary compatibility with Ultrix
#options COMPAT_BSDPTY # /dev/[pt]ty?? ptys.
# File systems
file-system FFS # Berkeley Fast Filesystem
file-system MFS # memory-based filesystem
#file-system EXT2FS # second extended file system (linux)
file-system NFS # Sun NFS-compatible filesystem client
#file-system KERNFS # kernel data-structure filesystem
#file-system NULLFS # NULL layered filesystem
#file-system OVERLAY # overlay file system
#file-system FDESC # user file descriptor filesystem
#file-system UMAPFS # uid/gid remapping filesystem
#file-system LFS # Log-based filesystem (still experimental)
#file-system PORTAL # portal filesystem (still experimental)
#file-system PROCFS # /proc
#file-system CD9660 # ISO 9660 + Rock Ridge file system
#file-system UNION # union file system
#file-system MSDOSFS # MS-DOS FAT filesystem(s).
#file-system CODA # Coda File System; also needs vcoda (below)
#file-system PTYFS # /dev/pts/N support
# File system options
#options NFSSERVER # Sun NFS-compatible filesystem server
#options QUOTA # FFS quotas
#options FFS_EI # FFS Endian Independant support
#options SOFTDEP # FFS soft updates support.
options FFS_NO_SNAPSHOT # No FFS snapshot support
#options EXT2FS_SYSTEM_FLAGS # makes ext2fs file flags (append and
# immutable) behave as system flags.
# Networking options
#options GATEWAY # IP packet forwarding
options INET # Internet protocols
#options INET6 # IPV6
#options IPSEC # IP security
#options IPSEC_ESP # IP security (encryption part; define w/IPSEC)
#options IPSEC_NAT_T # IPsec NAT traversal (NAT-T)
#options IPSEC_DEBUG # debug for IP security
#options MROUTING # packet forwarding of multicast packets
#options PIM # Protocol Independent Multicast
#options NS # Xerox NS networking
#options NSIP # Xerox NS tunneling over IP
#options ISO,TPIP # OSI networking
#options EON # OSI tunneling over IP
#options CCITT,LLC,HDLC # X.25
#options NETATALK # AppleTalk (over Ethernet) protocol
#options PPP_BSDCOMP # BSD-Compress compression support for PPP
#options PPP_DEFLATE # Deflate compression support for PPP
#options PPP_FILTER # Active filter support for PPP (requires bpf)
#options PFIL_HOOKS # pfil(9) packet filter hooks
#options IPFILTER_LOG # ipmon(8) log support
# Compatibility with 4.2BSD implementation of TCP/IP. Not recommended.
#options TCP_COMPAT_42
# These options enable verbose messages for several subsystems.
# Warning, these may compile large string tables into the kernel!
options MIIVERBOSE # verbose PHY autoconfig messages
# Bitmask for enabling the PCI IDE channels in the southbridge.
# Set bit 0 (0x01) for channel 0, bit 1 (0x02) for channel 1.
#
# Do this if your firmware (usually PMON and YAMON) doens't enable the IDE
# channels for you (thus causing the NetBSD `pciide' driver to ignore them).
#options PCI_NETBSD_ENABLE_IDE=0x1
options NFS_BOOT_DHCP
options NFS_V2_ONLY
config netbsd root on ? type ?
mainbus0 at root
cpu0 at mainbus?
wdog0 at mainbus?
arbus0 at mainbus?
com* at arbus? addr ?
ae* at arbus? addr ?
ath* at arbus? addr ?
#athflash* at arbus? addr ?
argpio* at arbus? addr ?
gpio* at argpio?
# no RTC! so fake with a stub (required to prevent evbmips panic)
# MII/PHY support
#acphy* at mii? phy ? # DAltima AC101 and AMD Am79c874 PHYs
#amhphy* at mii? phy ? # AMD 79c901 Ethernet PHYs
#dmphy* at mii? phy ? # Davicom DM9101 PHYs
#glxtphy* at mii? phy ? # Level One LXT-1000 PHYs
#gphyter* at mii? phy ? # NS83861 Gig-E PHY
#icsphy* at mii? phy ? # Integrated Circuit Systems ICS1890
#lxtphy* at mii? phy ? # Level One LXT-970 PHYs
#makphy* at mii? phy ? # Marvell Semiconductor 88E1000 PHYs
#nsphy* at mii? phy ? # NS83840 PHYs
#nsphyter* at mii? phy ? # NS83843 PHYs
#pnaphy* at mii? phy ? # generic HomePNA PHYs
#qsphy* at mii? phy ? # Quality Semiconductor QS6612 PHYs
#sqphy* at mii? phy ? # Seeq 80220/80221/80223 PHYs
#tlphy* at mii? phy ? # ThunderLAN PHYs
#tqphy* at mii? phy ? # TDK Semiconductor PHYs
rlphy* at mii? phy ? # RealTek PHYs
ukphy* at mii? phy ? # generic unknown PHYs
# Pseudo-devices
# Disk/mass storage pseudo-devices
#pseudo-device ccd 4 # concatenated disk devices
#pseudo-device raid 4 # RAIDframe disk driver
#pseudo-device fss 4 # file system snapshot device
#pseudo-device md 1 # memory disk device (ramdisk)
#pseudo-device vnd # disk-like interface to files
# Network pseudo-devices
pseudo-device bpfilter # Berkeley packet filter
#pseudo-device ipfilter # IP filter (firewall) and NAT
pseudo-device loop # network loopback
#pseudo-device ppp # Point-to-Point Protocol
#pseudo-device sl # Serial Line IP
#pseudo-device strip # Starmode Radio IP (Metricom)
#pseudo-device tun # network tunneling over tty
#pseudo-device tap # virtual Ethernet
#pseudo-device gre # generic L3 over IP tunnel
#pseudo-device ipip 2 # RFC 2003 IP Encapsulation
#pseudo-device gif # RFC1933 tunnel
#pseudo-device faith # IPv[46] tcp relay translation
#pseudo-device stf # 6to4 IPv6 over IPv4 encapsulation
#pseudo-device vlan # IEEE 802.1q encapsulation
#pseudo-device bridge # simple inter-network bridging
# Miscellaneous pseudo-devices
pseudo-device pty # pseudo-terminals
pseudo-device rnd # /dev/random & kernel generator
pseudo-device clockctl # user control of clock subsystem
pseudo-device ksyms # /dev/ksyms
# A pseudo device needed for Coda # also needs CODA (above)
#pseudo-device vcoda 4 # coda minicache <-> venus comm.

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@ -1,4 +1,4 @@
# $NetBSD: std.atheros,v 1.2 2006/09/04 05:17:26 gdamore Exp $
# $NetBSD: std.atheros,v 1.3 2006/09/26 06:37:32 gdamore Exp $
machine evbmips mips
include "conf/std" # MI standard options
@ -9,7 +9,6 @@ options EXEC_ELF32 # exec ELF32 binaries
options EXEC_SCRIPT # exec #! scripts
makeoptions DEFTEXTADDR="0x80020000"
#makeoptions DEFTEXTADDR="0x80041000"
makeoptions BOARDTYPE="atheros"
include "arch/evbmips/conf/files.atheros"

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@ -0,0 +1,15 @@
# $NetBSD: std.meraki,v 1.1 2006/09/26 06:37:32 gdamore Exp $
machine evbmips mips
include "conf/std" # MI standard options
options MIPS3_ENABLE_CLOCK_INTR
options EXEC_ELF32 # exec ELF32 binaries
options EXEC_SCRIPT # exec #! scripts
makeoptions DEFTEXTADDR="0x80041000"
makeoptions BOARDTYPE="atheros"
include "arch/evbmips/conf/files.atheros"
include "arch/mips/conf/files.atheros"

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@ -1,4 +1,4 @@
/* $NetBSD: ar5312.c,v 1.2 2006/09/04 05:17:26 gdamore Exp $ */
/* $NetBSD: ar5312.c,v 1.3 2006/09/26 06:37:32 gdamore Exp $ */
/*
* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
@ -130,23 +130,6 @@ ar531x_cpuname(void)
}
}
void
ar531x_consinit(void)
{
/*
* Everything related to console initialization is done
* in mach_init().
*/
#if NCOM > 0
/* Setup polled serial for early console I/O */
/* XXX: pass in CONSPEED? */
com_arbus_cnattach(AR5312_UART0_BASE, ar531x_bus_freq());
#else
panic("Not configured to use serial console!\n");
/* not going to see that message now, are we? */
#endif
}
void
ar531x_businit(void)
@ -293,6 +276,10 @@ ar531x_device_register(struct device *dev, void *aux)
return;
addprop_data(dev, "mac-addr", enet, ETHER_ADDR_LEN);
addprop_integer(dev, "wmac-rev",
AR5312_REVISION_WMAC(GETSYSREG(AR5312_SYSREG_REVISION)));
}
if (device_is_a(dev, "com")) {
@ -418,4 +405,3 @@ ar531x_get_devices(void)
return devices;
}

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@ -1,4 +1,4 @@
/* $Id: ar531x_board.c,v 1.5 2006/09/08 23:39:27 gdamore Exp $ */
/* $Id: ar5312_board.c,v 1.1 2006/09/26 06:37:32 gdamore Exp $ */
/*
* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
* Copyright (c) 2006 Garrett D'Amore.
@ -40,7 +40,7 @@
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: ar531x_board.c,v 1.5 2006/09/08 23:39:27 gdamore Exp $");
__KERNEL_RCSID(0, "$NetBSD: ar5312_board.c,v 1.1 2006/09/26 06:37:32 gdamore Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -97,10 +97,6 @@ ar531x_board_info(void)
board = (const struct ar531x_boarddata *) ptr;
break;
}
printf("enet0: mac: %s\n", ether_sprintf(board->enet0Mac));
printf("enet1: mac: %s\n", ether_sprintf(board->enet1Mac));
printf("wlan0: mac: %s\n", ether_sprintf(board->wlan0Mac));
printf("wlan1: mac: %s\n", ether_sprintf(board->wlan1Mac));
}
return board;
}

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@ -0,0 +1,167 @@
/* $NetBSD: ar5312_console.c,v 1.1 2006/09/26 06:37:32 gdamore Exp $ */
/*
* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
* Copyright (c) 2006 Garrett D'Amore.
* All rights reserved.
*
* Portions of this code were written by Garrett D'Amore for the
* Champaign-Urbana Community Wireless Network Project.
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* 3. All advertising materials mentioning features or use of this
* software must display the following acknowledgements:
* This product includes software developed by the Urbana-Champaign
* Independent Media Center.
* This product includes software developed by Garrett D'Amore.
* 4. Urbana-Champaign Independent Media Center's name and Garrett
* D'Amore's name may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
* MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
* MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* This file includes a implementation specific console for AR5312.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: ar5312_console.c,v 1.1 2006/09/26 06:37:32 gdamore Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
#include "opt_memsize.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/buf.h>
#include <dev/cons.h>
#include <mips/cache.h>
#include <mips/locore.h>
#include <mips/cpuregs.h>
#include <mips/atheros/include/ar5312reg.h>
#include <mips/atheros/include/ar531xvar.h>
#include <mips/atheros/include/arbusvar.h>
#include "com.h"
void
ar531x_consinit(void)
{
/*
* Everything related to console initialization is done
* in mach_init().
*/
#if NCOM > 0
/* Setup polled serial for early console I/O */
/* XXX: pass in CONSPEED? */
com_arbus_cnattach(AR5312_UART0_BASE, ar531x_bus_freq());
#else
panic("Not configured to use serial console!\n");
/* not going to see that message now, are we? */
#endif
}
/*
* Early console support.
*/
#define STRIDE(x) ((x*4) + MIPS_PHYS_TO_KSEG1(AR5312_UART0_BASE + 3))
#define THR STRIDE(0)
#define RHR STRIDE(0)
#define DLBL STRIDE(0)
#define DLBH STRIDE(1)
#define IER STRIDE(1)
#define FCR STRIDE(2)
#define LCR STRIDE(3)
#define MCR STRIDE(4)
#define LSR STRIDE(5)
#define MSR STRIDE(6)
#define SCRATCH STRIDE(7)
#define INB(x) (*(volatile char *)(x))
#define OUTB(x, v) (*(volatile char *)(x) = (v))
/* line status register */
#define LSR_RCV_FIFO 0x80
#define LSR_TSRE 0x40 /* Transmitter empty: byte sent */
#define LSR_TXRDY 0x20 /* Transmitter buffer empty */
#define LSR_BI 0x10 /* Break detected */
#define LSR_FE 0x08 /* Framing error: bad stop bit */
#define LSR_PE 0x04 /* Parity error */
#define LSR_OE 0x02 /* Overrun, lost incoming byte */
#define LSR_RXRDY 0x01 /* Byte ready in Receive Buffer */
#define LSR_RCV_MASK 0x1f /* Mask for incoming data or error */
static void
ar5312_putc(dev_t dev, int c)
{
unsigned char lsr = 0;
while (!(lsr & LSR_TXRDY)) {
lsr = INB(LSR);
}
OUTB(THR, (char)c);
}
static int
ar5312_getc(dev_t dev)
{
unsigned char lsr = 0, dat;
while (!(lsr & LSR_RXRDY)) {
lsr = INB(LSR);
}
dat = INB(RHR);
return (dat);
}
static void
ar5312_flush(dev_t dev)
{
unsigned char lsr = 0;
while (!(lsr & LSR_TSRE)) {
lsr = INB(LSR);
}
}
void
ar531x_early_console(void)
{
static struct consdev promcn = {
.cn_probe = NULL,
.cn_init = NULL,
.cn_getc = ar5312_getc,
.cn_putc = ar5312_putc,
.cn_pollc = nullcnpollc,
.cn_bell = NULL,
.cn_halt = NULL,
.cn_flush = ar5312_flush,
.cn_dev = makedev(0, 0),
.cn_pri = CN_DEAD,
};
cn_tab = &promcn;
}

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@ -0,0 +1,359 @@
/* $NetBSD: ar5315.c,v 1.1 2006/09/26 06:37:32 gdamore Exp $ */
/*
* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
* Copyright (c) 2006 Garrett D'Amore.
* All rights reserved.
*
* Portions of this code were written by Garrett D'Amore for the
* Champaign-Urbana Community Wireless Network Project.
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* 3. All advertising materials mentioning features or use of this
* software must display the following acknowledgements:
* This product includes software developed by the Urbana-Champaign
* Independent Media Center.
* This product includes software developed by Garrett D'Amore.
* 4. Urbana-Champaign Independent Media Center's name and Garrett
* D'Amore's name may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
* MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
* MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* This file includes a bunch of implementation specific bits for
* AR5315, which differs these from other members of the AR531X
* family.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: ar5315.c,v 1.1 2006/09/26 06:37:32 gdamore Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
#include "opt_memsize.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/buf.h>
#include <mips/cache.h>
#include <mips/locore.h>
#include <mips/cpuregs.h>
#include <net/if.h>
#include <net/if_ether.h>
#include <contrib/dev/ath/ah_soc.h> /* XXX really doesn't belong in hal */
#include <mips/atheros/include/ar5315reg.h>
#include <mips/atheros/include/ar531xvar.h>
#include <mips/atheros/include/arbusvar.h>
#include <machine/locore.h>
/* helper macro for accessing system registers without bus space */
#define REGVAL(x) *((volatile uint32_t *)(MIPS_PHYS_TO_KSEG1((x))))
#define GETSYSREG(x) REGVAL((x) + AR5315_SYSREG_BASE)
#define PUTSYSREG(x,v) (REGVAL((x) + AR5315_SYSREG_BASE)) = (v)
#define GETPCIREG(x) REGVAL((x) + AR5315_PCI_BASE)
#define PUTPCIREG(x,v) (REGVAL((x) + AR5315_PCI_BASE)) = (v)
uint32_t
ar531x_memsize(void)
{
uint32_t memsize;
/*
* Determine the memory size.
*
* NB: we allow compile time override
*/
#if defined(MEMSIZE)
memsize = MEMSIZE;
#else
/* assume default value, may or may not be reasonable */
/* XXX: it would be nice if this could autodetect */
memsize = (8 << 20);
#endif
return (memsize);
}
const char *
ar531x_cpuname(void)
{
uint16_t rev = GETSYSREG(AR5315_SYSREG_SREV);
switch (rev) {
case 0x52: /* AP30 */
case 0x57: /* AP31 */
return "Atheros AR5312";
case 0x58: /* AP43 */
return "Atheros AR2313";
case 0x86: /* AP51-Light */
case 0x87: /* AP51-Full */
return "Atheros AR2315";
case 0x91: /* AP61 */
return "Atheros AR2317";
}
return ("Atheros AR531X");
}
void
ar531x_wdog(uint32_t period)
{
if (period == 0) {
PUTSYSREG(AR5315_SYSREG_WDOG_CTL, AR5315_WDOG_CTL_IGNORE);
PUTSYSREG(AR5315_SYSREG_WDOG_TIMER, 0);
} else {
PUTSYSREG(AR5315_SYSREG_WDOG_TIMER, period);
PUTSYSREG(AR5315_SYSREG_WDOG_CTL, AR5315_WDOG_CTL_RESET);
}
}
void
ar531x_businit(void)
{
/*
* XXX: clear COP0 config bits 0 and 1 -- Linux sets KSEG0 to either
* 0 or 4. Why does it do this? It is implementation defined...
*/
mips3_cp0_config_write(mips3_cp0_config_read() & ~0x3);
PUTSYSREG(AR5315_SYSREG_AHB_ERR0, AR5315_AHB_ERROR_DET);
GETSYSREG(AR5315_SYSREG_AHB_ERR1);
}
static uint32_t
get_freq(uint32_t clkreg)
{
uint32_t freq = 0;
uint32_t clkctl, pllc, pllout, refdiv, fbdiv, div2, cpudiv;
static const int pll_divide_table[] = {
2, 3, 4, 6, 3,
/*
* these entries are bogus, but it avoids a possible
* bad table dereference
*/
1, 1, 1
};
static const int pre_divide_table[] = {
1, 2, 4, 5
};
if (freq)
return freq;
pllc = GETSYSREG(AR5315_SYSREG_PLLC_CTL);
clkctl = GETSYSREG(clkreg);
refdiv = pre_divide_table[AR5315_PLLC_REF_DIV(pllc)];
fbdiv = AR5315_PLLC_FB_DIV(pllc);
div2 = (AR5315_PLLC_DIV_2(pllc) + 1) * 2; /* results in 2 or 4 */
cpudiv = AR5315_CLOCKCTL_DIV(clkctl);
cpudiv = cpudiv ? (cpudiv * 2) : 1;
/* 40MHz reference clk, reference and feedback dividers */
pllout = (40000000 / refdiv) * div2 * fbdiv;
switch (AR5315_CLOCKCTL_SELECT(clkctl)) {
case 0:
case 1:
/* CLKM select */
pllout /= pll_divide_table[AR5315_PLLC_CLKM(pllc)];
break;
case 2:
/* CLKC select */
pllout /= pll_divide_table[AR5315_PLLC_CLKC(pllc)];
break;
default:
/* ref_clk select */
pllout = 40000000; /* use original reference clock */
break;
}
freq = pllout/(cpudiv);
return (freq);
}
uint32_t
ar531x_cpu_freq(void)
{
static uint32_t freq = 0;
if (freq == 0)
freq = get_freq(AR5315_SYSREG_CPUCLK);
return (freq);
}
uint32_t
ar531x_bus_freq(void)
{
static uint32_t freq = 0;
if (freq == 0)
freq = get_freq(AR5315_SYSREG_AMBACLK);
return (freq);
}
static void
addprop_data(struct device *dev, const char *name, const uint8_t *data,
int len)
{
prop_data_t pd;
pd = prop_data_create_data(data, len);
KASSERT(pd != NULL);
if (prop_dictionary_set(device_properties(dev), name, pd) == FALSE) {
printf("WARNING: unable to set %s property for %s\n",
name, device_xname(dev));
}
prop_object_release(pd);
}
static void
addprop_integer(struct device *dev, const char *name, uint32_t val)
{
prop_number_t pn;
pn = prop_number_create_integer(val);
KASSERT(pn != NULL);
if (prop_dictionary_set(device_properties(dev), name, pn) == FALSE) {
printf("WARNING: unable to set %s property for %s",
name, device_xname(dev));
}
prop_object_release(pn);
}
void
ar531x_device_register(struct device *dev, void *aux)
{
struct arbus_attach_args *aa = aux;
const struct ar531x_boarddata *info;
info = ar531x_board_info();
if (info == NULL) {
/* nothing known about this board! */
return;
}
/*
* We don't ever know the boot device. But that's because the
* firmware only loads from the network.
*/
/* Fetch the MAC addresses. */
if (device_is_a(dev, "ae")) {
const uint8_t *enet;
if (aa->aa_addr == AR5315_ENET_BASE)
enet = info->enet0Mac;
else
return;
addprop_data(dev, "mac-addr", enet, ETHER_ADDR_LEN);
}
if (device_is_a(dev, "ath")) {
const uint8_t *enet;
if (aa->aa_addr == AR5315_WLAN_BASE)
enet = info->wlan0Mac;
else
return;
addprop_data(dev, "mac-addr", enet, ETHER_ADDR_LEN);
addprop_integer(dev, "wmac-rev",
GETSYSREG(AR5315_SYSREG_SREV));
}
if (device_is_a(dev, "com")) {
addprop_integer(dev, "frequency", ar531x_bus_freq());
}
if (device_is_a(dev, "argpio")) {
if (info->config & BD_RSTFACTORY) {
addprop_integer(dev, "reset-pin",
info->resetConfigGpio);
}
if (info->config & BD_SYSLED) {
addprop_integer(dev, "sysled-pin",
info->sysLedGpio);
}
}
}
const struct ar531x_device *
ar531x_get_devices(void)
{
const static struct ar531x_device devices[] = {
{
"com",
AR5315_UART_BASE, 0x1000,
AR5315_CPU_IRQ_MISC, AR5315_MISC_IRQ_UART,
0, 0, 0
},
{
"ae",
AR5315_ENET_BASE, 0x100000,
AR5315_CPU_IRQ_ENET, -1,
0, 0, 0
},
{
"ath",
AR5315_WLAN_BASE, 0x100000,
AR5315_CPU_IRQ_WLAN, -1,
0, 0, 0
},
{ NULL }
};
return devices;
}
int
ar531x_enable_device(const struct ar531x_device *dev)
{
if (dev->addr == AR5315_WLAN_BASE) {
/* enable arbitration for wlan */
PUTSYSREG(AR5315_SYSREG_AHB_ARB_CTL,
GETSYSREG(AR5315_SYSREG_AHB_ARB_CTL) | AR5315_ARB_WLAN);
/* set WLAN for big endian */
PUTSYSREG(AR5315_SYSREG_ENDIAN,
GETSYSREG(AR5315_SYSREG_ENDIAN) | AR5315_ENDIAN_WLAN);
/* wake up the mac */
PUTPCIREG(AR5315_PCI_MAC_SCR,
(GETPCIREG(AR5315_PCI_MAC_SCR) & ~PCI_MAC_SCR_SLM_MASK) |
PCI_MAC_SCR_SLM_FWAKE);
/* wait for it to wake up */
while (GETPCIREG(AR5315_PCI_MAC_PCICFG) &
PCI_MAC_PCICFG_SPWR_DN);
}
return 0;
}

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/* $NetBSD: ar5315_board.c,v 1.1 2006/09/26 06:37:32 gdamore Exp $ */
/*
* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
* Copyright (c) 2006 Garrett D'Amore.
* All rights reserved.
*
* Portions of this code were written by Garrett D'Amore for the
* Champaign-Urbana Community Wireless Network Project.
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* 3. All advertising materials mentioning features or use of this
* software must display the following acknowledgements:
* This product includes software developed by the Urbana-Champaign
* Independent Media Center.
* This product includes software developed by Garrett D'Amore.
* 4. Urbana-Champaign Independent Media Center's name and Garrett
* D'Amore's name may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
* MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
* MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* This file provides code to locate board-specific configuration and radio
* information data in flash for the AR5315.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: ar5315_board.c,v 1.1 2006/09/26 06:37:32 gdamore Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
#include "opt_memsize.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/buf.h>
#include <dev/cons.h>
#include <mips/cache.h>
#include <mips/locore.h>
#include <mips/cpuregs.h>
#include <net/if.h>
#include <net/if_ether.h>
#include <contrib/dev/ath/ah_soc.h> /* XXX really doesn't belong in hal */
#include <mips/atheros/include/ar5315reg.h>
#include <mips/atheros/include/ar531xvar.h>
#include <mips/atheros/include/arbusvar.h>
#include <machine/locore.h>
#include "com.h"
/*
* Locate the Board Configuration data using heuristics.
* Search backward from the (aliased) end of flash looking
* for the signature string that marks the start of the data.
* We search at most 500KB.
*/
const struct ar531x_boarddata *
ar531x_board_info(void)
{
static const struct ar531x_boarddata *board = NULL;
const uint8_t *ptr, *end;
if (board == NULL) {
/* search backward in the flash looking for the signature */
ptr = (const uint8_t *) MIPS_PHYS_TO_KSEG1(AR5315_CONFIG_END
- 0x1000);
end = (const uint8_t *)AR5315_CONFIG_BASE;
/* XXX validate end */
for (; ptr > end; ptr -= 0x1000)
if (*(const uint32_t *)ptr == AR531X_BD_MAGIC) {
board = (const struct ar531x_boarddata *) ptr;
break;
}
}
return board;
}
/*
* Locate the radio configuration data; it is located relative to the
* board configuration data.
*/
const void *
ar531x_radio_info(void)
{
static const void *radio = NULL;
const struct ar531x_boarddata *board;
const uint8_t *baddr, *ptr, *end;
if (radio)
goto done;
board = ar531x_board_info();
if (board == NULL)
return NULL;
baddr = (const uint8_t *) board;
end = (const uint8_t *)MIPS_PHYS_TO_KSEG1(AR5315_RADIO_END);
for (ptr = baddr + 0x1000; ptr < end; ptr += 0x1000)
if (*(const uint32_t *)ptr != 0xffffffffU) {
radio = ptr;
goto done;
}
/* AR2316 moves radio data */
for (ptr = baddr + 0xf8; ptr < end; ptr += 0x1000)
if (*(const uint32_t *)ptr != 0xffffffffU) {
radio = ptr;
goto done;
}
done:
return radio;
}
/*
* Locate board and radio configuration data in flash.
*/
int
ar531x_board_config(struct ar531x_config *config)
{
config->board = ar531x_board_info();
if (config->board == NULL)
return ENOENT;
config->radio = ar531x_radio_info();
if (config->radio == NULL)
return ENOENT; /* XXX distinct code */
return 0;
}

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/* $NetBSD: ar5315_console.c,v 1.1 2006/09/26 06:37:32 gdamore Exp $ */
/*
* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
* Copyright (c) 2006 Garrett D'Amore.
* All rights reserved.
*
* Portions of this code were written by Garrett D'Amore for the
* Champaign-Urbana Community Wireless Network Project.
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* 3. All advertising materials mentioning features or use of this
* software must display the following acknowledgements:
* This product includes software developed by the Urbana-Champaign
* Independent Media Center.
* This product includes software developed by Garrett D'Amore.
* 4. Urbana-Champaign Independent Media Center's name and Garrett
* D'Amore's name may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
* MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
* MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* This file includes a implementation specific console for AR5315.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: ar5315_console.c,v 1.1 2006/09/26 06:37:32 gdamore Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
#include "opt_memsize.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <dev/cons.h>
#include <mips/cache.h>
#include <mips/locore.h>
#include <mips/cpuregs.h>
#include <mips/atheros/include/ar5315reg.h>
#include <mips/atheros/include/ar531xvar.h>
#include <mips/atheros/include/arbusvar.h>
#include <machine/locore.h>
#include "com.h"
void
ar531x_consinit(void)
{
/*
* Everything related to console initialization is done
* in mach_init().
*/
#if NCOM > 0
/* Setup polled serial for early console I/O */
/* XXX: pass in CONSPEED? */
com_arbus_cnattach(AR5315_UART_BASE, ar531x_bus_freq());
#else
panic("Not configured to use serial console!\n");
/* not going to see that message now, are we? */
#endif
}
/*
* Early console support.
*/
#define STRIDE(x) ((x*4) + MIPS_PHYS_TO_KSEG1(AR5315_UART_BASE + 3))
#define THR STRIDE(0)
#define RHR STRIDE(0)
#define DLBL STRIDE(0)
#define DLBH STRIDE(1)
#define IER STRIDE(1)
#define FCR STRIDE(2)
#define LCR STRIDE(3)
#define MCR STRIDE(4)
#define LSR STRIDE(5)
#define MSR STRIDE(6)
#define SCRATCH STRIDE(7)
#define INB(x) (*(volatile char *)(x))
#define OUTB(x, v) (*(volatile char *)(x) = (v))
/* line status register */
#define LSR_RCV_FIFO 0x80
#define LSR_TSRE 0x40 /* Transmitter empty: byte sent */
#define LSR_TXRDY 0x20 /* Transmitter buffer empty */
#define LSR_BI 0x10 /* Break detected */
#define LSR_FE 0x08 /* Framing error: bad stop bit */
#define LSR_PE 0x04 /* Parity error */
#define LSR_OE 0x02 /* Overrun, lost incoming byte */
#define LSR_RXRDY 0x01 /* Byte ready in Receive Buffer */
#define LSR_RCV_MASK 0x1f /* Mask for incoming data or error */
static void
ar5315_putc(dev_t dev, int c)
{
unsigned char lsr = 0;
while (!(lsr & LSR_TXRDY)) {
lsr = INB(LSR);
}
OUTB(THR, (char)c);
}
static int
ar5315_getc(dev_t dev)
{
unsigned char lsr = 0, dat;
while (!(lsr & LSR_RXRDY)) {
lsr = INB(LSR);
}
dat = INB(RHR);
return (dat);
}
static void
ar5315_flush(dev_t dev)
{
unsigned char lsr = 0;
while (!(lsr & LSR_TSRE)) {
lsr = INB(LSR);
}
}
void
ar531x_early_console(void)
{
static struct consdev promcn = {
.cn_probe = NULL,
.cn_init = NULL,
.cn_getc = ar5315_getc,
.cn_putc = ar5315_putc,
.cn_pollc = nullcnpollc,
.cn_bell = NULL,
.cn_halt = NULL,
.cn_flush = ar5315_flush,
.cn_dev = makedev(0, 0),
.cn_pri = CN_DEAD,
};
cn_tab = &promcn;
}

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/* $Id: ar5315_intr.c,v 1.1 2006/09/26 06:37:32 gdamore Exp $ */
/*
* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
* Copyright (c) 2006 Garrett D'Amore.
* All rights reserved.
*
* This code was written by Garrett D'Amore for the Champaign-Urbana
* Community Wireless Network Project.
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* 3. All advertising materials mentioning features or use of this
* software must display the following acknowledgements:
* This product includes software developed by the Urbana-Champaign
* Independent Media Center.
* This product includes software developed by Garrett D'Amore.
* 4. Urbana-Champaign Independent Media Center's name and Garrett
* D'Amore's name may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
* MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
* MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: ar5315_intr.c,v 1.1 2006/09/26 06:37:32 gdamore Exp $");
#include <sys/param.h>
#include <sys/queue.h>
#include <sys/malloc.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/kernel.h>
#include <machine/bus.h>
#include <machine/intr.h>
#include <mips/locore.h>
#include <mips/atheros/include/ar5315reg.h>
#include <mips/atheros/include/ar531xvar.h>
/*
* Here's a little tidbit that can only be gleaned from Linux sources.
*
* IP2: (INT0) MISC
* IP3: (INT1) WLAN0
* IP4: (INT2) ENET0
* IP7: (INT5) CPU CLOCK
*
* Only MISC interrupts are easily masked at the interrupt controller.
* The others have to be masked at the source.
*/
#define REGVAL(x) *((volatile uint32_t *)(MIPS_PHYS_TO_KSEG1((x))))
#define GETREG(x) REGVAL((x) + AR5315_SYSREG_BASE)
#define PUTREG(x,v) (REGVAL((x) + AR5315_SYSREG_BASE)) = (v)
#define NINTRS 3 /* MIPS INT2-INT4 (7 is clock interrupt) */
#define NIRQS 9 /* bits in Miscellaneous Interrupt Status Register */
struct ar531x_intrhand {
LIST_ENTRY(ar531x_intrhand) ih_q;
int (*ih_func)(void *);
void *ih_arg;
int ih_irq;
};
struct ar531x_intr {
LIST_HEAD(, ar531x_intrhand) intr_l;
struct evcnt intr_count;
};
const uint32_t ipl_sr_bits[_IPL_N] = {
0, /* 0: IPL_NONE */
MIPS_SOFT_INT_MASK_0, /* 1: IPL_SOFT */
MIPS_SOFT_INT_MASK_0, /* 2: IPL_SOFTCLOCK */
MIPS_SOFT_INT_MASK_0, /* 3: IPL_SOFTNET */
MIPS_SOFT_INT_MASK_0, /* 4: IPL_SOFTSERIAL */
MIPS_SOFT_INT_MASK_0 |
MIPS_SOFT_INT_MASK_1 |
MIPS_INT_MASK_0 |
MIPS_INT_MASK_1 |
MIPS_INT_MASK_2, /* 5: IPL_BIO */
MIPS_SOFT_INT_MASK_0 |
MIPS_SOFT_INT_MASK_1 |
MIPS_INT_MASK_0 |
MIPS_INT_MASK_1 |
MIPS_INT_MASK_2, /* 6: IPL_NET */
MIPS_SOFT_INT_MASK_0 |
MIPS_SOFT_INT_MASK_1 |
MIPS_INT_MASK_0 |
MIPS_INT_MASK_1 |
MIPS_INT_MASK_2, /* 7: IPL_{SERIAL,TTY} */
MIPS_INT_MASK, /* 8: IPL_{CLOCK,HIGH} */
};
const uint32_t mips_ipl_si_to_sr[_IPL_NSOFT] = {
MIPS_SOFT_INT_MASK_0, /* IPL_SOFT */
MIPS_SOFT_INT_MASK_0, /* IPL_SOFTCLOCK */
MIPS_SOFT_INT_MASK_0, /* IPL_SOFTNET */
MIPS_SOFT_INT_MASK_0, /* IPL_SOFTSERIAL */
};
static const char *ar5315_cpuintrnames[NINTRS] = {
"int 2 (misc)",
"int 3 (wlan)",
"int 4 (enet)",
};
static const char *ar5315_miscintrnames[NIRQS] = {
"misc 0 (uart)",
"misc 1 (i2c)",
"misc 2 (spi)",
"misc 3 (ahb error)",
"misc 4 (apb error)",
"misc 5 (timer)",
"misc 6 (gpio)",
"misc 7 (watchdog)",
"misc 8 (ir)"
};
static struct ar531x_intr ar5315_cpuintrs[NINTRS];
static struct ar531x_intr ar5315_miscintrs[NIRQS];
static int ar531x_miscintr(void *);
void
ar531x_intr_init(void)
{
int i;
for (i = 0; i < NINTRS; i++) {
LIST_INIT(&ar5315_cpuintrs[i].intr_l);
evcnt_attach_dynamic(&ar5315_cpuintrs[i].intr_count,
EVCNT_TYPE_INTR, NULL, "mips", ar5315_cpuintrnames[i]);
}
for (i = 0; i < NIRQS; i++) {
LIST_INIT(&ar5315_miscintrs[i].intr_l);
evcnt_attach_dynamic(&ar5315_miscintrs[i].intr_count,
EVCNT_TYPE_INTR, NULL, "ar5315", ar5315_miscintrnames[i]);
}
/* make sure we start without any misc interrupts enabled */
GETREG(AR5315_SYSREG_ISR);
PUTREG(AR5315_SYSREG_IMR, 0);
/* make sure we register the MISC interrupt handler */
ar531x_cpu_intr_establish(AR5315_CPU_IRQ_MISC, ar531x_miscintr, NULL);
}
void *
ar531x_cpu_intr_establish(int intr, int (*func)(void *), void *arg)
{
struct ar531x_intrhand *ih;
int s;
if ((ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT)) == NULL)
return NULL;
ih->ih_func = func;
ih->ih_arg = arg;
ih->ih_irq = intr;
if (ih == NULL)
return NULL;
s = splhigh();
LIST_INSERT_HEAD(&ar5315_cpuintrs[intr].intr_l, ih, ih_q);
/*
* The MIPS CPU interrupts are enabled at boot time, so they
* should pretty much always be ready to go.
*/
splx(s);
return (ih);
}
void
ar531x_cpu_intr_disestablish(void *arg)
{
struct ar531x_intrhand *ih = arg;
int s;
s = splhigh();
LIST_REMOVE(ih, ih_q);
splx(s);
free(ih, M_DEVBUF);
}
void *
ar531x_misc_intr_establish(int irq, int (*func)(void *), void *arg)
{
struct ar531x_intrhand *ih;
int first;
int s;
if ((ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT)) == NULL)
return NULL;
ih->ih_func = func;
ih->ih_arg = arg;
ih->ih_irq = irq;
if (ih == NULL)
return NULL;
s = splhigh();
first = LIST_EMPTY(&ar5315_miscintrs[irq].intr_l);
LIST_INSERT_HEAD(&ar5315_miscintrs[irq].intr_l, ih, ih_q);
if (first) {
uint32_t mask;
mask = GETREG(AR5315_SYSREG_IMR);
mask |= (1 << irq);
PUTREG(AR5315_SYSREG_IMR, mask);
GETREG(AR5315_SYSREG_IMR); /* flush wbuffer */
}
splx(s);
return ih;
}
void
ar531x_misc_intr_disestablish(void *arg)
{
struct ar531x_intrhand *ih = arg;
int s;
s = splhigh();
LIST_REMOVE(ih, ih_q);
if (LIST_EMPTY(&ar5315_miscintrs[ih->ih_irq].intr_l)) {
uint32_t mask;
mask = GETREG(AR5315_SYSREG_ISR);
mask &= ~(1 << ih->ih_irq);
PUTREG(AR5315_SYSREG_IMR, mask);
GETREG(AR5315_SYSREG_IMR); /* flush wbuffer */
}
splx(s);
free(ih, M_DEVBUF);
}
int
ar531x_miscintr(void *arg)
{
uint32_t isr;
int mask;
int index;
int rv = 0;
struct ar531x_intrhand *ih;
isr = GETREG(AR5315_SYSREG_ISR);
mask = GETREG(AR5315_SYSREG_IMR);
for (index = 0; index < NIRQS; index++) {
if (isr & mask & (1 << index)) {
ar5315_miscintrs[index].intr_count.ev_count++;
LIST_FOREACH(ih, &ar5315_miscintrs[index].intr_l, ih_q)
rv |= (*ih->ih_func)(ih->ih_arg);
}
}
return rv;
}
void
ar531x_cpuintr(uint32_t status, uint32_t cause, uint32_t pc, uint32_t ipending)
{
uint32_t mask;
int index;
struct ar531x_intrhand *ih;
/* all others get normal handling */
for (index = NINTRS - 1; index >= 0; index--) {
mask = MIPS_INT_MASK_0 << index;
if (ipending & mask) {
ar5315_cpuintrs[index].intr_count.ev_count++;
LIST_FOREACH(ih, &ar5315_cpuintrs[index].intr_l, ih_q)
(*ih->ih_func)(ih->ih_arg);
cause &= ~mask;
}
}
/* re-enable the stuff we processed */
_splset(MIPS_SR_INT_IE | ((status & ~cause) & MIPS_HARD_INT_MASK));
}

View File

@ -1,4 +1,4 @@
/* $NetBSD: if_ath_arbus.c,v 1.7 2006/09/04 05:17:26 gdamore Exp $ */
/* $NetBSD: if_ath_arbus.c,v 1.8 2006/09/26 06:37:32 gdamore Exp $ */
/*-
* Copyright (c) 2006 Jared D. McNeill <jmcneill@invisible.ca>
@ -34,10 +34,11 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: if_ath_arbus.c,v 1.7 2006/09/04 05:17:26 gdamore Exp $");
__KERNEL_RCSID(0, "$NetBSD: if_ath_arbus.c,v 1.8 2006/09/26 06:37:32 gdamore Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/mbuf.h>
#include <sys/malloc.h>
#include <sys/kernel.h>
@ -58,7 +59,6 @@ __KERNEL_RCSID(0, "$NetBSD: if_ath_arbus.c,v 1.7 2006/09/04 05:17:26 gdamore Exp
#include <net80211/ieee80211_netbsd.h>
#include <net80211/ieee80211_var.h>
#include <mips/atheros/include/ar5312reg.h>
#include <mips/atheros/include/ar531xvar.h>
#include <mips/atheros/include/arbusvar.h>
@ -66,6 +66,7 @@ __KERNEL_RCSID(0, "$NetBSD: if_ath_arbus.c,v 1.7 2006/09/04 05:17:26 gdamore Exp
#include <dev/ic/ath_netbsd.h>
#include <dev/ic/athvar.h>
#include <contrib/dev/ath/ah.h>
#include <contrib/dev/ath/ah_soc.h> /* XXX really doesn't belong in hal */
struct ath_arbus_softc {
struct ath_softc sc_ath;
@ -103,16 +104,23 @@ ath_arbus_attach(struct device *parent, struct device *self, void *opaque)
struct ath_softc *sc;
struct arbus_attach_args *aa;
const char *name;
prop_number_t prop;
int rv;
uint16_t devid;
uint32_t rev;
asc = (struct ath_arbus_softc *)self;
sc = &asc->sc_ath;
aa = (struct arbus_attach_args *)opaque;
rev = GETSYSREG(AR5312_SYSREG_REVISION);
devid = AR5312_REVISION_WMAC(rev);
prop = prop_dictionary_get(device_properties(&sc->sc_dev),
"wmac-rev");
if (prop == NULL) {
printf(": unable to get wmac-rev property\n");
return;
}
KDASSERT(prop_object_type(prop) == PROP_TYPE_NUMBER);
devid = (uint16_t)prop_number_integer_value(prop);
name = ath_hal_probe(PCI_VENDOR_ATHEROS, devid);
printf(": %s\n", name ? name : "Unknown AR531X WLAN");

View File

@ -0,0 +1,204 @@
/* $Id: ar5315reg.h,v 1.1 2006/09/26 06:37:32 gdamore Exp $ */
/*
* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
* Copyright (c) 2006 Garrett D'Amore.
* All rights reserved.
*
* This code was written by Garrett D'Amore for the Champaign-Urbana
* Community Wireless Network Project.
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* 3. All advertising materials mentioning features or use of this
* software must display the following acknowledgements:
* This product includes software developed by the Urbana-Champaign
* Independent Media Center.
* This product includes software developed by Garrett D'Amore.
* 4. Urbana-Champaign Independent Media Center's name and Garrett
* D'Amore's name may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
* MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
* MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _MIPS_ATHEROS_AR5315REG_H_
#define _MIPS_ATHEROS_AR5315REG_H_
#define AR5315_MEM0_BASE 0x00000000 /* sdram */
#define AR5315_MEM1_BASE 0x08000000 /* spi flash */
#define AR5315_WLAN_BASE 0x10000000
#define AR5315_PCI_BASE 0x10100000
#define AR5315_SDRAMCTL_BASE 0x10300000
#define AR5315_LOCAL_BASE 0x10400000 /* local bus */
#define AR5315_ENET_BASE 0x10500000
#define AR5315_SYSREG_BASE 0x11000000
#define AR5315_UART_BASE 0x11100000
#define AR5315_SPI_BASE 0x11300000 /* spi flash */
#define AR5315_BOOTROM_BASE 0x1FC00000 /* boot rom */
#define AR5315_CONFIG_BASE 0x087D0000 /* flash start */
#define AR5315_CONFIG_END 0x087FF000 /* flash end */
#define AR5315_RADIO_END 0x1FFFF000 /* radio end */
#if 0
#define AR5315_PCIEXT_BASE 0x80000000 /* pci external */
#define AR5315_RAM2_BASE 0xc0000000
#define AR5315_RAM3_BASE 0xe0000000
#endif
/*
* SYSREG registers -- offset relative to AR531X_SYSREG_BASE
*/
#define AR5315_SYSREG_COLDRESET 0x0000
#define AR5315_SYSREG_RESETCTL 0x0004
#define AR5315_SYSREG_AHB_ARB_CTL 0x0008
#define AR5315_SYSREG_ENDIAN 0x000c
#define AR5315_SYSREG_SREV 0x0014
#define AR5315_SYSREG_ISR 0x0020
#define AR5315_SYSREG_IMR 0x0024
#define AR5315_SYSREG_GISR 0x0028
#define AR5315_SYSREG_WDOG_TIMER 0x0038
#define AR5315_SYSREG_WDOG_CTL 0x003c
#define AR5315_SYSREG_AHB_ERR0 0x0050
#define AR5315_SYSREG_AHB_ERR1 0x0054
#define AR5315_SYSREG_AHB_ERR2 0x0058
#define AR5315_SYSREG_AHB_ERR3 0x005c
#define AR5315_SYSREG_AHB_ERR4 0x0060
#define AR5315_SYSREG_PLLC_CTL 0x0064
#define AR5315_SYSREG_PLLV_CTL 0x0068
#define AR5315_SYSREG_CPUCLK 0x006c
#define AR5315_SYSREG_AMBACLK 0x0070
/* Cold resets (AR5315_SYSREG_COLDRESET) */
#define AR5315_COLD_AHB 0x00000001
#define AR5315_COLD_APB 0x00000002
#define AR5315_COLD_CPU 0x00000004
#define AR5315_COLD_CPU_WARM 0x00000008
/* Resets (AR5315_SYSREG_RESETCTL) */
#define AR5315_RESET_WARM_WLAN0_MAC 0x00000001
#define AR5315_RESET_WARM_WLAN0_BB 0x00000002
#define AR5315_RESET_MPEGTS 0x00000004 /* MPEG-TS */
#define AR5315_RESET_PCIDMA 0x00000008 /* PCI dma */
#define AR5315_RESET_MEMCTL 0x00000010
#define AR5315_RESET_LOCAL 0x00000020 /* local bus */
#define AR5315_RESET_I2C 0x00000040 /* i2c */
#define AR5315_RESET_SPI 0x00000080 /* SPI */
#define AR5315_RESET_UART 0x00000100
#define AR5315_RESET_IR 0x00000200 /* infrared */
#define AR5315_RESET_PHY0 0x00000400 /* enet phy */
#define AR5315_RESET_ENET0 0x00000800
/* Watchdog control (AR5315_SYSREG_WDOG_CTL) */
#define AR5315_WDOG_CTL_IGNORE 0x0000
#define AR5315_WDOG_CTL_NMI 0x0001
#define AR5315_WDOG_CTL_RESET 0x0002
/* AR5315 AHB arbitration control (AR5315_SYSREG_AHB_ARB_CTL) */
#define AR5315_ARB_CPU 0x00001
#define AR5315_ARB_WLAN 0x00002
#define AR5315_ARB_MPEGTS 0x00004
#define AR5315_ARB_LOCAL 0x00008
#define AR5315_ARB_PCI 0x00010
#define AR5315_ARB_ENET 0x00020
#define AR5315_ARB_RETRY 0x00100
/* AR5315 endianness control (AR5315_SYSREG_ENDIAN) */
#define AR5315_ENDIAN_AHB 0x00001
#define AR5315_ENDIAN_WLAN 0x00002
#define AR5315_ENDIAN_MPEGTS 0x00004
#define AR5315_ENDIAN_PCI 0x00008
#define AR5315_ENDIAN_MEMCTL 0x00010
#define AR5315_ENDIAN_LOCAL 0x00020
#define AR5315_ENDIAN_ENET 0x00040
#define AR5315_ENDIAN_MERGE 0x00200
#define AR5315_ENDIAN_CPU 0x00400
#define AR5315_ENDIAN_PCIAHB 0x00800
#define AR5315_ENDIAN_PCIAHB_BRIDGE 0x01000
#define AR5315_ENDIAN_SPI 0x08000
#define AR5315_ENDIAN_CPU_DRAM 0x10000
#define AR5315_ENDIAN_CPU_PCI 0x20000
#define AR5315_ENDIAN_CPU_MMR 0x40000
/* AR5315 AHB error bits */
#define AR5315_AHB_ERROR_DET 1 /* error detected */
#define AR5315_AHB_ERROR_OVR 2 /* AHB overflow */
#define AR5315_AHB_ERROR_WDT 4 /* wdt (not hresp) */
/* AR5315 clocks */
#define AR5315_PLLC_REF_DIV(reg) ((reg) & 0x3)
#define AR5315_PLLC_FB_DIV(reg) (((reg) & 0x7c) >> 2)
#define AR5315_PLLC_DIV_2(reg) (((reg) & 0x80) >> 7)
#define AR5315_PLLC_CLKC(reg) (((reg) & 0x1c000) >> 14)
#define AR5315_PLLC_CLKM(reg) (((reg) & 0x700000) >> 20)
#define AR5315_CLOCKCTL_SELECT(reg) ((reg) & 0x3)
#define AR5315_CLOCKCTL_DIV(reg) (((reg) & 0xc) >> 2)
/*
* SDRAMCTL registers -- offset relative to SDRAMCTL
*/
#define AR531X_SDRAMCTL_MEM_CFG0 0x0000
#define AR531X_SDRAMCTL_MEM_CFG1 0x0004
/* memory config 1 bits */
#define AR531X_MEM_CFG1_BANK0_MASK 0x00000700
#define AR531X_MEM_CFG1_BANK0_SHIFT 8
#define AR531X_MEM_CFG1_BANK1_MASK 0x00007000
#define AR531X_MEM_CFG1_BANK1_SHIFT 12
/*
* PCI configuration stuff. I don't pretend to fully understand these
* registers, they seem to be magic numbers in the Linux code.
*/
#define AR5315_PCI_MAC_RC 0x4000
#define AR5315_PCI_MAC_SCR 0x4004
#define AR5315_PCI_MAC_INTPEND 0x4008
#define AR5315_PCI_MAC_SFR 0x400c
#define AR5315_PCI_MAC_PCICFG 0x4010
#define AR5315_PCI_MAC_SREV 0x4020
#define PCI_MAC_RC_MAC 0x1
#define PCI_MAC_RC_BB 0x2
#define PCI_MAC_SCR_SLM_MASK 0x00030000
#define PCI_MAC_SCR_SLM_FWAKE 0x00000000
#define PCI_MAC_SCR_SLM_FSLEEP 0x00010000
#define PCI_MAC_SCR_SLM_NORMAL 0x00020000
#define PCI_MAC_PCICFG_SPWR_DN 0x00010000
/* IRQS */
#define AR5315_CPU_IRQ_MISC 0
#define AR5315_CPU_IRQ_WLAN 1
#define AR5315_CPU_IRQ_ENET 2
#define AR5315_MISC_IRQ_UART 0
#define AR5315_MISC_IRQ_I2C 1
#define AR5315_MISC_IRQ_SPI 2
#define AR5315_MISC_IRQ_AHBE 3
#define AR5315_MISC_IRQ_AHPE 4
#define AR5315_MISC_IRQ_TIMER 5
#define AR5315_MISC_IRQ_GPIO 6
#define AR5315_MISC_IRQ_WDOG 7
#define AR5315_MISC_IRQ_IR 8
#endif /* _MIPS_ATHEROS_AR531XREG_H_ */

View File

@ -1,4 +1,4 @@
/* $Id: ar531xvar.h,v 1.4 2006/09/04 05:17:26 gdamore Exp $ */
/* $Id: ar531xvar.h,v 1.5 2006/09/26 06:37:32 gdamore Exp $ */
/*
* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
* Copyright (c) 2006 Garrett D'Amore.
@ -82,6 +82,7 @@ uint32_t ar531x_bus_freq(void);
void ar531x_device_register(struct device *, void *);
int ar531x_enable_device(const struct ar531x_device *);
const struct ar531x_device *ar531x_get_devices(void);
void ar531x_early_console(void);
/*
* Board specific things.

View File

@ -1,13 +1,16 @@
# $NetBSD: files.atheros,v 1.6 2006/09/04 05:17:26 gdamore Exp $
# $NetBSD: files.atheros,v 1.7 2006/09/26 06:37:32 gdamore Exp $
defflag opt_wisoc.h WISOC_AR5312
WISOC_AR5315
file arch/mips/atheros/ar5312.c wisoc_ar5312
file arch/mips/atheros/ar5312_board.c wisoc_ar5312
file arch/mips/atheros/ar5312_console.c wisoc_ar5312
file arch/mips/atheros/ar5312_intr.c wisoc_ar5312
file arch/mips/atheros/ar531x_board.c wisoc_ar5312
file arch/mips/atheros/ar5315.c wisoc_ar5315
file arch/mips/atheros/ar5315_board.c wisoc_ar5315
file arch/mips/atheros/ar5315_console.c wisoc_ar5315
file arch/mips/atheros/ar5315_intr.c wisoc_ar5315
# Atheros system bus