Adopt as standard, the instruction sequence for storing the trapframe that
includes the workaround from the SA110 STM^ bug. This allows one piece of code to be used to store the trapframe on all CPU types.
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e626201c12
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@ -1,7 +1,7 @@
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/* $NetBSD: exception.S,v 1.8 1996/11/23 04:02:40 mark Exp $ */
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/* $NetBSD: exception.S,v 1.9 1997/02/04 06:49:08 mark Exp $ */
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/*
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* Copyright (c) 1994-1996 Mark Brinicombe.
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* Copyright (c) 1994-1997 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* Since the current mode is used, the SVC R14 field is not defined.
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*/
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#ifdef CPU_SA110
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#if 1
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#define PUSHFRAME \
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str lr, [sp, #-4]!; /* Push the return address */ \
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* R14 in SVC mode.
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*/
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#ifdef CPU_SA110
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#if 1
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#define PUSHFRAMEINSVC \
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stmdb sp, {r0-r3}; /* Save 4 registers */ \
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@ -1,7 +1,7 @@
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/* $NetBSD: irq.S,v 1.11 1997/01/06 02:35:46 mark Exp $ */
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/* $NetBSD: irq.S,v 1.12 1997/02/04 06:49:09 mark Exp $ */
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/*
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* Copyright (c) 1994-1996 Mark Brinicombe.
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* Copyright (c) 1994-1997 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* R14 in SVC mode.
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*/
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#ifdef CPU_SA110
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#if 1
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#define PUSHFRAMEINSVC \
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stmdb sp, {r0-r3}; /* Save 4 registers */ \
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@ -1,7 +1,7 @@
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/* $NetBSD: locore.S,v 1.16 1997/01/06 02:15:17 mark Exp $ */
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/* $NetBSD: locore.S,v 1.17 1997/02/04 06:49:10 mark Exp $ */
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/*
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* Copyright (C) 1994 Mark Brinicombe
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* Copyright (C) 1994-1997 Mark Brinicombe
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* Copyright (C) 1994 Brini
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* All rights reserved.
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*
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@ -42,7 +42,7 @@
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#define INIT_ARM_STACK_SIZE 2048
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#ifdef CPU_SA110
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#if 1
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#define PUSHFRAME \
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str lr, [sp, #-4]!; /* Push the return address */ \
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@ -1,7 +1,7 @@
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/* $NetBSD: iomd_irq.S,v 1.11 1997/01/06 02:35:46 mark Exp $ */
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/* $NetBSD: iomd_irq.S,v 1.12 1997/02/04 06:49:09 mark Exp $ */
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/*
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* Copyright (c) 1994-1996 Mark Brinicombe.
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* Copyright (c) 1994-1997 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* R14 in SVC mode.
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*/
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#ifdef CPU_SA110
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#if 1
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#define PUSHFRAMEINSVC \
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stmdb sp, {r0-r3}; /* Save 4 registers */ \
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