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As the detection of C1E is not entirely clear-cut, use rdmsr_safe()

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when reading the AMD "interrupt pending and CMP-halt register".
This commit is contained in:
jruoho 2011-09-24 10:59:02 +00:00
parent dfacc168e3
commit e514692ad1
1 changed files with 4 additions and 3 deletions
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7
sys/arch/x86/acpi/acpi_cpu_md.c
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@ -1,4 +1,4 @@
/* $NetBSD: acpi_cpu_md.c,v 1.64 2011/07/13 07:34:55 jruoho Exp $ */
/* $NetBSD: acpi_cpu_md.c,v 1.65 2011/09/24 10:59:02 jruoho Exp $ */
/*-
* Copyright (c) 2010, 2011 Jukka Ruohonen <jruohonen@iki.fi>
@ -27,7 +27,7 @@
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: acpi_cpu_md.c,v 1.64 2011/07/13 07:34:55 jruoho Exp $");
__KERNEL_RCSID(0, "$NetBSD: acpi_cpu_md.c,v 1.65 2011/09/24 10:59:02 jruoho Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@ -336,7 +336,8 @@ acpicpu_md_quirk_c1e(void)
const uint64_t c1e = MSR_CMPHALT_SMI | MSR_CMPHALT_C1E;
uint64_t val;
val = rdmsr(MSR_CMPHALT);
if (__predict_false(rdmsr_safe(MSR_CMPHALT, &val) == EFAULT))
return;
if ((val & c1e) != 0)
wrmsr(MSR_CMPHALT, val & ~c1e);