Various improvements to mvgbe(4). Notable is improved multicast filtering.
This commit is contained in:
jakllsch
parent
bb246152ed
commit
e43028272f
@ -1,4 +1,4 @@
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/* $NetBSD: if_mvgbe.c,v 1.4 2011/01/29 01:53:18 jakllsch Exp $ */
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/* $NetBSD: if_mvgbe.c,v 1.5 2011/02/01 23:40:12 jakllsch Exp $ */
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/*
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* Copyright (c) 2007, 2008 KIYOHARA Takashi
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* All rights reserved.
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@ -25,7 +25,7 @@
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_mvgbe.c,v 1.4 2011/01/29 01:53:18 jakllsch Exp $");
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__KERNEL_RCSID(0, "$NetBSD: if_mvgbe.c,v 1.5 2011/02/01 23:40:12 jakllsch Exp $");
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#include "rnd.h"
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@ -75,10 +75,10 @@ int mvgbe_debug = MVGBE_DEBUG;
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bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg))
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#define MVGBE_WRITE(sc, reg, val) \
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bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
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#define MVGBE_READ_FILTER(sc, reg) \
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bus_space_read_4((sc)->sc_iot, (sc)->sc_dafh, (reg))
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#define MVGBE_READ_FILTER(sc, reg, val, c) \
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bus_space_read_region_4((sc)->sc_iot, (sc)->sc_dafh, (reg), (val), (c))
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#define MVGBE_WRITE_FILTER(sc, reg, val, c) \
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bus_space_set_region_4((sc)->sc_iot, (sc)->sc_dafh, (reg), (val), (c))
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bus_space_write_region_4((sc)->sc_iot, (sc)->sc_dafh, (reg), (val), (c))
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#define MVGBE_TX_RING_CNT 256
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#define MVGBE_TX_RING_MSK (MVGBE_TX_RING_CNT - 1)
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@ -93,7 +93,7 @@ CTASSERT(MVGBE_RX_RING_CNT > 1 && MVGBE_RX_RING_NEXT(MVGBE_RX_RING_CNT) ==
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(MVGBE_RX_RING_CNT + 1) % MVGBE_RX_RING_CNT);
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#define MVGBE_JSLOTS 384 /* XXXX */
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#define MVGBE_JLEN (MVGBE_MRU + MVGBE_BUF_ALIGN)
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#define MVGBE_JLEN ((MVGBE_MRU + MVGBE_RXBUF_ALIGN)&~MVGBE_RXBUF_MASK)
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#define MVGBE_NTXSEG 30
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#define MVGBE_JPAGESZ PAGE_SIZE
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#define MVGBE_RESID \
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@ -249,9 +249,10 @@ static int mvgbe_init(struct ifnet *);
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static void mvgbe_stop(struct ifnet *, int);
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static void mvgbe_watchdog(struct ifnet *);
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/* MII funcstions */
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static int mvgbe_ifmedia_upd(struct ifnet *);
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static void mvgbe_ifmedia_sts(struct ifnet *, struct ifmediareq *);
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static int mvgbe_ifflags_cb(struct ethercom *);
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static int mvgbe_mediachange(struct ifnet *);
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static void mvgbe_mediastatus(struct ifnet *, struct ifmediareq *);
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static int mvgbe_init_rx_ring(struct mvgbe_softc *);
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static int mvgbe_init_tx_ring(struct mvgbe_softc *);
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@ -262,7 +263,8 @@ static void mvgbe_jfree(struct mbuf *, void *, size_t, void *);
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static int mvgbe_encap(struct mvgbe_softc *, struct mbuf *, uint32_t *);
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static void mvgbe_rxeof(struct mvgbe_softc *);
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static void mvgbe_txeof(struct mvgbe_softc *);
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static void mvgbe_setmulti(struct mvgbe_softc *);
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static uint8_t mvgbe_crc8(const uint8_t *, size_t);
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static void mvgbe_filter_setup(struct mvgbe_softc *);
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#ifdef MVGBE_DEBUG
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static void mvgbe_dump_txdesc(struct mvgbe_tx_desc *, int);
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#endif
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@ -697,17 +699,12 @@ mvgbe_attach(device_t parent, device_t self, void *aux)
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sc->sc_rdata = (struct mvgbe_ring_data *)kva;
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memset(sc->sc_rdata, 0, sizeof(struct mvgbe_ring_data));
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#if 0
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/*
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* We can support 802.1Q VLAN-sized frames and jumbo
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* Ethernet frames.
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*/
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sc->sc_ethercom.ec_capabilities |=
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ETHERCAP_VLAN_MTU | ETHERCAP_VLAN_HWTAGGING | ETHERCAP_JUMBO_MTU;
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#else
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/* XXXX: We don't know the usage of VLAN. */
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sc->sc_ethercom.ec_capabilities |= ETHERCAP_JUMBO_MTU;
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#endif
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ETHERCAP_VLAN_MTU | ETHERCAP_JUMBO_MTU;
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/* Try to allocate memory for jumbo buffers. */
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if (mvgbe_alloc_jumbo_mem(sc)) {
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@ -730,6 +727,10 @@ mvgbe_attach(device_t parent, device_t self, void *aux)
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IFCAP_CSUM_IPv4_Tx | IFCAP_CSUM_IPv4_Rx |
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IFCAP_CSUM_TCPv4_Tx | IFCAP_CSUM_TCPv4_Rx |
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IFCAP_CSUM_UDPv4_Tx | IFCAP_CSUM_UDPv4_Rx;
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/*
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* But, IPv6 packets in the stream can cause incorrect TCPv4 Tx sums.
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*/
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sc->sc_ethercom.ec_if.if_capabilities &= ~IFCAP_CSUM_TCPv4_Tx;
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IFQ_SET_MAXLEN(&ifp->if_snd, max(MVGBE_TX_RING_CNT - 1, IFQ_MAXLEN));
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IFQ_SET_READY(&ifp->if_snd);
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strcpy(ifp->if_xname, device_xname(sc->sc_dev));
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@ -746,7 +747,7 @@ mvgbe_attach(device_t parent, device_t self, void *aux)
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sc->sc_ethercom.ec_mii = &sc->sc_mii;
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ifmedia_init(&sc->sc_mii.mii_media, 0,
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mvgbe_ifmedia_upd, mvgbe_ifmedia_sts);
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mvgbe_mediachange, mvgbe_mediastatus);
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mii_attach(self, &sc->sc_mii, 0xffffffff,
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MII_PHY_ANY, MII_OFFSET_ANY, 0);
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if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
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@ -763,6 +764,7 @@ mvgbe_attach(device_t parent, device_t self, void *aux)
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if_attach(ifp);
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ether_ifattach(ifp, sc->sc_enaddr);
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ether_set_ifflags_cb(&sc->sc_ethercom, mvgbe_ifflags_cb);
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#if NRND > 0
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rnd_attach_source(&sc->sc_rnd_source, device_xname(sc->sc_dev),
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@ -898,42 +900,26 @@ mvgbe_start(struct ifnet *ifp)
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}
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static int
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mvgbe_ioctl(struct ifnet *ifp, u_long command, void *data)
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mvgbe_ioctl(struct ifnet *ifp, u_long cmd, void *data)
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{
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struct mvgbe_softc *sc = ifp->if_softc;
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struct ifreq *ifr = data;
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struct mii_data *mii;
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int s, error = 0;
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s = splnet();
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switch (command) {
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case SIOCSIFFLAGS:
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DPRINTFN(2, ("mvgbe_ioctl IFFLAGS\n"));
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if (ifp->if_flags & IFF_UP)
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mvgbe_init(ifp);
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else
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if (ifp->if_flags & IFF_RUNNING)
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mvgbe_stop(ifp, 0);
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sc->sc_if_flags = ifp->if_flags;
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error = 0;
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break;
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switch (cmd) {
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case SIOCGIFMEDIA:
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case SIOCSIFMEDIA:
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DPRINTFN(2, ("mvgbe_ioctl MEDIA\n"));
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mii = &sc->sc_mii;
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error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
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error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
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break;
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default:
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DPRINTFN(2, ("mvgbe_ioctl ETHER\n"));
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error = ether_ioctl(ifp, command, data);
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error = ether_ioctl(ifp, cmd, data);
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if (error == ENETRESET) {
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if (ifp->if_flags & IFF_RUNNING) {
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mvgbe_setmulti(sc);
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DPRINTFN(2,
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("mvgbe_ioctl setmulti called\n"));
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mvgbe_filter_setup(sc);
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}
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error = 0;
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}
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@ -945,6 +931,9 @@ mvgbe_ioctl(struct ifnet *ifp, u_long command, void *data)
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return error;
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}
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int mvgbe_rximt = 0;
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int mvgbe_tximt = 0;
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static int
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mvgbe_init(struct ifnet *ifp)
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{
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@ -952,17 +941,10 @@ mvgbe_init(struct ifnet *ifp)
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struct mvgbec_softc *csc = device_private(device_parent(sc->sc_dev));
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struct mii_data *mii = &sc->sc_mii;
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uint32_t reg;
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int i, s;
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int i;
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DPRINTFN(2, ("mvgbe_init\n"));
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s = splnet();
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if (ifp->if_flags & IFF_RUNNING) {
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splx(s);
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return 0;
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}
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/* Cancel pending I/O and free all RX/TX buffers. */
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mvgbe_stop(ifp, 0);
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@ -974,13 +956,11 @@ mvgbe_init(struct ifnet *ifp)
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if (mvgbe_init_tx_ring(sc) == ENOBUFS) {
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aprint_error_ifnet(ifp,
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"initialization failed: no memory for tx buffers\n");
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splx(s);
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return ENOBUFS;
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}
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if (mvgbe_init_rx_ring(sc) == ENOBUFS) {
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aprint_error_ifnet(ifp,
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"initialization failed: no memory for rx buffers\n");
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splx(s);
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return ENOBUFS;
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}
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@ -988,7 +968,7 @@ mvgbe_init(struct ifnet *ifp)
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MVGBE_PSC_ANFC | /* Enable Auto-Neg Flow Ctrl */
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MVGBE_PSC_RESERVED | /* Must be set to 1 */
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MVGBE_PSC_FLFAIL | /* Do NOT Force Link Fail */
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MVGBE_PSC_MRU(MVGBE_PSC_MRU_9700) | /* Always 9700 OK */
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MVGBE_PSC_MRU(MVGBE_PSC_MRU_9022) | /* we want 9k */
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MVGBE_PSC_SETFULLDX); /* Set_FullDx */
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/* XXXX: mvgbe(4) always use RGMII. */
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MVGBE_WRITE(sc, MVGBE_PSC1,
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@ -1026,7 +1006,11 @@ mvgbe_init(struct ifnet *ifp)
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MVGBE_SDC_BLMR | /* Big/Little Endian Receive Mode: No swap */
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MVGBE_SDC_BLMT | /* Big/Little Endian Transmit Mode: No swap */
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#endif
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MVGBE_SDC_IPGINTRX(mvgbe_rximt) |
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MVGBE_SDC_TXBSZ_16_64BITWORDS);
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MVGBE_WRITE(sc, MVGBE_PTFUT, MVGBE_PTFUT_IPGINTTX(mvgbe_tximt));
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mvgbe_filter_setup(sc);
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mii_mediachg(mii);
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@ -1056,8 +1040,6 @@ mvgbe_init(struct ifnet *ifp)
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ifp->if_flags |= IFF_RUNNING;
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ifp->if_flags &= ~IFF_OACTIVE;
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splx(s);
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return 0;
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}
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@ -1178,30 +1160,41 @@ mvgbe_watchdog(struct ifnet *ifp)
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}
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}
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static int
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mvgbe_ifflags_cb(struct ethercom *ec)
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{
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struct ifnet *ifp = &ec->ec_if;
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struct mvgbe_softc *sc = ifp->if_softc;
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int change = ifp->if_flags ^ sc->sc_if_flags;
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if (change != 0)
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sc->sc_if_flags = ifp->if_flags;
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if ((change & ~(IFF_CANTCHANGE|IFF_DEBUG)) != 0)
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return ENETRESET;
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if ((change & IFF_PROMISC) != 0)
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mvgbe_filter_setup(sc);
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return 0;
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}
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/*
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* Set media options.
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*/
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static int
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mvgbe_ifmedia_upd(struct ifnet *ifp)
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mvgbe_mediachange(struct ifnet *ifp)
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{
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struct mvgbe_softc *sc = ifp->if_softc;
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mii_mediachg(&sc->sc_mii);
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return 0;
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return ether_mediachange(ifp);
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}
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/*
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* Report current media status.
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*/
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static void
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mvgbe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
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mvgbe_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
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{
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struct mvgbe_softc *sc = ifp->if_softc;
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mii_pollstat(&sc->sc_mii);
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ifmr->ifm_active = sc->sc_mii.mii_media_active;
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ifmr->ifm_status = sc->sc_mii.mii_media_status;
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ether_mediastatus(ifp, ifmr);
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}
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@ -1212,7 +1205,7 @@ mvgbe_init_rx_ring(struct mvgbe_softc *sc)
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struct mvgbe_ring_data *rd = sc->sc_rdata;
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int i;
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bzero((char *)rd->mvgbe_rx_ring,
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memset(rd->mvgbe_rx_ring, 0,
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sizeof(struct mvgbe_rx_desc) * MVGBE_RX_RING_CNT);
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for (i = 0; i < MVGBE_RX_RING_CNT; i++) {
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@ -1252,7 +1245,7 @@ mvgbe_init_tx_ring(struct mvgbe_softc *sc)
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struct mvgbe_ring_data *rd = sc->sc_rdata;
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int i;
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bzero((char *)sc->sc_rdata->mvgbe_tx_ring,
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memset(sc->sc_rdata->mvgbe_tx_ring, 0,
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sizeof(struct mvgbe_tx_desc) * MVGBE_TX_RING_CNT);
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for (i = 0; i < MVGBE_TX_RING_CNT; i++) {
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@ -1323,16 +1316,18 @@ mvgbe_newbuf(struct mvgbe_softc *sc, int i, struct mbuf *m,
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m_new->m_len = m_new->m_pkthdr.len = MVGBE_JLEN;
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m_new->m_data = m_new->m_ext.ext_buf;
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}
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align = (u_long)m_new->m_data & MVGBE_BUF_MASK;
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if (align != 0)
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m_adj(m_new, MVGBE_BUF_ALIGN - align);
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align = (u_long)m_new->m_data & MVGBE_RXBUF_MASK;
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if (align != 0) {
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DPRINTFN(1,("align = %d\n", align));
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m_adj(m_new, MVGBE_RXBUF_ALIGN - align);
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}
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c = &sc->sc_cdata.mvgbe_rx_chain[i];
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r = c->mvgbe_desc;
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c->mvgbe_mbuf = m_new;
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r->bufptr = dmamap->dm_segs[0].ds_addr +
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(((vaddr_t)m_new->m_data - (vaddr_t)sc->sc_cdata.mvgbe_jumbo_buf));
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r->bufsize = MVGBE_JLEN & ~MVGBE_BUF_MASK;
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r->bufsize = MVGBE_JLEN & ~MVGBE_RXBUF_MASK;
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r->cmdsts = MVGBE_BUFFER_OWNED_BY_DMA | MVGBE_RX_ENABLE_INTERRUPT;
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MVGBE_CDRXSYNC(sc, i, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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@ -1388,7 +1383,7 @@ mvgbe_alloc_jumbo_mem(struct mvgbe_softc *sc)
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state = 4;
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sc->sc_cdata.mvgbe_jumbo_buf = (void *)kva;
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DPRINTFN(1,("mvgbe_jumbo_buf = 0x%p\n", sc->sc_cdata.mvgbe_jumbo_buf));
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DPRINTFN(1,("mvgbe_jumbo_buf = %p\n", sc->sc_cdata.mvgbe_jumbo_buf));
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LIST_INIT(&sc->sc_jfree_listhead);
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LIST_INIT(&sc->sc_jinuse_listhead);
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@ -1680,22 +1675,26 @@ mvgbe_rxeof(struct mvgbe_softc *sc)
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continue;
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}
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if (total_len > MVGBE_RX_CSUM_MIN_BYTE) {
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/* Check IP header checksum */
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if (rxstat & MVGBE_RX_IP_FRAME_TYPE) {
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m->m_pkthdr.csum_flags |= M_CSUM_IPv4;
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if (!(rxstat & MVGBE_RX_IP_HEADER_OK))
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m->m_pkthdr.csum_flags |=
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M_CSUM_IPv4_BAD;
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}
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/* Check TCP/UDP checksum */
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if (rxstat & MVGBE_RX_L4_TYPE_TCP)
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if (total_len <= MVGBE_RX_CSUM_MIN_BYTE) /* XXX documented? */
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goto sw_csum;
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if (rxstat & MVGBE_RX_IP_FRAME_TYPE) {
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/* Check IPv4 header checksum */
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m->m_pkthdr.csum_flags |= M_CSUM_IPv4;
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if (!(rxstat & MVGBE_RX_IP_HEADER_OK))
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m->m_pkthdr.csum_flags |=
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M_CSUM_IPv4_BAD;
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/* Check TCPv4/UDPv4 checksum */
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if ((rxstat & MVGBE_RX_L4_TYPE_MASK) ==
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MVGBE_RX_L4_TYPE_TCP)
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m->m_pkthdr.csum_flags |= M_CSUM_TCPv4;
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else if (rxstat & MVGBE_RX_L4_TYPE_UDP)
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else if ((rxstat & MVGBE_RX_L4_TYPE_MASK) ==
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MVGBE_RX_L4_TYPE_UDP)
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m->m_pkthdr.csum_flags |= M_CSUM_UDPv4;
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if (!(rxstat & MVGBE_RX_L4_CHECKSUM))
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m->m_pkthdr.csum_flags |= M_CSUM_TCP_UDP_BAD;
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}
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sw_csum:
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/*
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* Try to allocate a new jumbo buffer. If that
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@ -1803,49 +1802,99 @@ mvgbe_txeof(struct mvgbe_softc *sc)
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cdata->mvgbe_tx_cons = idx;
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}
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static void
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mvgbe_setmulti(struct mvgbe_softc *sc)
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static uint8_t
|
||||
mvgbe_crc8(const uint8_t *data, size_t size)
|
||||
{
|
||||
struct ifnet *ifp= &sc->sc_ethercom.ec_if;
|
||||
uint32_t pxc, dfut, upm = 0, filter = 0;
|
||||
uint8_t ln = sc->sc_enaddr[5] & 0xf; /* last nibble */
|
||||
int bit;
|
||||
uint8_t byte;
|
||||
uint8_t crc = 0;
|
||||
const uint8_t poly = 0x07;
|
||||
|
||||
if (ifp->if_flags & IFF_PROMISC) {
|
||||
upm = MVGBE_PXC_UPM;
|
||||
filter =
|
||||
MVGBE_DF(0, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS) |
|
||||
MVGBE_DF(1, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS) |
|
||||
MVGBE_DF(2, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS) |
|
||||
MVGBE_DF(3, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS);
|
||||
} else if (ifp->if_flags & IFF_ALLMULTI) {
|
||||
filter =
|
||||
MVGBE_DF(0, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS) |
|
||||
MVGBE_DF(1, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS) |
|
||||
MVGBE_DF(2, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS) |
|
||||
MVGBE_DF(3, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS);
|
||||
while(size--)
|
||||
for (byte = *data++, bit = NBBY-1; bit >= 0; bit--)
|
||||
crc = (crc << 1) ^ ((((crc >> 7) ^ (byte >> bit)) & 1) ? poly : 0);
|
||||
|
||||
return crc;
|
||||
}
|
||||
|
||||
CTASSERT(MVGBE_NDFSMT == MVGBE_NDFOMT);
|
||||
|
||||
static void
|
||||
mvgbe_filter_setup(struct mvgbe_softc *sc)
|
||||
{
|
||||
struct ethercom *ec = &sc->sc_ethercom;
|
||||
struct ifnet *ifp= &sc->sc_ethercom.ec_if;
|
||||
struct ether_multi *enm;
|
||||
struct ether_multistep step;
|
||||
uint32_t *dfut, *dfsmt, *dfomt;
|
||||
uint32_t pxc;
|
||||
int i;
|
||||
const uint8_t special[ETHER_ADDR_LEN] = {0x01,0x00,0x5e,0x00,0x00,0x00};
|
||||
|
||||
dfut = kmem_zalloc(sizeof(*dfut) * MVGBE_NDFUT, KM_SLEEP);
|
||||
dfsmt = kmem_zalloc(sizeof(*dfsmt) * MVGBE_NDFSMT, KM_SLEEP);
|
||||
dfomt = kmem_zalloc(sizeof(*dfomt) * MVGBE_NDFOMT, KM_SLEEP);
|
||||
|
||||
if (ifp->if_flags & (IFF_ALLMULTI|IFF_PROMISC)) {
|
||||
goto allmulti;
|
||||
}
|
||||
|
||||
/* Set Unicast Promiscuous mode */
|
||||
ETHER_FIRST_MULTI(step, ec, enm);
|
||||
while (enm != NULL) {
|
||||
if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
|
||||
/* ranges are complex and somewhat rare */
|
||||
goto allmulti;
|
||||
}
|
||||
/* chip handles some IPv4 multicast specially */
|
||||
if (memcmp(enm->enm_addrlo, special, 5) == 0) {
|
||||
i = enm->enm_addrlo[5];
|
||||
dfsmt[i>>2] =
|
||||
MVGBE_DF(i&3, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS);
|
||||
} else {
|
||||
i = mvgbe_crc8(enm->enm_addrlo, ETHER_ADDR_LEN);
|
||||
dfomt[i>>2] =
|
||||
MVGBE_DF(i&3, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS);
|
||||
}
|
||||
|
||||
ETHER_NEXT_MULTI(step, enm);
|
||||
}
|
||||
goto set;
|
||||
|
||||
allmulti:
|
||||
if (ifp->if_flags & (IFF_ALLMULTI|IFF_PROMISC)) {
|
||||
for (i = 0; i < MVGBE_NDFSMT; i++) {
|
||||
dfsmt[i] = dfomt[i] =
|
||||
MVGBE_DF(0, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS) |
|
||||
MVGBE_DF(1, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS) |
|
||||
MVGBE_DF(2, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS) |
|
||||
MVGBE_DF(3, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS);
|
||||
}
|
||||
}
|
||||
|
||||
set:
|
||||
pxc = MVGBE_READ(sc, MVGBE_PXC);
|
||||
pxc &= ~MVGBE_PXC_UPM;
|
||||
pxc |= upm;
|
||||
pxc |= MVGBE_PXC_RB | MVGBE_PXC_RBIP | MVGBE_PXC_RBARP;
|
||||
if (ifp->if_flags & IFF_BROADCAST) {
|
||||
pxc &= ~(MVGBE_PXC_RB | MVGBE_PXC_RBIP | MVGBE_PXC_RBARP);
|
||||
}
|
||||
if (ifp->if_flags & IFF_PROMISC) {
|
||||
pxc |= MVGBE_PXC_UPM;
|
||||
}
|
||||
MVGBE_WRITE(sc, MVGBE_PXC, pxc);
|
||||
|
||||
/* Set Destination Address Filter Multicast Tables */
|
||||
MVGBE_WRITE_FILTER(sc, MVGBE_DFSMT, filter, MVGBE_NDFSMT);
|
||||
MVGBE_WRITE_FILTER(sc, MVGBE_DFOMT, filter, MVGBE_NDFOMT);
|
||||
|
||||
if (ifp->if_flags & IFF_PROMISC) {
|
||||
/* necessary ? */
|
||||
MVGBE_WRITE_FILTER(sc, MVGBE_DFUT, filter, MVGBE_NDFUT);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Set Destination Address Filter Unicast Table */
|
||||
dfut = MVGBE_READ_FILTER(sc, MVGBE_DFUT + (ln & 0x0c));
|
||||
dfut &= ~MVGBE_DF(ln & 0x03, MVGBE_DF_QUEUE_MASK);;
|
||||
dfut |= MVGBE_DF(ln & 0x03, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS);
|
||||
MVGBE_WRITE_FILTER(sc, MVGBE_DFUT + (ln & 0x0c), dfut, 1);
|
||||
i = sc->sc_enaddr[5] & 0xf; /* last nibble */
|
||||
dfut[i>>2] = MVGBE_DF(i&3, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS);
|
||||
MVGBE_WRITE_FILTER(sc, MVGBE_DFUT, dfut, MVGBE_NDFUT);
|
||||
|
||||
/* Set Destination Address Filter Multicast Tables */
|
||||
MVGBE_WRITE_FILTER(sc, MVGBE_DFSMT, dfsmt, MVGBE_NDFSMT);
|
||||
MVGBE_WRITE_FILTER(sc, MVGBE_DFOMT, dfomt, MVGBE_NDFOMT);
|
||||
|
||||
kmem_free(dfut, sizeof(dfut[0]) * MVGBE_NDFUT);
|
||||
kmem_free(dfsmt, sizeof(dfsmt[0]) * MVGBE_NDFSMT);
|
||||
kmem_free(dfomt, sizeof(dfsmt[0]) * MVGBE_NDFOMT);
|
||||
}
|
||||
|
||||
#ifdef MVGBE_DEBUG
|
||||
@ -1870,7 +1919,5 @@ mvgbe_dump_txdesc(struct mvgbe_tx_desc *desc, int idx)
|
||||
DESC_PRINT(desc->nextdescptr);
|
||||
#endif
|
||||
#undef DESC_PRINT
|
||||
printf("txdesc[%d].desc->returninfo=%#lx\n", idx, desc->returninfo);
|
||||
printf("txdesc[%d].desc->alignbufptr=%p\n", idx, desc->alignbufptr);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: mvgbereg.h,v 1.2 2010/10/02 05:57:42 kiyohara Exp $ */
|
||||
/* $NetBSD: mvgbereg.h,v 1.3 2011/02/01 23:40:12 jakllsch Exp $ */
|
||||
/*
|
||||
* Copyright (c) 2007 KIYOHARA Takashi
|
||||
* All rights reserved.
|
||||
@ -236,8 +236,8 @@
|
||||
#define MVGBE_SDC_BLMR (1 << 4)
|
||||
#define MVGBE_SDC_BLMT (1 << 5)
|
||||
#define MVGBE_SDC_SWAPMODE (1 << 6)
|
||||
#define MVGBE_SDC_IPGINTRX(n) ((n) << 8)
|
||||
#define MVGBE_SDC_IPGINTRX_MASK MVGBE_SDC_IPGINTRX(0x3fff)
|
||||
#define MVGBE_SDC_IPGINTRX_MASK __BITS(21, 8)
|
||||
#define MVGBE_SDC_IPGINTRX(x) __SHIFTIN(x, MVGBE_SDC_IPGINTRX_MASK)
|
||||
#define MVGBE_SDC_TXBSZ(x) ((x) << 22)
|
||||
#define MVGBE_SDC_TXBSZ_MASK MVGBE_SDC_TXBSZ(7)
|
||||
#define MVGBE_SDC_TXBSZ_1_64BITWORDS MVGBE_SDC_TXBSZ(0)
|
||||
@ -310,6 +310,10 @@
|
||||
#define MVGBE_ICE_INTADDRERR (1 << 23)
|
||||
#define MVGBE_ICE_ETHERINTSUM (1 << 31)
|
||||
|
||||
/* Port Tx FIFO Urgent Threshold (MVGBE_PTFUT) */
|
||||
#define MVGBE_PTFUT_IPGINTTX_MASK __BITS(17, 4)
|
||||
#define MVGBE_PTFUT_IPGINTTX(x) __SHIFTIN(x, MVGBE_PTFUT_IPGINTTX_MASK)
|
||||
|
||||
/* Port Rx Minimal Frame Size (MVGBE_PMFS) */
|
||||
#define MVGBE_PMFS_RXMFS(rxmfs) (((rxmfs) - 40) & 0x7c)
|
||||
/* RxMFS = 40,44,48,52,56,60,64 bytes */
|
||||
@ -331,16 +335,22 @@
|
||||
#define MVGBE_DF_QUEUE_MASK ((7) << 1)
|
||||
|
||||
|
||||
#define MVGBE_MRU 9700 /* The Maximal Receive Packet Size */
|
||||
/*
|
||||
* Set the chip's packet size limit to 9022.
|
||||
* (ETHER_MAX_LEN_JUMBO + ETHER_VLAN_ENCAP_LEN)
|
||||
*/
|
||||
#define MVGBE_MRU 9022
|
||||
|
||||
#define MVGBE_BUF_ALIGN 8
|
||||
#define MVGBE_BUF_MASK (MVGBE_BUF_ALIGN - 1)
|
||||
#define MVGBE_RXBUF_ALIGN 8
|
||||
#define MVGBE_RXBUF_MASK (MVGBE_RXBUF_ALIGN - 1)
|
||||
#define MVGBE_HWHEADER_SIZE 2
|
||||
|
||||
|
||||
/*
|
||||
* DMA descriptors
|
||||
* It is 32byte alignment.
|
||||
* Despite the documentation saying these descriptors only need to be
|
||||
* aligned to 16-byte bondaries, 32-byte alignment seems to be required
|
||||
* by the hardware. We'll just pad them out to that to make it easier.
|
||||
*/
|
||||
struct mvgbe_tx_desc {
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
@ -356,10 +366,7 @@ struct mvgbe_tx_desc {
|
||||
uint32_t bufptr; /* Descriptor buffer pointer */
|
||||
uint32_t nextdescptr; /* Next descriptor pointer */
|
||||
#endif
|
||||
u_long returninfo; /* User resource return information */
|
||||
uint8_t *alignbufptr; /* Pointer to 8 byte aligned buffer */
|
||||
|
||||
uint32_t padding[2]; /* XXXX: required */
|
||||
uint32_t _padding[4];
|
||||
} __packed;
|
||||
|
||||
struct mvgbe_rx_desc {
|
||||
@ -376,9 +383,7 @@ struct mvgbe_rx_desc {
|
||||
uint32_t bufptr; /* Descriptor buffer pointer */
|
||||
uint32_t nextdescptr; /* Next descriptor pointer */
|
||||
#endif
|
||||
u_long returninfo; /* User resource return information */
|
||||
|
||||
uint32_t padding[3]; /* XXXX: required */
|
||||
uint32_t _padding[4];
|
||||
} __packed;
|
||||
|
||||
#define MVGBE_ERROR_SUMMARY (1 << 0)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user