From e427b2e5a6238a7203ccb91006573fe5eea9e533 Mon Sep 17 00:00:00 2001
From: hikaru <hikaru@NetBSD.org>
Date: Fri, 1 May 2015 06:58:40 +0000
Subject: [PATCH] Support external DMA mode and provide an interface for DMA
 address configuration

---
 sys/external/bsd/dwc2/dist/dwc2_core.c | 29 +++++++++++++++++++-------
 sys/external/bsd/dwc2/dwc2var.h        |  3 ++-
 2 files changed, 23 insertions(+), 9 deletions(-)

diff --git a/sys/external/bsd/dwc2/dist/dwc2_core.c b/sys/external/bsd/dwc2/dist/dwc2_core.c
index a31c2c25483c..4020e9b8d8c7 100644
--- a/sys/external/bsd/dwc2/dist/dwc2_core.c
+++ b/sys/external/bsd/dwc2/dist/dwc2_core.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: dwc2_core.c,v 1.6 2014/04/03 06:34:58 skrll Exp $	*/
+/*	$NetBSD: dwc2_core.c,v 1.7 2015/05/01 06:58:40 hikaru Exp $	*/
 
 /*
  * core.c - DesignWare HS OTG Controller common routines
@@ -43,7 +43,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.6 2014/04/03 06:34:58 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: dwc2_core.c,v 1.7 2015/05/01 06:58:40 hikaru Exp $");
 
 #include <sys/types.h>
 #include <sys/bus.h>
@@ -312,8 +312,13 @@ static int dwc2_gahbcfg_init(struct dwc2_hsotg *hsotg)
 
 	switch (hsotg->hw_params.arch) {
 	case GHWCFG2_EXT_DMA_ARCH:
-		dev_err(hsotg->dev, "External DMA Mode not supported\n");
-		return -EINVAL;
+		dev_dbg(hsotg->dev, "External DMA Mode\n");
+		if (hsotg->core_params->ahbcfg != -1) {
+			ahbcfg &= GAHBCFG_CTRL_MASK;
+			ahbcfg |= hsotg->core_params->ahbcfg &
+				  ~GAHBCFG_CTRL_MASK;
+		}
+		break;
 
 	case GHWCFG2_INT_DMA_ARCH:
 		dev_dbg(hsotg->dev, "Internal DMA Mode\n");
@@ -1396,10 +1401,18 @@ void dwc2_hc_start_transfer(struct dwc2_hsotg *hsotg,
 		} else {
 			dma_addr = chan->xfer_dma;
 		}
-		DWC2_WRITE_4(hsotg, HCDMA(chan->hc_num), (u32)dma_addr);
-		if (dbg_hc(chan))
-			dev_vdbg(hsotg->dev, "Wrote %08lx to HCDMA(%d)\n",
-				 (unsigned long)dma_addr, chan->hc_num);
+		if (hsotg->hsotg_sc->sc_set_dma_addr == NULL) {
+			DWC2_WRITE_4(hsotg, HCDMA(chan->hc_num),
+			    (u32)dma_addr);
+			if (dbg_hc(chan))
+				dev_vdbg(hsotg->dev,
+				    "Wrote %08lx to HCDMA(%d)\n",
+				     (unsigned long)dma_addr,
+				    chan->hc_num);
+		} else {
+			(void)(*hsotg->hsotg_sc->sc_set_dma_addr)(
+			    hsotg->dev, dma_addr, chan->hc_num);
+		}
 	}
 
 	/* Start the split */
diff --git a/sys/external/bsd/dwc2/dwc2var.h b/sys/external/bsd/dwc2/dwc2var.h
index 7733daa6e535..6a5e2a915fc2 100644
--- a/sys/external/bsd/dwc2/dwc2var.h
+++ b/sys/external/bsd/dwc2/dwc2var.h
@@ -1,4 +1,4 @@
-/*	$NetBSD: dwc2var.h,v 1.3 2013/10/22 12:57:40 skrll Exp $	*/
+/*	$NetBSD: dwc2var.h,v 1.4 2015/05/01 06:58:40 hikaru Exp $	*/
 
 /*-
  * Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -77,6 +77,7 @@ typedef struct dwc2_softc {
  	bus_space_handle_t	sc_ioh;
  	bus_dma_tag_t		sc_dmat;
 	struct dwc2_core_params *sc_params;
+	int			(*sc_set_dma_addr)(device_t, bus_addr_t, int);
 
 	/*
 	 * Private