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sync L2 cache on the tail of region.

This commit is contained in:
hsuenaga 2015-04-17 13:43:55 +00:00
parent cf84f52d36
commit e35af46bce
1 changed files with 5 additions and 5 deletions
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10
sys/arch/arm/marvell/armadaxp.c
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@ -1,4 +1,4 @@
/* $NetBSD: armadaxp.c,v 1.10 2015/04/15 12:11:31 hsuenaga Exp $ */
/* $NetBSD: armadaxp.c,v 1.11 2015/04/17 13:43:55 hsuenaga Exp $ */
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
@ -37,7 +37,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: armadaxp.c,v 1.10 2015/04/15 12:11:31 hsuenaga Exp $");
__KERNEL_RCSID(0, "$NetBSD: armadaxp.c,v 1.11 2015/04/17 13:43:55 hsuenaga Exp $");
#define _INTR_PRIVATE
@ -503,7 +503,7 @@ armadaxp_sdcache_inv_range(vaddr_t va, paddr_t pa, psize_t sz)
paddr_t pa_base, pa_end;
pa_base = pa & ~0x1f;
pa_end = (pa_base + sz) & ~0x1f;
pa_end = (pa_base + sz + 0x20) & ~0x1f;
L2_WRITE(ARMADAXP_L2_RANGE_BASE, pa_base);
L2_WRITE(ARMADAXP_L2_INV_RANGE, pa_end);
}
@ -514,7 +514,7 @@ armadaxp_sdcache_wb_range(vaddr_t va, paddr_t pa, psize_t sz)
paddr_t pa_base, pa_end;
pa_base = pa & ~0x1f;
pa_end = (pa_base + sz) & ~0x1f;
pa_end = (pa_base + sz + 0x20) & ~0x1f;
L2_WRITE(ARMADAXP_L2_RANGE_BASE, pa_base);
L2_WRITE(ARMADAXP_L2_WB_RANGE, pa_end);
L2_WRITE(ARMADAXP_L2_SYNC, 0);
@ -527,7 +527,7 @@ armadaxp_sdcache_wbinv_range(vaddr_t va, paddr_t pa, psize_t sz)
paddr_t pa_base, pa_end;
pa_base = pa & ~0x1f;
pa_end = (pa_base + sz) & ~0x1f;
pa_end = (pa_base + sz + 0x20) & ~0x1f;
L2_WRITE(ARMADAXP_L2_RANGE_BASE, pa_base);
L2_WRITE(ARMADAXP_L2_WBINV_RANGE, pa_end);
L2_WRITE(ARMADAXP_L2_SYNC, 0);