Add ARM ACPI PCI support.
This commit is contained in:
parent
348753368d
commit
e2ed649e95
@ -1,4 +1,4 @@
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/* $NetBSD: acpi_machdep.c,v 1.1 2018/10/12 22:12:11 jmcneill Exp $ */
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/* $NetBSD: acpi_machdep.c,v 1.2 2018/10/15 11:35:03 jmcneill Exp $ */
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/*-
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* Copyright (c) 2018 The NetBSD Foundation, Inc.
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@ -30,7 +30,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: acpi_machdep.c,v 1.1 2018/10/12 22:12:11 jmcneill Exp $");
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__KERNEL_RCSID(0, "$NetBSD: acpi_machdep.c,v 1.2 2018/10/15 11:35:03 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -44,6 +44,7 @@ __KERNEL_RCSID(0, "$NetBSD: acpi_machdep.c,v 1.1 2018/10/12 22:12:11 jmcneill Ex
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#include <dev/acpi/acpica.h>
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#include <dev/acpi/acpivar.h>
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#include <dev/acpi/acpi_mcfg.h>
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#include <arm/pic/picvar.h>
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@ -239,6 +240,8 @@ acpi_md_callback(struct acpi_softc *sc)
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{
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ACPI_TABLE_HEADER *hdrp;
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acpimcfg_init(&arm_generic_bs_tag, NULL);
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if (acpi_madt_map() != AE_OK)
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panic("Failed to map MADT");
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acpi_madt_walk(acpi_md_madt_probe, sc);
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367
sys/arch/arm/acpi/acpi_pci_machdep.c
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367
sys/arch/arm/acpi/acpi_pci_machdep.c
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@ -0,0 +1,367 @@
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/* $NetBSD: acpi_pci_machdep.c,v 1.1 2018/10/15 11:35:03 jmcneill Exp $ */
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/*-
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* Copyright (c) 2018 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jared McNeill <jmcneill@invisible.ca>.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: acpi_pci_machdep.c,v 1.1 2018/10/15 11:35:03 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/device.h>
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#include <sys/intr.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/extent.h>
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#include <sys/queue.h>
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#include <sys/mutex.h>
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#include <sys/kmem.h>
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#include <machine/cpu.h>
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#include <arm/cpufunc.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pciconf.h>
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#include <dev/acpi/acpivar.h>
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#include <dev/acpi/acpi_mcfg.h>
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#include <dev/acpi/acpi_pci.h>
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#define IH_INDEX_MASK 0x0000ffff
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#define IH_MPSAFE 0x80000000
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struct acpi_pci_prt {
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u_int prt_bus;
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ACPI_HANDLE prt_handle;
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TAILQ_ENTRY(acpi_pci_prt) prt_list;
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};
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static TAILQ_HEAD(, acpi_pci_prt) acpi_pci_irq_routes =
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TAILQ_HEAD_INITIALIZER(acpi_pci_irq_routes);
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static void acpi_pci_md_attach_hook(device_t, device_t,
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struct pcibus_attach_args *);
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static int acpi_pci_md_bus_maxdevs(void *, int);
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static pcitag_t acpi_pci_md_make_tag(void *, int, int, int);
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static void acpi_pci_md_decompose_tag(void *, pcitag_t, int *, int *, int *);
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static pcireg_t acpi_pci_md_conf_read(void *, pcitag_t, int);
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static void acpi_pci_md_conf_write(void *, pcitag_t, int, pcireg_t);
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static int acpi_pci_md_conf_hook(void *, int, int, int, pcireg_t);
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static void acpi_pci_md_conf_interrupt(void *, int, int, int, int, int *);
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static int acpi_pci_md_intr_map(const struct pci_attach_args *,
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pci_intr_handle_t *);
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static const char *acpi_pci_md_intr_string(void *, pci_intr_handle_t,
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char *, size_t);
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static const struct evcnt *acpi_pci_md_intr_evcnt(void *, pci_intr_handle_t);
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static int acpi_pci_md_intr_setattr(void *, pci_intr_handle_t *, int,
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uint64_t);
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static void * acpi_pci_md_intr_establish(void *, pci_intr_handle_t,
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int, int (*)(void *), void *);
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static void acpi_pci_md_intr_disestablish(void *, void *);
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struct arm32_pci_chipset arm_acpi_pci_chipset = {
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.pc_attach_hook = acpi_pci_md_attach_hook,
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.pc_bus_maxdevs = acpi_pci_md_bus_maxdevs,
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.pc_make_tag = acpi_pci_md_make_tag,
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.pc_decompose_tag = acpi_pci_md_decompose_tag,
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.pc_conf_read = acpi_pci_md_conf_read,
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.pc_conf_write = acpi_pci_md_conf_write,
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.pc_conf_hook = acpi_pci_md_conf_hook,
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.pc_conf_interrupt = acpi_pci_md_conf_interrupt,
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.pc_intr_map = acpi_pci_md_intr_map,
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.pc_intr_string = acpi_pci_md_intr_string,
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.pc_intr_evcnt = acpi_pci_md_intr_evcnt,
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.pc_intr_setattr = acpi_pci_md_intr_setattr,
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.pc_intr_establish = acpi_pci_md_intr_establish,
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.pc_intr_disestablish = acpi_pci_md_intr_disestablish,
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};
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static ACPI_STATUS
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acpi_pci_md_pci_link(ACPI_HANDLE handle, int bus)
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{
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ACPI_PCI_ROUTING_TABLE *prt;
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ACPI_HANDLE linksrc;
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ACPI_BUFFER buf;
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ACPI_STATUS rv;
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void *linkdev;
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rv = acpi_get(handle, &buf, AcpiGetIrqRoutingTable);
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if (ACPI_FAILURE(rv))
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return rv;
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for (char *p = buf.Pointer; ; p += prt->Length) {
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prt = (ACPI_PCI_ROUTING_TABLE *)p;
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if (prt->Length == 0)
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break;
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const u_int dev = ACPI_HIWORD(prt->Address);
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if (prt->Source[0] != 0) {
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aprint_debug("ACPI: %s dev %u INT%c on lnkdev %s\n",
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acpi_name(handle), dev, 'A' + (prt->Pin & 3), prt->Source);
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rv = AcpiGetHandle(ACPI_ROOT_OBJECT, prt->Source, &linksrc);
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if (ACPI_FAILURE(rv)) {
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aprint_debug("ACPI: AcpiGetHandle failed for '%s': %s\n",
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prt->Source, AcpiFormatException(rv));
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continue;
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}
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linkdev = acpi_pci_link_devbyhandle(linksrc);
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acpi_pci_link_add_reference(linkdev, 0, bus, dev, prt->Pin & 3);
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} else {
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aprint_debug("ACPI: %s dev %u INT%c on globint %d\n",
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acpi_name(handle), dev, 'A' + (prt->Pin & 3), prt->SourceIndex);
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}
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}
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return AE_OK;
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}
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static void
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acpi_pci_md_attach_hook(device_t parent, device_t self,
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struct pcibus_attach_args *pba)
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{
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struct acpi_pci_prt *prt, *prtp;
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struct acpi_devnode *ad;
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ACPI_HANDLE handle;
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int seg, bus, dev, func;
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seg = 0; /* XXX segment */
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handle = NULL;
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if (pba->pba_bridgetag) {
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/*
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* Find the PCI address of our parent bridge and look for the
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* corresponding ACPI device node. If there is no node for this
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* bus, use the parent bridge routing information.
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*/
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acpi_pci_md_decompose_tag(NULL, *pba->pba_bridgetag, &bus, &dev, &func);
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ad = acpi_pcidev_find(seg, bus, dev, func);
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if (ad != NULL) {
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handle = ad->ad_handle;
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} else {
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/* No routes defined for this bus, copy from parent */
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TAILQ_FOREACH(prtp, &acpi_pci_irq_routes, prt_list)
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if (prtp->prt_bus == bus) {
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handle = prtp->prt_handle;
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break;
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}
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}
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} else {
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/*
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* Lookup the ACPI device node for the root bus.
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*/
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ad = acpi_pciroot_find(seg, 0);
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if (ad != NULL)
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handle = ad->ad_handle;
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}
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if (ad != NULL) {
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/*
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* This is a new ACPI managed bus. Add PCI link references.
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*/
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acpi_pci_md_pci_link(ad->ad_handle, pba->pba_bus);
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}
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if (handle != NULL) {
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prt = kmem_alloc(sizeof(*prt), KM_SLEEP);
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prt->prt_bus = pba->pba_bus;
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prt->prt_handle = handle;
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TAILQ_INSERT_TAIL(&acpi_pci_irq_routes, prt, prt_list);
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}
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acpimcfg_map_bus(self, pba->pba_pc, pba->pba_bus);
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}
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static int
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acpi_pci_md_bus_maxdevs(void *v, int busno)
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{
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return 32;
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}
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static pcitag_t
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acpi_pci_md_make_tag(void *v, int b, int d, int f)
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{
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return (b << 16) | (d << 11) | (f << 8);
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}
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static void
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acpi_pci_md_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp)
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{
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if (bp)
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*bp = (tag >> 16) & 0xff;
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if (dp)
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*dp = (tag >> 11) & 0x1f;
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if (fp)
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*fp = (tag >> 8) & 0x7;
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}
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static pcireg_t
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acpi_pci_md_conf_read(void *v, pcitag_t tag, int offset)
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{
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pcireg_t val;
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if (offset < 0 || offset >= PCI_EXTCONF_SIZE)
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return (pcireg_t) -1;
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acpimcfg_conf_read(&arm_acpi_pci_chipset, tag, offset, &val);
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return val;
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}
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static void
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acpi_pci_md_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)
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{
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if (offset < 0 || offset >= PCI_EXTCONF_SIZE)
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return;
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acpimcfg_conf_write(&arm_acpi_pci_chipset, tag, offset, val);
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}
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static int
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acpi_pci_md_conf_hook(void *v, int b, int d, int f, pcireg_t id)
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{
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return PCI_CONF_DEFAULT;
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}
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static void
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acpi_pci_md_conf_interrupt(void *v, int bus, int dev, int ipin, int sqiz, int *ilinep)
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{
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}
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static struct acpi_pci_prt *
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acpi_pci_md_intr_find_prt(u_int bus)
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{
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struct acpi_pci_prt *prt, *prtp;
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prt = NULL;
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TAILQ_FOREACH(prtp, &acpi_pci_irq_routes, prt_list)
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if (prtp->prt_bus == bus) {
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prt = prtp;
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break;
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}
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return prt;
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}
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static int
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acpi_pci_md_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ih)
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{
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struct acpi_pci_prt *prt;
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ACPI_PCI_ROUTING_TABLE *tab;
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int line, pol, trig, error;
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ACPI_HANDLE linksrc;
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ACPI_BUFFER buf;
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void *linkdev;
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if (pa->pa_intrpin == PCI_INTERRUPT_PIN_NONE)
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return EINVAL;
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prt = acpi_pci_md_intr_find_prt(pa->pa_bus);
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if (prt == NULL)
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return ENXIO;
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if (ACPI_FAILURE(acpi_get(prt->prt_handle, &buf, AcpiGetIrqRoutingTable)))
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return EIO;
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error = ENOENT;
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for (char *p = buf.Pointer; ; p += tab->Length) {
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tab = (ACPI_PCI_ROUTING_TABLE *)p;
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if (tab->Length == 0)
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break;
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if (pa->pa_device == ACPI_HIWORD(tab->Address) &&
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(pa->pa_intrpin - 1) == (tab->Pin & 3)) {
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if (tab->Source[0] != 0) {
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if (ACPI_FAILURE(AcpiGetHandle(ACPI_ROOT_OBJECT, tab->Source, &linksrc)))
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goto done;
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linkdev = acpi_pci_link_devbyhandle(linksrc);
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*ih = acpi_pci_link_route_interrupt(linkdev, tab->SourceIndex,
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&line, &pol, &trig);
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error = 0;
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goto done;
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} else {
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*ih = tab->SourceIndex;
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error = 0;
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goto done;
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}
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}
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}
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done:
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ACPI_FREE(buf.Pointer);
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return error;
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}
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static const char *
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acpi_pci_md_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len)
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{
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snprintf(buf, len, "irq %d", (int)(ih & IH_INDEX_MASK));
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return buf;
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}
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static const struct evcnt *
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acpi_pci_md_intr_evcnt(void *v, pci_intr_handle_t ih)
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{
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return NULL;
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}
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static int
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acpi_pci_md_intr_setattr(void *v, pci_intr_handle_t *ih, int attr, uint64_t data)
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{
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switch (attr) {
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case PCI_INTR_MPSAFE:
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if (data)
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*ih |= IH_MPSAFE;
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else
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*ih &= ~IH_MPSAFE;
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return 0;
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default:
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return ENODEV;
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}
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}
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static void *
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acpi_pci_md_intr_establish(void *v, pci_intr_handle_t ih, int ipl,
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int (*callback)(void *), void *arg)
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{
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const int irq = ih & IH_INDEX_MASK;
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const int mpsafe = (ih & IH_MPSAFE) ? IST_MPSAFE : 0;
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return intr_establish(irq, ipl, IST_LEVEL | mpsafe, callback, arg);
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}
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static void
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acpi_pci_md_intr_disestablish(void *v, void *vih)
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{
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intr_disestablish(vih);
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}
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37
sys/arch/arm/acpi/acpi_pci_machdep.h
Normal file
37
sys/arch/arm/acpi/acpi_pci_machdep.h
Normal file
@ -0,0 +1,37 @@
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/* $NetBSD: acpi_pci_machdep.h,v 1.1 2018/10/15 11:35:03 jmcneill Exp $ */
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/*-
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* Copyright (c) 2018 The NetBSD Foundation, Inc.
|
||||
* All rights reserved.
|
||||
*
|
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* This code is derived from software contributed to The NetBSD Foundation
|
||||
* by Jared McNeill <jmcneill@invisible.ca>.
|
||||
*
|
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_ACPI_PCI_MACHDEP_H
|
||||
#define _ARM_ACPI_PCI_MACHDEP_H
|
||||
|
||||
extern struct arm32_pci_chipset arm_acpi_pci_chipset;
|
||||
|
||||
#endif /* !_ARM_ACPI_PCI_MACHDEP_H */
|
142
sys/arch/arm/acpi/acpipchb.c
Normal file
142
sys/arch/arm/acpi/acpipchb.c
Normal file
@ -0,0 +1,142 @@
|
||||
/* $NetBSD: acpipchb.c,v 1.1 2018/10/15 11:35:03 jmcneill Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2018 The NetBSD Foundation, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This code is derived from software contributed to The NetBSD Foundation
|
||||
* by Jared McNeill <jmcneill@invisible.ca>.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: acpipchb.c,v 1.1 2018/10/15 11:35:03 jmcneill Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/device.h>
|
||||
#include <sys/intr.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/extent.h>
|
||||
#include <sys/queue.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/kmem.h>
|
||||
|
||||
#include <machine/cpu.h>
|
||||
|
||||
#include <arm/cpufunc.h>
|
||||
|
||||
#include <dev/pci/pcireg.h>
|
||||
#include <dev/pci/pcivar.h>
|
||||
#include <dev/pci/pciconf.h>
|
||||
|
||||
#include <dev/acpi/acpivar.h>
|
||||
#include <dev/acpi/acpi_mcfg.h>
|
||||
|
||||
#define PCIHOST_CACHELINE_SIZE arm_dcache_align
|
||||
|
||||
struct acpipchb_softc {
|
||||
device_t sc_dev;
|
||||
|
||||
struct arm32_bus_dma_tag sc_dmat;
|
||||
|
||||
ACPI_HANDLE sc_handle;
|
||||
ACPI_INTEGER sc_bus;
|
||||
};
|
||||
|
||||
static struct arm32_dma_range ahcipchb_coherent_ranges[] = {
|
||||
[0] = {
|
||||
.dr_sysbase = 0,
|
||||
.dr_busbase = 0,
|
||||
.dr_len = UINTPTR_MAX,
|
||||
.dr_flags = _BUS_DMAMAP_COHERENT,
|
||||
}
|
||||
};
|
||||
|
||||
static int acpipchb_match(device_t, cfdata_t, void *);
|
||||
static void acpipchb_attach(device_t, device_t, void *);
|
||||
|
||||
CFATTACH_DECL_NEW(acpipchb, sizeof(struct acpipchb_softc),
|
||||
acpipchb_match, acpipchb_attach, NULL, NULL);
|
||||
|
||||
static const char * const compatible[] = {
|
||||
"PNP0A08",
|
||||
NULL
|
||||
};
|
||||
|
||||
static int
|
||||
acpipchb_match(device_t parent, cfdata_t cf, void *aux)
|
||||
{
|
||||
struct acpi_attach_args *aa = aux;
|
||||
|
||||
if (aa->aa_node->ad_type != ACPI_TYPE_DEVICE)
|
||||
return 0;
|
||||
|
||||
return acpi_match_hid(aa->aa_node->ad_devinfo, compatible);
|
||||
}
|
||||
|
||||
static void
|
||||
acpipchb_attach(device_t parent, device_t self, void *aux)
|
||||
{
|
||||
struct acpipchb_softc * const sc = device_private(self);
|
||||
struct acpi_attach_args *aa = aux;
|
||||
struct pcibus_attach_args pba;
|
||||
ACPI_INTEGER cca;
|
||||
|
||||
sc->sc_dev = self;
|
||||
sc->sc_handle = aa->aa_node->ad_handle;
|
||||
|
||||
if (ACPI_FAILURE(acpi_eval_integer(sc->sc_handle, "_BBN", &sc->sc_bus)))
|
||||
sc->sc_bus = 0;
|
||||
|
||||
if (ACPI_FAILURE(acpi_eval_integer(sc->sc_handle, "_CCA", &cca)))
|
||||
cca = 0;
|
||||
|
||||
aprint_naive("\n");
|
||||
aprint_normal(": PCI Express Host Bridge\n");
|
||||
|
||||
if (acpimcfg_configure_bus(self, aa->aa_pc, sc->sc_handle, sc->sc_bus, PCIHOST_CACHELINE_SIZE) != 0) {
|
||||
aprint_error_dev(self, "failed to configure PCI bus\n");
|
||||
return;
|
||||
}
|
||||
|
||||
sc->sc_dmat = *aa->aa_dmat;
|
||||
if (cca) {
|
||||
sc->sc_dmat._ranges = ahcipchb_coherent_ranges;
|
||||
sc->sc_dmat._nranges = __arraycount(ahcipchb_coherent_ranges);
|
||||
}
|
||||
|
||||
memset(&pba, 0, sizeof(pba));
|
||||
pba.pba_flags = aa->aa_pciflags;
|
||||
pba.pba_iot = aa->aa_iot;
|
||||
pba.pba_memt = aa->aa_memt;
|
||||
pba.pba_dmat = &sc->sc_dmat;
|
||||
#ifdef _PCI_HAVE_DMA64
|
||||
pba.pba_dmat64 = &sc->sc_dmat;
|
||||
#endif
|
||||
pba.pba_pc = aa->aa_pc;
|
||||
pba.pba_bus = sc->sc_bus;
|
||||
|
||||
config_found_ia(self, "pcibus", &pba, pcibusprint);
|
||||
}
|
@ -1,4 +1,4 @@
|
||||
# $NetBSD: files.acpi,v 1.1 2018/10/12 22:20:04 jmcneill Exp $
|
||||
# $NetBSD: files.acpi,v 1.2 2018/10/15 11:35:03 jmcneill Exp $
|
||||
#
|
||||
# Configuration info for ACPI compliant ARM boards.
|
||||
#
|
||||
@ -11,6 +11,7 @@ defflag opt_pcifixup.h ACPI_PCI_FIXUP
|
||||
include "dev/acpi/files.acpi"
|
||||
|
||||
file arch/arm/acpi/acpi_machdep.c acpi
|
||||
file arch/arm/acpi/acpi_pci_machdep.c acpi
|
||||
file arch/arm/acpi/acpi_platform.c acpi
|
||||
file arch/arm/acpi/acpi_table.c acpi
|
||||
|
||||
@ -25,3 +26,7 @@ file arch/arm/acpi/gtmr_acpi.c gtmr_acpi
|
||||
|
||||
attach plcom at acpinodebus with plcom_acpi
|
||||
file arch/arm/acpi/plcom_acpi.c plcom_acpi
|
||||
|
||||
device acpipchb: pcibus
|
||||
attach acpipchb at acpinodebus
|
||||
file arch/arm/acpi/acpipchb.c acpipchb
|
||||
|
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: acpi_fdt.c,v 1.2 2018/10/13 00:15:10 jmcneill Exp $ */
|
||||
/* $NetBSD: acpi_fdt.c,v 1.3 2018/10/15 11:35:03 jmcneill Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2015-2017 Jared McNeill <jmcneill@invisible.ca>
|
||||
@ -27,7 +27,7 @@
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: acpi_fdt.c,v 1.2 2018/10/13 00:15:10 jmcneill Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: acpi_fdt.c,v 1.3 2018/10/15 11:35:03 jmcneill Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/bus.h>
|
||||
@ -46,6 +46,8 @@ __KERNEL_RCSID(0, "$NetBSD: acpi_fdt.c,v 1.2 2018/10/13 00:15:10 jmcneill Exp $"
|
||||
|
||||
#include <arm/arm/psci.h>
|
||||
|
||||
#include <arm/acpi/acpi_pci_machdep.h>
|
||||
|
||||
static int acpi_fdt_match(device_t, cfdata_t, void *);
|
||||
static void acpi_fdt_attach(device_t, device_t, void *);
|
||||
|
||||
@ -87,9 +89,9 @@ acpi_fdt_attach(device_t parent, device_t self, void *aux)
|
||||
|
||||
aa.aa_iot = 0;
|
||||
aa.aa_memt = faa->faa_bst;
|
||||
aa.aa_pc = NULL;
|
||||
aa.aa_pc = &arm_acpi_pci_chipset;
|
||||
aa.aa_pciflags =
|
||||
PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY |
|
||||
/*PCI_FLAGS_IO_OKAY |*/ PCI_FLAGS_MEM_OKAY |
|
||||
PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY |
|
||||
PCI_FLAGS_MWI_OKAY;
|
||||
aa.aa_ic = 0;
|
||||
|
Loading…
Reference in New Issue
Block a user