New bus error/address error trap handlers, code lifted from mac68k
port, which is lifted from amiga port, plus some changes from me: - Add support for the HP MMU to the 020/030 bus/address error handler (mostly lifted wholesale from the old code). - Rename addrerr and buserr to busaddrerr2030. The new name reflects that these functions are specific to the 68020 and 68030, and that the same handler function is used for both vectors. The vector table is patched once we know our CPU type, before the MMU is enabled. In the event that we're running on a CPU that we're not configured for, simply invoke the PROM's "reboot request"; we have no hope of running in the event of a config botch, since we need working a working bus error handler for console initialization. These new functions optimze for common-case page faults, eliminate many run-time checks, and are sharable.
This commit is contained in:
thorpej
parent
89c8d10a08
commit
e296b3b344
@ -1,4 +1,4 @@
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/* $NetBSD: locore.s,v 1.74 1997/05/13 18:01:03 gwr Exp $ */
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/* $NetBSD: locore.s,v 1.75 1997/07/14 19:18:31 thorpej Exp $ */
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/*
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* Copyright (c) 1994, 1995 Gordon W. Ross
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@ -89,6 +89,17 @@ ASLOCAL(tmpstk)
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#define RELOC(var, ar) _RELOC(_C_LABEL(var), ar)
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#define ASRELOC(var, ar) _RELOC(_ASM_LABEL(var), ar)
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/*
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* Final bits of grunt work required to reboot the system. The MMU
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* must be disabled when this is invoked.
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*/
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#define DOREBOOT \
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/* Reset Vector Base Register to what PROM expects. */ \
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movl #0,d0; \
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movc d0,vbr; \
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/* Jump to REQ_REBOOT */ \
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jmp 0x1A4;
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/*
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* Initialization
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*
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@ -279,6 +290,41 @@ Lis320:
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*/
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Lstart1:
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/*
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* Now that we know what CPU we have, initialize the address error
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* and bus error handlers in the vector table:
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*
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* vectab+8 bus error
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* vectab+12 address error
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*/
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RELOC(cputype, a0)
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#if 0
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/* XXX assembler/linker feature/bug */
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RELOC(vectab, a2)
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#else
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movl #_C_LABEL(vectab),a2
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addl a5,a2
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#endif
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#if defined(M68040)
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cmpl #CPU_68040,a0@ | 68040?
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jne 1f | no, skip
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movl #_C_LABEL(buserr40),a2@(8)
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movl #_C_LABEL(addrerr4060),a2@(12)
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jra Lstart2
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1:
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#endif
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#if defined(M68020) || defined(M68030)
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cmpl #CPU_68040,a0@ | 68040?
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jeq 1f | yes, skip
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movl #_C_LABEL(busaddrerr2030),a2@(8)
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movl #_C_LABEL(busaddrerr2030),a2@(12)
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jra Lstart2
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1:
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#endif
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/* Config botch; no hope. */
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DOREBOOT
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Lstart2:
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movl #0,a1@(MMUCMD) | clear out MMU again
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/* initialize source/destination control registers for movs */
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moveq #FC_USERD,d0 | user space
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@ -300,10 +346,10 @@ Lstart1:
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#ifdef DDB
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RELOC(esym,a0) | end of static kernel test/data/syms
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movl a0@,d5
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jne Lstart2
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jne Lstart3
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#endif
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movl #_C_LABEL(end),d5 | end of static kernel text/data
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Lstart2:
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Lstart3:
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addl #NBPG-1,d5
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andl #PG_FRAME,d5 | round to a page
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movl d5,a4
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@ -477,85 +523,117 @@ GLOBAL(proc_trampoline)
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*/
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#include <m68k/m68k/trap_subr.s>
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ENTRY_NOPROFILE(buserr)
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/*
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* XXX TODO: look at the mac68k _buserr and generalize
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* XXX the saving of the fault address so this routine
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* XXX can be shared.
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*/
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tstl _C_LABEL(nofault) | device probe?
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jeq Lberr | no, handle as usual
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movl _C_LABEL(nofault),sp@- | yes,
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jbsr _C_LABEL(longjmp) | longjmp(nofault)
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Lberr:
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#if defined(M68040)
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#if defined(M68020) || defined(M68030)
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cmpl #MMU_68040,_C_LABEL(mmutype) | 68040?
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jne _C_LABEL(addrerr) | no, skip
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#endif
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.data
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GLOBAL(m68k_fault_addr)
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.long 0
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#if defined(M68040) || defined(M68060)
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ENTRY_NOPROFILE(addrerr4060)
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clrl sp@- | stack adjust count
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moveml #0xFFFF,sp@- | save user registers
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movl usp,a0 | save the user SP
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movl a0,sp@(FR_SP) | in the savearea
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lea sp@(FR_HW),a1 | grab base of HW berr frame
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moveq #0,d0
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movw a1@(12),d0 | grab SSW
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movl a1@(20),d1 | and fault VA
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btst #11,d0 | check for mis-aligned access
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jeq Lberr2 | no, skip
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addl #3,d1 | yes, get into next page
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andl #PG_FRAME,d1 | and truncate
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Lberr2:
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movl d1,sp@- | push fault VA
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movl d0,sp@- | and padded SSW
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btst #10,d0 | ATC bit set?
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jeq Lisberr | no, must be a real bus error
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movc dfc,d1 | yes, get MMU fault
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movc d0,dfc | store faulting function code
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movl sp@(4),a0 | get faulting address
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.word 0xf568 | ptestr a0@
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movc d1,dfc
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.long 0x4e7a0805 | movc mmusr,d0
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movw d0,sp@ | save (ONLY LOW 16 BITS!)
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jra Lismerr
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movl sp@(FR_HW+8),sp@-
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clrl sp@- | dummy code
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movl #T_ADDRERR,sp@- | mark address error
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jra _ASM_LABEL(faultstkadj) | and deal with it
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#endif
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ENTRY_NOPROFILE(addrerr)
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#if defined(M68060)
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ENTRY_NOPROFILE(buserr60)
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clrl sp@- | stack adjust count
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moveml #0xFFFF,sp@- | save user registers
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movl usp,a0 | save the user SP
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movl a0,sp@(FR_SP) | in the savearea
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lea sp@(FR_HW),a1 | grab base of HW berr frame
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movel sp@(FR_HW+12),d0 | FSLW
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btst #2,d0 | branch prediction error?
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jeq Lnobpe
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movc cacr,d2
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orl #IC60_CABC,d2 | clear all branch cache entries
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movc d2,cacr
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movl d0,d1
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addql #1,L60bpe
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andl #0x7ffd,d1
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jeq _ASM_LABEL(faultstkadjnotrap2)
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Lnobpe:
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| we need to adjust for misaligned addresses
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movl sp@(FR_HW+8),d1 | grab VA
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btst #27,d0 | check for mis-aligned access
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jeq Lberr3 | no, skip
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addl #28,d1 | yes, get into next page
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| operand case: 3,
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| instruction case: 4+12+12
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andl #PG_FRAME,d1 | and truncate
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Lberr3:
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movl d1,sp@-
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movl d0,sp@- | code is FSLW now.
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andw #0x1f80,d0
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jeq Lberr60 | it is a bus error
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movl #T_MMUFLT,sp@- | show that we are an MMU fault
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jra _ASM_LABEL(faultstkadj) | and deal with it
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Lberr60:
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tstl _C_LABEL(nofault) | catch bus error?
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jeq Lisberr | no, handle as usual
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movl sp@(FR_HW+8+8),_C_LABEL(m68k_fault_addr) | save fault addr
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movl _C_LABEL(nofault),sp@- | yes,
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jbsr _C_LABEL(longjmp) | longjmp(nofault)
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/* NOTREACHED */
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#endif
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#if defined(M68040)
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#if defined(M68020) || defined(M68030)
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cmpl #MMU_68040,_C_LABEL(mmutype) | 68040?
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jne Lbenot040 | no, skip
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#endif
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movl a1@(8),sp@- | yes, push fault address
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clrl sp@- | no SSW for address fault
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jra Lisaerr | go deal with it
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Lbenot040:
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#endif
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ENTRY_NOPROFILE(buserr40)
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clrl sp@- | stack adjust count
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moveml #0xFFFF,sp@- | save user registers
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movl usp,a0 | save the user SP
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movl a0,sp@(FR_SP) | in the savearea
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movl sp@(FR_HW+20),d1 | get fault address
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moveq #0,d0
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movw a1@(10),d0 | grab SSW for fault processing
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movw sp@(FR_HW+12),d0 | get SSW
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btst #11,d0 | check for mis-aligned
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jeq Lbe1stpg | no skip
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addl #3,d1 | get into next page
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andl #PG_FRAME,d1 | and truncate
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Lbe1stpg:
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movl d1,sp@- | pass fault address.
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movl d0,sp@- | pass SSW as code
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btst #10,d0 | test ATC
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jeq Lberr40 | it is a bus error
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movl #T_MMUFLT,sp@- | show that we are an MMU fault
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jra _ASM_LABEL(faultstkadj) | and deal with it
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Lberr40:
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tstl _C_LABEL(nofault) | catch bus error?
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jeq Lisberr | no, handle as usual
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movl sp@(FR_HW+8+16),_C_LABEL(m68k_fault_addr) | save fault addr
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movl _C_LABEL(nofault),sp@- | yes,
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jbsr _C_LABEL(longjmp) | longjmp(nofault)
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/* NOTREACHED */
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#endif
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#if defined(M68020) || defined(M68030)
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ENTRY_NOPROFILE(busaddrerr2030)
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clrl sp@- | stack adjust count
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moveml #0xFFFF,sp@- | save user registers
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movl usp,a0 | save the user SP
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movl a0,sp@(FR_SP) | in the savearea
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moveq #0,d0
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movw sp@(FR_HW+10),d0 | grab SSW for fault processing
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btst #12,d0 | RB set?
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jeq LbeX0 | no, test RC
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bset #14,d0 | yes, must set FB
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movw d0,a1@(10) | for hardware too
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movw d0,sp@(FR_HW+10) | for hardware too
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LbeX0:
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btst #13,d0 | RC set?
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jeq LbeX1 | no, skip
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bset #15,d0 | yes, must set FC
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movw d0,a1@(10) | for hardware too
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movw d0,sp@(FR_HW+10) | for hardware too
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LbeX1:
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btst #8,d0 | data fault?
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jeq Lbe0 | no, check for hard cases
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movl a1@(16),d1 | fault address is as given in frame
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movl sp@(FR_HW+16),d1 | fault address is as given in frame
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jra Lbe10 | thats it
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Lbe0:
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btst #4,a1@(6) | long (type B) stack frame?
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btst #4,sp@(FR_HW+6) | long (type B) stack frame?
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jne Lbe4 | yes, go handle
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movl a1@(2),d1 | no, can use save PC
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movl sp@(FR_HW+2),d1 | no, can use save PC
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btst #14,d0 | FB set?
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jeq Lbe3 | no, try FC
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addql #4,d1 | yes, adjust address
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@ -566,67 +644,75 @@ Lbe3:
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addql #2,d1 | yes, adjust address
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jra Lbe10 | done
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Lbe4:
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movl a1@(36),d1 | long format, use stage B address
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movl sp@(FR_HW+36),d1 | long format, use stage B address
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btst #15,d0 | FC set?
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jeq Lbe10 | no, all done
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subql #2,d1 | yes, adjust address
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Lbe10:
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movl d1,sp@- | push fault VA
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movl d0,sp@- | and padded SSW
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movw a1@(6),d0 | get frame format/vector offset
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movw sp@(FR_HW+8+6),d0 | get frame format/vector offset
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andw #0x0FFF,d0 | clear out frame format
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cmpw #12,d0 | address error vector?
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jeq Lisaerr | yes, go to it
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#if defined(M68K_MMU_MOTOROLA)
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#if defined(M68K_MMU_HP)
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tstl _C_LABEL(mmutype) | HP MMU?
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jeq Lbehpmmu | yes, skip
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jeq Lbehpmmu | yes, different MMU fault handler
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#endif
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movl d1,a0 | fault address
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movl sp@,d0 | function code from ssw
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btst #8,d0 | data fault?
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jne Lbe10a
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movql #1,d0 | user program access FC
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| (we dont separate data/program)
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btst #5,a1@ | supervisor mode?
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| (we dont seperate data/program)
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btst #5,sp@(FR_HW+8) | supervisor mode?
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jeq Lbe10a | if no, done
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movql #5,d0 | else supervisor program access
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Lbe10a:
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ptestr d0,a0@,#7 | do a table search
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pmove psr,sp@ | save result
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movb sp@,d1
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btst #2,d1 | invalid? (incl. limit viol and berr)
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btst #2,d1 | invalid (incl. limit viol. and berr)?
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jeq Lmightnotbemerr | no -> wp check
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btst #7,d1 | is it MMU table berr?
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jeq Lismerr | no, must be fast
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jra Lisberr1 | real bus err needs not be fast
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Lmightnotbemerr:
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btst #3,d1 | write protect bit set?
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jeq Lisberr1 | no, must be bus error
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movl sp@,d0 | ssw into low word of d0
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andw #0xc0,d0 | write protect is set on page:
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cmpw #0x40,d0 | was it read cycle?
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jeq Lisberr1 | yes, was not WPE, must be bus err
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jra Lismerr | no, must be mem err
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Lbehpmmu:
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#endif
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#if defined(M68K_MMU_HP)
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MMUADDR(a0)
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movl a0@(MMUSTAT),d0 | read status
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btst #3,d0 | MMU fault?
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jeq Lisberr | no, just a non-MMU bus error so skip
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andl #~MMU_FAULT,a0@(MMUSTAT)| yes, clear fault bits
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movw d0,sp@ | pass MMU stat in upper half of code
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#endif
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jne Lisberr1 | yes, needs not be fast.
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Lismerr:
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movl #T_MMUFLT,sp@- | show that we are an MMU fault
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jra _ASM_LABEL(faultstkadj) | and deal with it
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Lmightnotbemerr:
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btst #3,d1 | write protect bit set?
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jeq Lisberr1 | no: must be bus error
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movl sp@,d0 | ssw into low word of d0
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andw #0xc0,d0 | Write protect is set on page:
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cmpw #0x40,d0 | was it read cycle?
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jne Lismerr | no, was not WPE, must be MMU fault
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jra Lisberr1 | real bus err needs not be fast.
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#endif /* M68K_MMU_MOTOROLA */
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#if defined(M68K_MMU_HP)
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Lbehpmmu:
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MMUADDR(a0)
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movl a0@(MMUSTAT),d0 | read MMU status
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btst #3,d0 | MMU fault?
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jeq Lisberr1 | no, just a non-MMU bus error
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andl #~MMU_FAULT,a0@(MMUSTAT)| yes, clear fault bits
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movw d0,sp@ | pass MMU stat in upper half of code
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jra Lismerr | and handle it
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#endif
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Lisaerr:
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movl #T_ADDRERR,sp@- | mark address error
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jra _ASM_LABEL(faultstkadj) | and deal with it
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Lisberr1:
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clrw sp@ | re-clear pad word
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Lisberr:
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tstl _C_LABEL(nofault) | catch bus error?
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jeq Lisberr | no, handle as usual
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movl sp@(FR_HW+8+16),_C_LABEL(m68k_fault_addr) | save fault addr
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movl _C_LABEL(nofault),sp@- | yes,
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jbsr _C_LABEL(longjmp) | longjmp(nofault)
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/* NOTREACHED */
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#endif /* M68020 || M68030 */
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Lisberr: | also used by M68040/60
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movl #T_BUSERR,sp@- | mark bus error
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jra _ASM_LABEL(faultstkadj) | and deal with it
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@ -1810,13 +1896,6 @@ LmotommuE:
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#endif
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jmp MAXADDR+8 | jump to last page
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#define DOREBOOT \
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/* Reset Vector Base Register to what PROM expects. */ \
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movl #0,d0; \
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movc d0,vbr; \
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/* Jump to REQ_REBOOT */ \
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jmp 0x1A4;
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Lbootcode:
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lea MAXADDR+0x800,sp | physical SP in case of NMI
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#if defined(M68040)
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@ -1845,8 +1924,6 @@ LhpmmuB:
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#endif
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Lebootcode:
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#undef DOREBOOT
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/*
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* Misc. global variables.
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*/
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@ -1,4 +1,4 @@
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| $NetBSD: vectors.s,v 1.11 1997/04/25 02:16:38 thorpej Exp $
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| $NetBSD: vectors.s,v 1.12 1997/07/14 19:18:32 thorpej Exp $
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| Copyright (c) 1997 Jason R. Thorpe. All rights reserved.
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| Copyright (c) 1988 University of Utah
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@ -46,12 +46,17 @@
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VECTOR(badtrap) ; VECTOR(badtrap) ; \
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VECTOR(badtrap) ; VECTOR(badtrap)
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/*
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* bus error and address error vectors are initialized
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* in locore.s once we know our CPU type.
|
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*/
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.text
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GLOBAL(vectab)
|
||||
VECTOR_UNUSED /* 0: NOT USED (reset SSP) */
|
||||
VECTOR_UNUSED /* 1: NOT USED (reset PC) */
|
||||
VECTOR(buserr) /* 2: bus error */
|
||||
VECTOR(addrerr) /* 3: address error */
|
||||
VECTOR_UNUSED /* 2: bus error */
|
||||
VECTOR_UNUSED /* 3: address error */
|
||||
VECTOR(illinst) /* 4: illegal instruction */
|
||||
VECTOR(zerodiv) /* 5: zero divide */
|
||||
VECTOR(chkinst) /* 6: CHK instruction */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user