use CLZ insn to find a pending interrupt.
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parent
a3a18840be
commit
e1cdd07843
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@ -1,4 +1,4 @@
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/* $NetBSD: sacc_obio.c,v 1.1 2003/08/09 19:38:53 bsh Exp $ */
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/* $NetBSD: sacc_obio.c,v 1.2 2003/08/12 08:24:04 bsh Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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@ -41,7 +41,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: sacc_obio.c,v 1.1 2003/08/09 19:38:53 bsh Exp $");
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__KERNEL_RCSID(0, "$NetBSD: sacc_obio.c,v 1.2 2003/08/12 08:24:04 bsh Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -187,29 +187,31 @@ sacc_obio_intr(void *arg)
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bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR1);
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DPRINTF(("sacc_obio_intr_dispatch: %x %x\n", intstat.lo, intstat.hi));
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for( i=0; intstat.lo | intstat.hi ; ++i){
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if (intstat.lo & (1U<<i)) {
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/*
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* Clear intr status before calling intr handlers.
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* This cause stray interrupts, but clearing
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* after calling intr handlers cause intr lossage.
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*/
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bus_space_write_4(sc->sc_iot, sc->sc_ioh,
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SACCIC_INTSTATCLR0, (1U<<i) );
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while ((i = find_first_bit(intstat.lo)) >= 0) {
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for(ih = sc->sc_intrhand[i]; ih; ih = ih->ih_next)
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softintr_schedule(ih->ih_soft);
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/*
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* Clear intr status before calling intr handlers.
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* This cause stray interrupts, but clearing
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* after calling intr handlers cause intr lossage.
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*/
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bus_space_write_4(sc->sc_iot, sc->sc_ioh,
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SACCIC_INTSTATCLR0, 1U<<i );
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intstat.lo &= ~(1U<<i);
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}
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if (intstat.hi & (1U<<i)) {
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bus_space_write_4(sc->sc_iot, sc->sc_ioh,
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SACCIC_INTSTATCLR1, 1 << i);
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for(ih = sc->sc_intrhand[i + 32]; ih; ih = ih->ih_next)
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softintr_schedule(ih->ih_soft);
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for(ih = sc->sc_intrhand[i]; ih; ih = ih->ih_next)
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softintr_schedule(ih->ih_soft);
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intstat.hi &= ~(1U<<i);
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}
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intstat.lo &= ~(1U<<i);
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}
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while ((i = find_first_bit(intstat.hi)) >= 0) {
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bus_space_write_4(sc->sc_iot, sc->sc_ioh,
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SACCIC_INTSTATCLR1, 1U<<i);
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for(ih = sc->sc_intrhand[i + 32]; ih; ih = ih->ih_next)
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softintr_schedule(ih->ih_soft);
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intstat.hi &= ~(1U<<i);
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}
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return 1;
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}
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