Alpha support from libc.
This commit is contained in:
cgd
parent
537b309ca7
commit
e133097a8e
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/* $NetBSD: DEFS.h,v 1.1 1995/02/13 21:49:11 cgd Exp $ */
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/*
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* Copyright (c) 1994, 1995 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include <machine/asm.h>
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# $Id: Makefile.inc,v 1.1 1995/02/13 21:49:12 cgd Exp $
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SRCS+= __main.c imax.c imin.c lmax.c lmin.c max.c min.c ulmax.c ulmin.c \
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bcmp.c bzero.c ffs.c strcat.c strcmp.c strcpy.c strlen.c strncmp.c \
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strncpy.c scanc.c skpc.c locc.c htonl.c htons.c ntohl.c ntohs.c \
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random.c
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# `source' files built from m4 source
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SRCS+= __divqu.S __divq.S __divlu.S __divl.S
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SRCS+= __remqu.S __remq.S __remlu.S __reml.S
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CLEANFILES+= __divqu.S __divq.S __divlu.S __divl.S
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CLEANFILES+= __remqu.S __remq.S __remlu.S __reml.S
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__divqu.S: ${.CURDIR}/arch/alpha/divrem.m4
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@echo 'building ${.TARGET} from ${.ALLSRC}'
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@(echo "define(NAME,\`__divqu')define(OP,\`div')define(S,\`false')"; \
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echo "define(WORDSIZE,64)"; cat ${.ALLSRC}) | m4 > ${.TARGET}
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__divq.S: ${.CURDIR}/arch/alpha/divrem.m4
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@echo 'building ${.TARGET} from ${.ALLSRC}'
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@(echo "define(NAME,\`__divq')define(OP,\`div')define(S,\`true')"; \
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echo "define(WORDSIZE,64)"; cat ${.ALLSRC}) | m4 > ${.TARGET}
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__divlu.S: ${.CURDIR}/arch/alpha/divrem.m4
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@echo 'building ${.TARGET} from ${.ALLSRC}'
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@(echo "define(NAME,\`__divlu')define(OP,\`div')define(S,\`false')"; \
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echo "define(WORDSIZE,32)"; cat ${.ALLSRC}) | m4 > ${.TARGET}
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__divl.S: ${.CURDIR}/arch/alpha/divrem.m4
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@echo 'building ${.TARGET} from ${.ALLSRC}'
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@(echo "define(NAME,\`__divl')define(OP,\`div')define(S,\`true')"; \
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echo "define(WORDSIZE,32)"; cat ${.ALLSRC}) | m4 > ${.TARGET}
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__remqu.S: ${.CURDIR}/arch/alpha/divrem.m4
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@echo 'building ${.TARGET} from ${.ALLSRC}'
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@(echo "define(NAME,\`__remqu')define(OP,\`rem')define(S,\`false')"; \
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echo "define(WORDSIZE,64)"; cat ${.ALLSRC}) | m4 > ${.TARGET}
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__remq.S: ${.CURDIR}/arch/alpha/divrem.m4
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@echo 'building ${.TARGET} from ${.ALLSRC}'
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@(echo "define(NAME,\`__remq')define(OP,\`rem')define(S,\`true')"; \
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echo "define(WORDSIZE,64)"; cat ${.ALLSRC}) | m4 > ${.TARGET}
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__remlu.S: ${.CURDIR}/arch/alpha/divrem.m4
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@echo 'building ${.TARGET} from ${.ALLSRC}'
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@(echo "define(NAME,\`__remlu')define(OP,\`rem')define(S,\`false')"; \
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echo "define(WORDSIZE,32)"; cat ${.ALLSRC}) | m4 > ${.TARGET}
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__reml.S: ${.CURDIR}/arch/alpha/divrem.m4
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@echo 'building ${.TARGET} from ${.ALLSRC}'
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@(echo "define(NAME,\`__reml')define(OP,\`rem')define(S,\`true')"; \
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echo "define(WORDSIZE,32)"; cat ${.ALLSRC}) | m4 > ${.TARGET}
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@ -0,0 +1,53 @@
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/* $NetBSD: SYS.h,v 1.1 1995/02/13 21:49:13 cgd Exp $ */
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/*
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* Copyright (c) 1994, 1995 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include <machine/asm.h>
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#include <sys/syscall.h>
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#define CALLSYS(num) \
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CONST(num, v0); \
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call_pal 0x83; /* op_callsys */
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#define SYSCALL_NOLABEL(x) \
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CALLSYS(SYS_/**/x); \
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beq a3, 9f; \
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br gp, 8f; \
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8: SETGP(gp); \
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lda at_reg, cerror; \
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jmp zero, (at_reg); \
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9:
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#define SYSCALL(x) LEAF(x, 0 /* XXX */); SYSCALL_NOLABEL(x);
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#define RSYSCALL(x) SYSCALL(x); RET; END(x);
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#define PSEUDO(x,y) \
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LEAF(x,0); /* unknown # of args */ \
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CALLSYS(SYS_/**/y); \
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RET; \
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END(x);
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@ -0,0 +1,169 @@
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/* $NetBSD: divrem.m4,v 1.1 1995/02/13 21:49:14 cgd Exp $ */
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/*
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* Copyright (c) 1994, 1995 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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/*
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* Division and remainder.
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*
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* The use of m4 is modeled after the sparc code, but the algorithm is
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* simple binary long division.
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*
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* Note that the loops could probably benefit from unrolling.
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*/
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/*
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* M4 Parameters
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* NAME name of function to generate
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* OP OP=div: t10 / t11 -> t12; OP=rem: t10 % t11 -> t12
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* S S=true: signed; S=false: unsigned [XXX NOT YET]
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* WORDSIZE total number of bits
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*/
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define(A, `t10')
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define(B, `t11')
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define(RESULT, `t12')
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define(BIT, `t0')
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define(I, `t1')
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define(CC, `t2')
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define(T_0, `t3')
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ifelse(S, `true', `define(SIGN, `t4')')
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#include "DEFS.h"
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LEAF(NAME, 0) /* XXX */
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lda sp, -48(sp)
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stq BIT, 0(sp)
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stq I, 8(sp)
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stq CC, 16(sp)
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stq T_0, 24(sp)
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ifelse(S, `true',
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` stq SIGN, 32(sp)')
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mov zero, RESULT /* Initialize result to zero */
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ifelse(S, `true',
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`
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/* Compute sign of result. If either is negative, this is easy. */
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or A, B, SIGN /* not the sign, but... */
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bgt SIGN, Ldoit /* neither negative? do it! */
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ifelse(OP, `div',
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` xor A, B, SIGN /* THIS is the sign! */
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', ` mov A, SIGN /* sign follows A. */
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')
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bge A, LnegB /* see if A is negative */
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/* A is negative; flip it. */
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subq zero, A, A
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bge B, Ldoit /* see if B is negative */
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LnegB:
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/* B is definitely negative, no matter how we got here. */
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subq zero, B, B
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Ldoit:
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')
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/* kill the special cases. */
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beq B, Ldotrap /* division by zero! XXX */
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1: cmpult A, B, CC /* A < B? */
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/* RESULT is already zero, from above. A is untouched. */
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bne CC, Lret_result
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cmpeq A, B, CC /* A == B? */
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cmovne CC, 1, RESULT
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cmovne CC, zero, A
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bne CC, Lret_result
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/*
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* Find out how many bits of zeros are at the beginning of the divisor.
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*/
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LBbits:
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CONST(1, T_0) /* I = 0; BIT = 1<<WORDSIZE-1 */
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mov zero, I
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sll T_0, WORDSIZE-1, BIT
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LBloop:
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and B, BIT, CC /* if bit in B is set, done. */
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bne CC, LAbits
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addq I, 1, I /* increment I, shift bit */
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srl BIT, 1, BIT
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cmplt I, WORDSIZE-1, CC /* if I leaves one bit, done. */
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bne CC, LBloop
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LAbits:
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beq I, Ldodiv /* If I = 0, divide now. */
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CONST(1, T_0) /* BIT = 1<<WORDSIZE-1 */
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sll T_0, WORDSIZE-1, BIT
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LAloop:
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and A, BIT, CC /* if bit in A is set, done. */
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bne CC, Ldodiv
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subq I, 1, I /* decrement I, shift bit */
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srl BIT, 1, BIT
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bne I, LAloop /* If I != 0, loop again */
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Ldodiv:
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sll B, I, B /* B <<= i */
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CONST(1, T_0)
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sll T_0, I, BIT
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Ldivloop:
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cmpult A, B, CC
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or RESULT, BIT, T_0
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cmoveq CC, T_0, RESULT
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subq A, B, T_0
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cmoveq CC, T_0, A
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srl BIT, 1, BIT
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srl B, 1, B
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beq A, Lret_result
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bne BIT, Ldivloop
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Lret_result:
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ifelse(OP, `div',
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`', ` mov A, RESULT
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')
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ifelse(S, `true',
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`
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/* Check to see if we should negate it. */
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subqv zero, RESULT, T_0
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cmovlt SIGN, T_0, RESULT
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')
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ldq BIT, 0(sp)
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ldq I, 8(sp)
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ldq CC, 16(sp)
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ldq T_0, 24(sp)
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ifelse(S, `true',
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` ldq SIGN, 32(sp)')
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lda sp, 48(sp)
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ret zero, (t9), 1
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Ldotrap:
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CONST(-2, a0) /* This is the signal to SIGFPE! */
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call_pal PAL_gentrap
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br zero, Lret_result
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END(NAME)
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