'040 changes from Amiga.
Protect against multiple inclusion. Swap arguments in struct clockframe.
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@ -57,7 +57,7 @@
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* from: Utah $Hdr: cpu.h 1.16 91/03/25$
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* from: Utah $Hdr: cpu.h 1.16 91/03/25$
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*
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*
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* from: @(#)cpu.h 7.7 (Berkeley) 6/27/91
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* from: @(#)cpu.h 7.7 (Berkeley) 6/27/91
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* $Id: cpu.h,v 1.7 1994/03/01 15:22:47 briggs Exp $
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* $Id: cpu.h,v 1.8 1994/04/21 23:18:55 briggs Exp $
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*/
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*/
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/*
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/*
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@ -68,6 +68,9 @@
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but there isn't time to do anything about that right now...
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but there isn't time to do anything about that right now...
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*/
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*/
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#ifndef _MACHINE_CPU_H_
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#define _MACHINE_CPU_H_ 1
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/*
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/*
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* definitions of cpu-dependent requirements
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* definitions of cpu-dependent requirements
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* referenced in generic code
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* referenced in generic code
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@ -84,8 +87,6 @@
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#undef NEED_BCMP /* don't need bcmp function */
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#undef NEED_BCMP /* don't need bcmp function */
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#undef NEED_STRLEN /* don't need strlen function */
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#undef NEED_STRLEN /* don't need strlen function */
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/* ALICE BG -- Sun May 24 11:31:35 EDT 1992 -- what the hell do these things */
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/* do? */
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#define cpu_exec(p) /* nothing */
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#define cpu_exec(p) /* nothing */
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#define cpu_wait(p) /* nothing */
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#define cpu_wait(p) /* nothing */
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@ -95,12 +96,10 @@
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* clockframe; for hp300, use just what the hardware
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* clockframe; for hp300, use just what the hardware
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* leaves on the stack.
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* leaves on the stack.
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*/
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*/
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/* ALICE 05/23/92 BG -- Oh, no. What does a VIA intleave on the stack? */
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/* ALICE 06/27/92 LK -- Make sure hardware clock routine does this: */
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typedef struct intrframe {
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typedef struct intrframe {
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int pc;
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int ps;
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int ps;
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int pc;
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} clockframe;
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} clockframe;
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#define CLKF_USERMODE(framep) (((framep)->ps & PSL_S) == 0)
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#define CLKF_USERMODE(framep) (((framep)->ps & PSL_S) == 0)
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@ -199,6 +198,11 @@ extern unsigned char ssir;
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#define MACH_68040 2
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#define MACH_68040 2
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#define MACH_PENTIUM 3 /* 66 and 99 MHz versions *only* */
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#define MACH_PENTIUM 3 /* 66 and 99 MHz versions *only* */
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/* Defines for mmutype */
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#define MMU_68851 -1
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#define MMU_68030 0
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#define MMU_68040 1
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/* values for cpuspeed (not really related to clock speed due to caches) */
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/* values for cpuspeed (not really related to clock speed due to caches) */
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#define MHZ_8 1
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#define MHZ_8 1
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#define MHZ_16 2
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#define MHZ_16 2
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@ -287,8 +291,18 @@ extern int booter_version;
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#define DC_BE 0x1000 /* data burst enable */
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#define DC_BE 0x1000 /* data burst enable */
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#define DC_WA 0x2000 /* write allocate */
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#define DC_WA 0x2000 /* write allocate */
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/* fields in the 68040 cache control register */
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#define IC40_ENABLE 0x00008000 /* enable instruction cache */
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#define DC40_ENABLE 0x80000000 /* enable data cache */
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#define CACHE_ON (DC_WA|DC_BE|DC_CLR|DC_ENABLE|IC_BE|IC_CLR|IC_ENABLE)
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#define CACHE_ON (DC_WA|DC_BE|DC_CLR|DC_ENABLE|IC_BE|IC_CLR|IC_ENABLE)
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#define CACHE_OFF (DC_CLR|IC_CLR)
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#define CACHE_OFF (DC_CLR|IC_CLR)
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#define CACHE_CLR (CACHE_ON)
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#define CACHE_CLR (CACHE_ON)
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#define IC_CLEAR (DC_WA|DC_BE|DC_ENABLE|IC_BE|IC_CLR|IC_ENABLE)
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#define IC_CLEAR (DC_WA|DC_BE|DC_ENABLE|IC_BE|IC_CLR|IC_ENABLE)
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#define DC_CLEAR (DC_WA|DC_BE|DC_CLR|DC_ENABLE|IC_BE|IC_ENABLE)
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#define DC_CLEAR (DC_WA|DC_BE|DC_CLR|DC_ENABLE|IC_BE|IC_ENABLE)
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/* 68040 cache control */
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#define CACHE40_ON (IC40_ENABLE|DC40_ENABLE)
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#define CACHE40_OFF 0x00000000
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#endif /* !_MACHINE_CPU_H_ */
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