Fixup some pmap / VM related #defines and code

sys/arch/riscv/include/pmap.h

@@ -1,11 +1,12 @@
-/* $NetBSD: pmap.h,v 1.8 2020/12/20 16:38:25 skrll Exp $ */
+/* $NetBSD: pmap.h,v 1.9 2021/05/01 07:41:24 skrll Exp $ */
 
 /*
- * Copyright (c) 2014, 2019 The NetBSD Foundation, Inc.
+ * Copyright (c) 2014, 2019, 2021 The NetBSD Foundation, Inc.
  * All rights reserved.
  *
  * This code is derived from software contributed to The NetBSD Foundation
- * by Matt Thomas (of 3am Software Foundry) and Maxime Villard.
+ * by Matt Thomas (of 3am Software Foundry), Maxime Villard, and
+ * Nick Hudson.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -38,6 +39,7 @@
 
 #if !defined(_MODULE)
 
+#include <sys/cdefs.h>
 #include <sys/types.h>
 #include <sys/pool.h>
 #include <sys/evcnt.h>
@@ -46,26 +48,35 @@
 #include <uvm/pmap/vmpagemd.h>
 
 #include <riscv/pte.h>
+#include <riscv/sysreg.h>
 
 #define PMAP_SEGTABSIZE	NPTEPG
-
+#define PMAP_PDETABSIZE	NPTEPG
-#define NBSEG		(PAGE_SIZE * NPTEPG)
 
 #ifdef _LP64
-#define NBXSEG		(NBSEG * NSEGPG)
+#define PTPSHIFT	3
-#define XSEGSHIFT	(SEGSHIFT + PGSHIFT - 3)
+/* This is SV48. */
-#define XSEGOFSET	(PTE_PPN1 | SEGOFSET)
+//#define SEGLENGTH + SEGSHIFT + SEGSHIFT */
-#define SEGSHIFT	(PGSHIFT + PGSHIFT - 3)
+
+/* This is SV39. */
+#define XSEGSHIFT	(SEGSHIFT + SEGLENGTH)
+#define NBXSEG		(1ULL << XSEGSHIFT)
+#define XSEGOFSET	(NBXSEG - 1)		/* byte offset into xsegment */
+#define XSEGLENGTH	(PGSHIFT - 3)
+#define NXSEGPG		(1 << XSEGLENGTH)
 #else
-#define SEGSHIFT	(PGSHIFT + PGSHIFT - 2)
+#define PTPSHIFT	2
+#define XSEGSHIFT	SEGLENGTH
 #endif
 
-#define SEGOFSET	(PTE_PPN0|PAGE_MASK)
+#define SEGLENGTH	(PGSHIFT - PTPSHIFT)
+#define SEGSHIFT	(SEGLENGTH + PGSHIFT)
+#define NBSEG		(1 << SEGSHIFT)		/* bytes/segment */
+#define SEGOFSET	(NBSEG - 1)		/* byte offset into segment */
 
 #define KERNEL_PID	0
 
 #define PMAP_HWPAGEWALKER		1
-#define PMAP_TLB_NUM_PIDS		256
 #define PMAP_TLB_MAX			1
 #ifdef _LP64
 #define PMAP_INVALID_PDETAB_ADDRESS	((pmap_pdetab_t *)(VM_MIN_KERNEL_ADDRESS - PAGE_SIZE))
@@ -74,6 +85,8 @@
 #define PMAP_INVALID_PDETAB_ADDRESS	((pmap_pdetab_t *)0xdeadbeef)
 #define PMAP_INVALID_SEGTAB_ADDRESS	((pmap_segtab_t *)0xdeadbeef)
 #endif
+#define PMAP_TLB_NUM_PIDS		(__SHIFTOUT_MASK(SATP_ASID) + 1)
+#define PMAP_TLB_BITMAP_LENGTH          PMAP_TLB_NUM_PIDS
 #define PMAP_TLB_FLUSH_ASID_ON_RESET	false
 
 #define pmap_phys_address(x)		(x)
@@ -120,9 +133,9 @@ paddr_t	pmap_md_direct_mapped_vaddr_to_paddr(vaddr_t);
 vaddr_t	pmap_md_direct_map_paddr(paddr_t);
 void	pmap_md_init(void);
 bool	pmap_md_tlb_check_entry(void *, vaddr_t, tlb_asid_t, pt_entry_t);
-void    pmap_md_page_syncicache(struct vm_page_md *, const kcpuset_t *);
 
-void	pmap_md_pdetab_activate(struct pmap *);
+void	pmap_md_xtab_activate(struct pmap *, struct lwp *);
+void	pmap_md_xtab_deactivate(struct pmap *);
 void	pmap_md_pdetab_init(struct pmap *);
 bool	pmap_md_ok_to_steal_p(const uvm_physseg_t, size_t);
 
@@ -131,6 +144,9 @@ extern vaddr_t pmap_direct_end;
 #define PMAP_DIRECT_MAP(pa)	(pmap_direct_base + (pa))
 #define PMAP_DIRECT_UNMAP(va)	((paddr_t)(va) - pmap_direct_base)
 
+#define MEGAPAGE_TRUNC(x)	((x) & ~SEGOFSET)
+#define MEGAPAGE_ROUND(x)	MEGAPAGE_TRUNC((x) + SEGOFSET)
+
 #ifdef __PMAP_PRIVATE
 static inline void
 pmap_md_page_syncicache(struct vm_page_md *mdpg, const kcpuset_t *kc)
@@ -150,7 +166,6 @@ pmap_md_vca_add(struct vm_page_md *mdpg, vaddr_t va, pt_entry_t *nptep)
 static inline void
 pmap_md_vca_remove(struct vm_page_md *mdpg, vaddr_t va)
 {
-
 }
 
 static inline void
@@ -164,20 +179,6 @@ pmap_md_tlb_asid_max(void)
 	return PMAP_TLB_NUM_PIDS - 1;
 }
 
-static inline void
-pmap_md_xtab_activate(struct pmap *pm, struct lwp *l)
-{
-
-	/* nothing */
-}
-
-static inline void
-pmap_md_xtab_deactivate(struct pmap *pm)
-{
-
-	/* nothing */
-}
-
 #endif /* __PMAP_PRIVATE */
 #endif /* _KERNEL */
 

sys/arch/riscv/include/pte.h

@@ -1,11 +1,12 @@
-/* $NetBSD: pte.h,v 1.5 2020/11/01 19:47:46 skrll Exp $ */
+/* $NetBSD: pte.h,v 1.6 2021/05/01 07:41:24 skrll Exp $ */
 
 /*
- * Copyright (c) 2014, 2019 The NetBSD Foundation, Inc.
+ * Copyright (c) 2014, 2019, 2021 The NetBSD Foundation, Inc.
  * All rights reserved.
  *
  * This code is derived from software contributed to The NetBSD Foundation
- * by Matt Thomas (of 3am Software Foundry) and Maxime Villard.
+ * by Matt Thomas (of 3am Software Foundry), Maxime Villard, and
+ * Nick Hudson.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -56,7 +57,8 @@ typedef __uint32_t pd_entry_t;
 #define NPDEPG		NPTEPG
 
 /* Software PTE bits. */
-#define	PTE_WIRED	__BIT(8)
+#define	PTE_RSW		__BITS(9,8)
+#define	PTE_WIRED	__BIT(9)
 
 /* Hardware PTE bits. */
 // These are hardware defined bits
@@ -69,6 +71,11 @@ typedef __uint32_t pd_entry_t;
 #define	PTE_R		__BIT(1)	// Read
 #define	PTE_V		__BIT(0)	// Valid
 
+#define PTE_HARDWIRED	(PTE_A | PTE_D)
+#define PTE_KERN	(PTE_V | PTE_G)
+#define PTE_RW		(PTE_R | PTE_W)
+#define PTE_RX		(PTE_R | PTE_X)
+
 #define PA_TO_PTE(pa)	(((pa) >> PAGE_SHIFT) << PTE_PPN_SHIFT)
 #define PTE_TO_PA(pte)	(((pte) >> PTE_PPN_SHIFT) << PAGE_SHIFT)
 
@@ -91,6 +98,12 @@ typedef __uint32_t pd_entry_t;
 #define pl1_i(va)	(((va) >> L1_SHIFT) & Ln_ADDR_MASK)
 #define pl0_i(va)	(((va) >> L0_SHIFT) & Ln_ADDR_MASK)
 
+static inline const size_t
+pte_index(vaddr_t va)
+{
+	return ((va >> PGSHIFT) & (NPTEPG - 1));
+}
+
 static inline bool
 pte_valid_p(pt_entry_t pte)
 {
@@ -136,7 +149,7 @@ pte_unwire_entry(pt_entry_t pte)
 static inline paddr_t
 pte_to_paddr(pt_entry_t pte)
 {
-	return pte & ~PAGE_MASK;
+	return PTE_TO_PA(pte);
 }
 
 static inline pt_entry_t
@@ -224,7 +237,7 @@ pte_make_kenter_pa(paddr_t pa, struct vm_page_md *mdpg, vm_prot_t prot,
 {
 	pt_entry_t pte = (pt_entry_t)PA_TO_PTE(pa);
 
-	pte |= PTE_WIRED | PTE_V;
+	pte |= PTE_WIRED | PTE_G | PTE_V;
 	pte |= pte_flag_bits(NULL, flags, true);
 	pte |= pte_prot_bits(NULL, prot, true); /* pretend unmanaged */
 
@@ -237,6 +250,59 @@ pte_set(pt_entry_t *ptep, pt_entry_t pte)
 	*ptep = pte;
 }
 
+static inline pd_entry_t
+pte_invalid_pde(void)
+{
+	return 0;
+}
+
+static inline pd_entry_t
+pte_pde_pdetab(paddr_t pa, bool kernel_p)
+{
+	return PTE_V | (pa >> PAGE_SHIFT) << L2_SHIFT;
+}
+
+static inline pd_entry_t
+pte_pde_ptpage(paddr_t pa, bool kernel_p)
+{
+	return PTE_V | PTE_X | PTE_W | PTE_R | (pa >> PAGE_SHIFT) << L2_SHIFT;
+}
+
+static inline bool
+pte_pde_valid_p(pd_entry_t pde)
+{
+	return (pde & (PTE_X | PTE_W | PTE_R)) == 0;
+}
+
+static inline paddr_t
+pte_pde_to_paddr(pd_entry_t pde)
+{
+	return pte_to_paddr((pt_entry_t)pde);
+}
+
+static inline pd_entry_t
+pte_pde_cas(pd_entry_t *pdep, pd_entry_t opde, pt_entry_t npde)
+{
+#ifdef MULTIPROCESSOR
+#ifdef _LP64
+	return atomic_cas_64(pdep, opde, npde);
+#else
+	return atomic_cas_32(pdep, opde, npde);
+#endif
+#else
+	*pdep = npde;
+	return 0;
+#endif
+}
+
+static inline void
+pte_pde_set(pd_entry_t *pdep, pd_entry_t npde)
+{
+
+	*pdep = npde;
+}
+
+
 static inline pt_entry_t
 pte_value(pt_entry_t pte)
 {

sys/arch/riscv/include/vmparam.h

@@ -1,11 +1,11 @@
-/*	$NetBSD: vmparam.h,v 1.8 2021/02/26 02:18:29 simonb Exp $	*/
+/*	$NetBSD: vmparam.h,v 1.9 2021/05/01 07:41:24 skrll Exp $	*/
 
 /*-
- * Copyright (c) 2014 The NetBSD Foundation, Inc.
+ * Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
  * All rights reserved.
  *
  * This code is derived from software contributed to The NetBSD Foundation
- * by Matt Thomas of 3am Software Foundry.
+ * by Matt Thomas of 3am Software Foundry, and Nick Hudson.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -42,6 +42,10 @@
  * Machine dependent VM constants for RISCV.
  */
 
+/*
+ * We use a 4K page on both RV64 and RV32 systems.
+ * Override PAGE_* definitions to compile-time constants.
+ */
 #define	PAGE_SHIFT	PGSHIFT
 #define	PAGE_SIZE	(1 << PAGE_SHIFT)
 #define	PAGE_MASK	(PAGE_SIZE - 1)
@@ -105,17 +109,43 @@
  */
 #define VM_MIN_ADDRESS		((vaddr_t)0x00000000)
 #ifdef _LP64	/* Sv39 */
+/*
+ * kernel virtual space layout:
+ *   0xffff_ffc0_0000_0000  -   64GiB  KERNEL VM Space (inc. text/data/bss)
+ *  (0xffff_ffc0_4000_0000      +1GiB) KERNEL VM start of KVA
+ *  (0xffff_ffd0_0000_0000      64GiB) reserved
+ *   0xffff_ffe0_0000_0000  -  128GiB  direct mapping
+ */
 #define VM_MAXUSER_ADDRESS	((vaddr_t)0x0000004000000000 - 16 * PAGE_SIZE)
 #define VM_MIN_KERNEL_ADDRESS	((vaddr_t)0xffffffc000000000)
-#define VM_MAX_KERNEL_ADDRESS	((vaddr_t)0xffffffd000000000) /* MIN + 64GB */
+#define VM_MAX_KERNEL_ADDRESS	((vaddr_t)0xffffffd000000000)
+
 #else		/* Sv32 */
 #define VM_MAXUSER_ADDRESS	((vaddr_t)-0x7fffffff-1)/* 0xffffffff80000000 */
 #define VM_MIN_KERNEL_ADDRESS	((vaddr_t)-0x7fffffff-1)/* 0xffffffff80000000 */
 #define VM_MAX_KERNEL_ADDRESS	((vaddr_t)-0x40000000)	/* 0xffffffffc0000000 */
+
 #endif
+#define VM_KERNEL_VM_BASE	VM_MIN_KERNEL_ADDRESS
+#define VM_KERNEL_VM_SIZE	0x2000000	 /* 32 MiB (8 / 16 megapages) */
+
 #define VM_MAX_ADDRESS		VM_MAXUSER_ADDRESS
 #define VM_MAXUSER_ADDRESS32	((vaddr_t)(1UL << 31))/* 0x0000000080000000 */
 
+#ifdef _LP64
+/*
+ * Since we have the address space, we map all of physical memory (RAM)
+ * using block page table entries.
+ */
+#define RISCV_DIRECTMAP_MASK	((vaddr_t) 0xffffffe000000000L)
+#define RISCV_DIRECTMAP_SIZE	(-RISCV_DIRECTMAP_MASK)	/* 128GiB */
+#define RISCV_DIRECTMAP_START	RISCV_DIRECTMAP_MASK
+#define RISCV_DIRECTMAP_END	(RISCV_DIRECTMAP_START + RISCV_DIRECTMAP_SIZE)
+#define RISCV_KVA_P(va)	(((vaddr_t) (va) & RISCV_DIRECTMAP_MASK) != 0)
+#define RISCV_PA_TO_KVA(pa)	((vaddr_t) ((pa) | RISCV_DIRECTMAP_START))
+#define RISCV_KVA_TO_PA(va)	((paddr_t) ((va) & ~RISCV_DIRECTMAP_MASK))
+#endif
+
 /*
  * The address to which unspecified mapping requests default
  */
@@ -139,7 +169,7 @@
 #define VM_PHYSSEG_MAX		1
 #endif
 #if VM_PHYSSEG_MAX == 1
-#define	VM_PHYSSEG_STRAT	VM_PSTRAT_LINEAR
+#define	VM_PHYSSEG_STRAT	VM_PSTRAT_BIGFIRST
 #else
 #define	VM_PHYSSEG_STRAT	VM_PSTRAT_BSEARCH
 #endif

sys/arch/riscv/riscv/pmap_machdep.c

@@ -1,11 +1,12 @@
-/* $NetBSD: pmap_machdep.c,v 1.6 2020/03/14 16:12:16 skrll Exp $ */
+/* $NetBSD: pmap_machdep.c,v 1.7 2021/05/01 07:41:24 skrll Exp $ */
 
 /*
- * Copyright (c) 2014, 2019 The NetBSD Foundation, Inc.
+ * Copyright (c) 2014, 2019, 2021 The NetBSD Foundation, Inc.
  * All rights reserved.
  *
  * This code is derived from software contributed to The NetBSD Foundation
- * by Matt Thomas (of 3am Software Foundry) and Maxime Villard.
+ * by Matt Thomas (of 3am Software Foundry), Maxime Villard, and
+ * Nick Hudson.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -33,7 +34,7 @@
 
 #include <sys/cdefs.h>
 
-__RCSID("$NetBSD: pmap_machdep.c,v 1.6 2020/03/14 16:12:16 skrll Exp $");
+__RCSID("$NetBSD: pmap_machdep.c,v 1.7 2021/05/01 07:41:24 skrll Exp $");
 
 #include <sys/param.h>
 
@@ -143,11 +144,16 @@ pmap_md_tlb_check_entry(void *ctx, vaddr_t va, tlb_asid_t asid, pt_entry_t pte)
 }
 
 void
-pmap_md_pdetab_activate(struct pmap *pmap)
+pmap_md_xtab_activate(struct pmap *pmap, struct lwp *l)
 {
 	__asm("csrw\tsptbr, %0" :: "r"(pmap->pm_md.md_ptbr));
 }
 
+void
+pmap_md_xtab_deactivate(struct pmap *pmap)
+{
+}
+
 void
 pmap_md_pdetab_init(struct pmap *pmap)
 {