Switch earmv6{,hf}eb to BE8 in kernel side.
My strategy here is to define _ARM_ARCH_BE8 macro in arm/cdefs.h, if __ARMEB__ && _ARM_ARCH_6. Use this macro to determine whether system is compiled for and running on BE8 mode or not. Note that, for __ARMEB__, some conditions become compile-time constants determined by _ARM_ARCH_BE8 macro, e.g., whether BE8 or BE32 are accepted as a userland binary, or unaligned memory access is possible or not.
This commit is contained in:
rin
parent
a3e196b030
commit
e092cf89bf
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@ -1,4 +1,4 @@
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/* $NetBSD: arm_machdep.c,v 1.64 2020/08/14 16:18:36 skrll Exp $ */
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/* $NetBSD: arm_machdep.c,v 1.65 2020/12/01 02:43:13 rin Exp $ */
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/*
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* Copyright (c) 2001 Wasabi Systems, Inc.
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@ -80,7 +80,7 @@
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#include <sys/param.h>
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__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.64 2020/08/14 16:18:36 skrll Exp $");
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__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.65 2020/12/01 02:43:13 rin Exp $");
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#include <sys/atomic.h>
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#include <sys/cpu.h>
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@ -176,15 +176,14 @@ setregs(struct lwp *l, struct exec_package *pack, vaddr_t stack)
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tf->tf_usr_lr = pack->ep_entry;
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tf->tf_svc_lr = 0x77777777; /* Something we can see */
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tf->tf_pc = pack->ep_entry;
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#if defined(__ARMEB__)
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/*
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* If we are running on ARMv7, we need to set the E bit to force
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* programs to start as big endian.
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*/
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tf->tf_spsr = PSR_USR32_MODE | (CPU_IS_ARMV7_P() ? PSR_E_BIT : 0);
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#else
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tf->tf_spsr = PSR_USR32_MODE;
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#endif /* __ARMEB__ */
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#ifdef _ARM_ARCH_BE8
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/*
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* If we are running on BE8 mode, we need to set the E bit to
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* force programs to start as big endian.
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*/
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tf->tf_spsr |= PSR_E_BIT;
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#endif
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#ifdef THUMB_CODE
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if (pack->ep_entry & 1)
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu_exec.c,v 1.12 2020/11/12 01:03:22 rin Exp $ */
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/* $NetBSD: cpu_exec.c,v 1.13 2020/12/01 02:43:13 rin Exp $ */
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/*-
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* Copyright (c) 2012 The NetBSD Foundation, Inc.
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@ -30,7 +30,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cpu_exec.c,v 1.12 2020/11/12 01:03:22 rin Exp $");
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__KERNEL_RCSID(0, "$NetBSD: cpu_exec.c,v 1.13 2020/12/01 02:43:13 rin Exp $");
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#include "opt_compat_netbsd.h"
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@ -72,8 +72,11 @@ arm_netbsd_elf32_probe(struct lwp *l, struct exec_package *epp, void *eh0,
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* If the BE-8 model is supported, CPSR[7] will be clear.
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* If the BE-32 model is supported, CPSR[7] will be set.
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*/
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register_t ctl = armreg_sctlr_read();
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if (((ctl & CPU_CONTROL_BEND_ENABLE) != 0) == be8_p)
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#ifdef _ARM_ARCH_BE8
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if (!be8_p)
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#else
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if (be8_p)
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#endif
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return ENOEXEC;
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#endif /* __ARMEB__ */
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@ -111,7 +114,14 @@ arm_netbsd_elf32_probe(struct lwp *l, struct exec_package *epp, void *eh0,
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* If we are AAPCS (EABI) and armv6/armv7, we want alignment faults
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* to be off.
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*/
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if (aapcs_p && (CPU_IS_ARMV7_P() || CPU_IS_ARMV6_P())) {
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#if defined(__ARMEL__)
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if (aapcs_p && (CPU_IS_ARMV7_P() || CPU_IS_ARMV6_P()))
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#elif defined(_ARM_ARCH_BE8)
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if (aapcs_p)
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#else
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if (false /* CONSTCOND */)
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#endif
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{
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l->l_md.md_flags |= MDLWP_NOALIGNFLT;
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} else {
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l->l_md.md_flags &= ~MDLWP_NOALIGNFLT;
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@ -1,4 +1,4 @@
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/* $NetBSD: arm32_boot.c,v 1.40 2020/09/11 06:40:25 skrll Exp $ */
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/* $NetBSD: arm32_boot.c,v 1.41 2020/12/01 02:43:14 rin Exp $ */
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/*
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* Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved.
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@ -122,7 +122,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(1, "$NetBSD: arm32_boot.c,v 1.40 2020/09/11 06:40:25 skrll Exp $");
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__KERNEL_RCSID(1, "$NetBSD: arm32_boot.c,v 1.41 2020/12/01 02:43:14 rin Exp $");
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#include "opt_arm_debug.h"
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#include "opt_cputypes.h"
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@ -191,10 +191,9 @@ initarm_common(vaddr_t kvm_base, vsize_t kvm_size,
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memset(tf, 0, sizeof(*tf));
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lwp_settrapframe(l, tf);
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#if defined(__ARMEB__)
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tf->tf_spsr = PSR_USR32_MODE | (CPU_IS_ARMV7_P() ? PSR_E_BIT : 0);
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#else
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tf->tf_spsr = PSR_USR32_MODE;
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#ifdef _ARM_ARCH_BE8
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tf->tf_spsr |= PSR_E_BIT;
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#endif
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VPRINTF("bootstrap done.\n");
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@ -1,4 +1,4 @@
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/* $NetBSD: arm32_machdep.c,v 1.138 2020/10/30 18:54:36 skrll Exp $ */
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/* $NetBSD: arm32_machdep.c,v 1.139 2020/12/01 02:43:14 rin Exp $ */
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/*
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* Copyright (c) 1994-1998 Mark Brinicombe.
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@ -42,7 +42,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: arm32_machdep.c,v 1.138 2020/10/30 18:54:36 skrll Exp $");
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__KERNEL_RCSID(0, "$NetBSD: arm32_machdep.c,v 1.139 2020/12/01 02:43:14 rin Exp $");
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#include "opt_arm_debug.h"
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#include "opt_arm_start.h"
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@ -348,10 +348,9 @@ cpu_startup(void)
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memset(tf, 0, sizeof(*tf));
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lwp_settrapframe(l, tf);
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#if defined(__ARMEB__)
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tf->tf_spsr = PSR_USR32_MODE | (CPU_IS_ARMV7_P() ? PSR_E_BIT : 0);
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#else
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tf->tf_spsr = PSR_USR32_MODE;
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#ifdef _ARM_ARCH_BE8
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tf->tf_spsr |= PSR_E_BIT;
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#endif
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cpu_startup_hook();
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@ -538,7 +537,14 @@ SYSCTL_SETUP(sysctl_machdep_setup, "sysctl machdep subtree setup")
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CTLTYPE_INT, "printfataltraps", NULL,
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NULL, 0, &cpu_printfataltraps, 0,
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CTL_MACHDEP, CTL_CREATE, CTL_EOL);
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cpu_unaligned_sigbus = !CPU_IS_ARMV6_P() && !CPU_IS_ARMV7_P();
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cpu_unaligned_sigbus =
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#if defined(__ARMEL__)
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!CPU_IS_ARMV6_P() && !CPU_IS_ARMV7_P();
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#elif defined(_ARM_ARCH_BE8)
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0;
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#else
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1;
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#endif
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sysctl_createv(clog, 0, NULL, NULL,
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CTLFLAG_PERMANENT|CTLFLAG_READONLY,
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CTLTYPE_INT, "unaligned_sigbus",
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@ -1,4 +1,4 @@
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/* $NetBSD: kobj_machdep.c,v 1.14 2020/06/20 07:10:36 skrll Exp $ */
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/* $NetBSD: kobj_machdep.c,v 1.15 2020/12/01 02:43:14 rin Exp $ */
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/*-
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* Copyright (c) 2008 The NetBSD Foundation, Inc.
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@ -52,7 +52,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: kobj_machdep.c,v 1.14 2020/06/20 07:10:36 skrll Exp $");
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__KERNEL_RCSID(0, "$NetBSD: kobj_machdep.c,v 1.15 2020/12/01 02:43:14 rin Exp $");
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#define ELFSIZE ARCH_ELFSIZE
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@ -209,7 +209,7 @@ kobj_reloc(kobj_t ko, uintptr_t relocbase, const void *data,
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return -1;
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}
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#if __ARMEB__
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#ifdef _ARM_ARCH_BE8
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enum be8_magic_sym_type {
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Other, ArmStart, ThumbStart, DataStart
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@ -400,8 +400,8 @@ kobj_machdep(kobj_t ko, void *base, size_t size, bool load)
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{
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if (load) {
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#if __ARMEB__
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if (CPU_IS_ARMV7_P() && base == (void*)ko->ko_text_address)
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#ifdef _ARM_ARCH_BE8
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if (base == (void*)ko->ko_text_address)
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kobj_be8_fixup(ko);
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#endif
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#ifndef _RUMPKERNEL
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@ -1,4 +1,4 @@
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/* $NetBSD: cdefs.h,v 1.18 2020/11/03 08:34:17 skrll Exp $ */
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/* $NetBSD: cdefs.h,v 1.19 2020/12/01 02:43:14 rin Exp $ */
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#ifndef _ARM_CDEFS_H_
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#define _ARM_CDEFS_H_
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#define _ARM_ARCH_DWORD_OK
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#endif
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#if defined (__ARMEB__) && defined (_ARM_ARCH_6)
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#define _ARM_ARCH_BE8
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#endif
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#if defined(__ARM_PCS_AAPCS64)
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#define __ALIGNBYTES (sizeof(__int128_t) - 1)
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#elif defined(__ARM_EABI__)
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