From dee13e6f7d339319c552dd80c2f82f925f956f01 Mon Sep 17 00:00:00 2001 From: tsutsui Date: Fri, 27 Oct 2006 13:26:34 +0000 Subject: [PATCH] Remove redundant byteswap ops. --- sys/dev/ic/rtl8169.c | 14 ++++++++------ sys/dev/ic/rtl81x9var.h | 5 +---- 2 files changed, 9 insertions(+), 10 deletions(-) diff --git a/sys/dev/ic/rtl8169.c b/sys/dev/ic/rtl8169.c index fcedd90635f1..b2be1030ca0e 100644 --- a/sys/dev/ic/rtl8169.c +++ b/sys/dev/ic/rtl8169.c @@ -1,4 +1,4 @@ -/* $NetBSD: rtl8169.c,v 1.48 2006/10/24 11:17:49 tsutsui Exp $ */ +/* $NetBSD: rtl8169.c,v 1.49 2006/10/27 13:26:34 tsutsui Exp $ */ /* * Copyright (c) 1997, 1998-2003 @@ -1757,6 +1757,7 @@ static int re_init(struct ifnet *ifp) { struct rtk_softc *sc = ifp->if_softc; + uint8_t *enaddr; uint32_t rxcfg = 0; uint32_t reg; int error; @@ -1815,11 +1816,12 @@ re_init(struct ifnet *ifp) * register write enable" mode to modify the ID registers. */ CSR_WRITE_1(sc, RTK_EECMD, RTK_EEMODE_WRITECFG); - memcpy(®, LLADDR(ifp->if_sadl), 4); - CSR_WRITE_STREAM_4(sc, RTK_IDR0, reg); - reg = 0; - memcpy(®, LLADDR(ifp->if_sadl) + 4, 4); - CSR_WRITE_STREAM_4(sc, RTK_IDR4, reg); + enaddr = LLADDR(ifp->if_sadl); + reg = enaddr[0] | (enaddr[1] << 8) | + (enaddr[2] << 16) | (enaddr[3] << 24); + CSR_WRITE_4(sc, RTK_IDR0, reg); + reg = enaddr[4] | (enaddr[5] << 8); + CSR_WRITE_4(sc, RTK_IDR4, reg); CSR_WRITE_1(sc, RTK_EECMD, RTK_EEMODE_OFF); /* diff --git a/sys/dev/ic/rtl81x9var.h b/sys/dev/ic/rtl81x9var.h index 5736f749ae56..2e7c08cf3f99 100644 --- a/sys/dev/ic/rtl81x9var.h +++ b/sys/dev/ic/rtl81x9var.h @@ -1,4 +1,4 @@ -/* $NetBSD: rtl81x9var.h,v 1.26 2006/10/27 09:57:26 tsutsui Exp $ */ +/* $NetBSD: rtl81x9var.h,v 1.27 2006/10/27 13:26:34 tsutsui Exp $ */ /* * Copyright (c) 1997, 1998 @@ -208,9 +208,6 @@ struct rtk_softc { bus_space_write_2(sc->rtk_btag, sc->rtk_bhandle, reg, val) #define CSR_WRITE_1(sc, reg, val) \ bus_space_write_1(sc->rtk_btag, sc->rtk_bhandle, reg, val) -#define CSR_WRITE_STREAM_4(sc, reg, val) \ - bus_space_write_stream_4(sc->rtk_btag, sc->rtk_bhandle, reg, val) - #define CSR_READ_4(sc, reg) \ bus_space_read_4(sc->rtk_btag, sc->rtk_bhandle, reg)