there is more to MSI/MSI-X support in ciss(4) than just allocating the
right interrupt, it needs some explicit support; disable for now until the full support is there PR kern/55461
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46b33b4ba4
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@ -1,4 +1,4 @@
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/* $NetBSD: ciss_pci.c,v 1.16 2020/07/04 14:49:24 jdolecek Exp $ */
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/* $NetBSD: ciss_pci.c,v 1.17 2020/07/05 19:28:37 jdolecek Exp $ */
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/* $OpenBSD: ciss_pci.c,v 1.9 2005/12/13 15:56:01 brad Exp $ */
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/*
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@ -19,7 +19,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ciss_pci.c,v 1.16 2020/07/04 14:49:24 jdolecek Exp $");
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__KERNEL_RCSID(0, "$NetBSD: ciss_pci.c,v 1.17 2020/07/05 19:28:37 jdolecek Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -263,7 +263,7 @@ ciss_pci_attach(device_t parent, device_t self, void *aux)
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struct ciss_softc *sc = device_private(self);
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struct pci_attach_args *pa = aux;
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bus_size_t size, cfgsz;
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pci_intr_handle_t *ih;
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pci_intr_handle_t ih;
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const char *intrstr;
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int cfg_bar, memtype;
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pcireg_t reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
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@ -339,16 +339,16 @@ ciss_pci_attach(device_t parent, device_t self, void *aux)
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bus_space_read_4(sc->sc_iot, sc->sc_ioh, CISS_IMR) | sc->iem);
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#endif
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if (pci_intr_alloc(pa, &ih, NULL, 0) != 0) {
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if (pci_intr_map(pa, &ih)) {
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aprint_error_dev(self, "can't map interrupt\n");
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bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
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if (cfg_bar != CISS_BAR)
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bus_space_unmap(sc->sc_iot, sc->cfg_ioh, cfgsz);
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return;
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}
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intrstr = pci_intr_string(pa->pa_pc, ih[0], intrbuf, sizeof(intrbuf));
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sc->sc_ih = pci_intr_establish_xname(pa->pa_pc, ih[0], IPL_BIO,
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ciss_intr, sc, device_xname(self));
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intrstr = pci_intr_string(pa->pa_pc, ih, intrbuf, sizeof(intrbuf));
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sc->sc_ih = pci_intr_establish_xname(pa->pa_pc, ih, IPL_BIO, ciss_intr,
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sc, device_xname(self));
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if (!sc->sc_ih) {
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aprint_error_dev(sc->sc_dev, "can't establish interrupt");
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if (intrstr)
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