* Define prologue/epilogue macros for the cache clean functions,
and use them, rather than replicating the code several times. * Use numbered labels for loops.
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thorpej
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@ -1,4 +1,4 @@
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/* $NetBSD: cpufunc_asm_sa1.S,v 1.1 2001/11/10 23:14:09 thorpej Exp $ */
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/* $NetBSD: cpufunc_asm_sa1.S,v 1.2 2001/11/11 00:41:48 thorpej Exp $ */
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/*
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* Copyright (c) 1997,1998 Mark Brinicombe.
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@ -137,99 +137,78 @@ Lsa110_cache_clean_addr:
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Lsa110_cache_clean_size:
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.word _C_LABEL(sa110_cache_clean_size)
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#ifdef CACHE_CLEAN_BLOCK_INTR
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#define SA1_CACHE_CLEAN_BLOCK \
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mrs r3, cpsr_all ; \
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orr r0, r3, #(I32_bit | F32_bit) ; \
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msr cpsr_all, r0
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#define SA1_CACHE_CLEAN_UNBLOCK \
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msrcpsr_all, r3
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#else
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#define SA1_CACHE_CLEAN_BLOCK \
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ldr r3, Lblock_userspace_access ; \
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ldr ip, [r3] ; \
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orr r0, ip, #1 ; \
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str r0, [r3]
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#define SA1_CACHE_CLEAN_UNBLOCK \
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str ip, [r3]
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#endif /* CACHE_CLEAN_BLOCK_INTR */
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#ifdef DOUBLE_CACHE_CLEAN_BANK
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#define SA1_DOUBLE_CACHE_CLEAN_BANK \
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eor r0, r0, r1 ; \
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str r0, [r2]
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#else
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#define SA1_DOUBLE_CACHE_CLEAN_BANK /* nothing */
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#endif /* DOUBLE_CACHE_CLEAN_BANK */
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#define SA1_CACHE_CLEAN_PROLOGUE \
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SA1_CACHE_CLEAN_BLOCK ; \
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ldr r2, Lsa110_cache_clean_addr ; \
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ldmia r2, {r0, r1} ; \
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SA1_DOUBLE_CACHE_CLEAN_BANK
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#define SA1_CACHE_CLEAN_EPILOGUE \
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SA1_CACHE_CLEAN_UNBLOCK
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ENTRY(sa110_cache_cleanID)
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ENTRY(sa110_cache_cleanD)
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#ifdef CACHE_CLEAN_BLOCK_INTR
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mrs r3, cpsr_all
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orr r0, r3, #(I32_bit | F32_bit)
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msr cpsr_all, r0
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#else
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ldr r3, Lblock_userspace_access
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ldr ip, [r3]
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orr r0, ip, #1
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str r0, [r3]
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#endif
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ldr r2, Lsa110_cache_clean_addr
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ldmia r2, {r0, r1}
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#ifdef DOUBLE_CACHE_CLEAN_BANK
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eor r0, r0, r1
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str r0, [r2]
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#endif
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SA1_CACHE_CLEAN_PROLOGUE
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Lsa110_cache_cleanD_loop:
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ldr r2, [r0], #32
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1: ldr r2, [r0], #32
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subs r1, r1, #32
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bne Lsa110_cache_cleanD_loop
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bne 1b
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mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
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#ifdef CACHE_CLEAN_BLOCK_INTR
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msr cpsr_all, r3
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#else
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str ip, [r3]
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#endif
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SA1_CACHE_CLEAN_EPILOGUE
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mov pc, lr
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ENTRY(sa110_cache_purgeID)
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#ifdef CACHE_CLEAN_BLOCK_INTR
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mrs r3, cpsr_all
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orr r0, r3, #(I32_bit | F32_bit)
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msr cpsr_all, r0
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#else
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ldr r3, Lblock_userspace_access
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ldr ip, [r3]
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orr r0, ip, #1
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str r0, [r3]
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#endif
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ldr r2, Lsa110_cache_clean_addr
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ldmia r2, {r0, r1}
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#ifdef DOUBLE_CACHE_CLEAN_BANK
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eor r0, r0, r1
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str r0, [r2]
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#endif
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SA1_CACHE_CLEAN_PROLOGUE
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Lsa110_cache_purgeID_loop:
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ldr r2, [r0], #32
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1: ldr r2, [r0], #32
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subs r1, r1, #32
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bne Lsa110_cache_purgeID_loop
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bne 1b
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mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
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mcr p15, 0, r0, c7, c5, 0 /* flush I cache (D flushed above) */
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#ifdef CACHE_CLEAN_BLOCK_INTR
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msr cpsr_all, r3
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#else
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str ip, [r3]
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#endif
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SA1_CACHE_CLEAN_EPILOGUE
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mov pc, lr
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ENTRY(sa110_cache_purgeD)
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#ifdef CACHE_CLEAN_BLOCK_INTR
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mrs r3, cpsr_all
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orr r0, r3, #(I32_bit | F32_bit)
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msr cpsr_all, r0
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#else
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ldr r3, Lblock_userspace_access
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ldr ip, [r3]
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orr r0, ip, #1
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str r0, [r3]
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#endif
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ldr r2, Lsa110_cache_clean_addr
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ldmia r2, {r0, r1}
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#ifdef DOUBLE_CACHE_CLEAN_BANK
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eor r0, r0, r1
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str r0, [r2]
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#endif
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SA1_CACHE_CLEAN_PROLOGUE
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Lsa110_cache_purgeD_loop:
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ldr r2, [r0], #32
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1: ldr r2, [r0], #32
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subs r1, r1, #32
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bne Lsa110_cache_purgeD_loop
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bne 1b
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mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
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#ifdef CACHE_CLEAN_BLOCK_INTR
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msr cpsr_all, r3
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#else
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str ip, [r3]
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#endif
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SA1_CACHE_CLEAN_EPILOGUE
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mov pc, lr
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ENTRY(sa110_cache_purgeID_E)
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@ -249,35 +228,16 @@ ENTRY(sa110_cache_purgeD_E)
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* Soft functions
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*/
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ENTRY(sa110_cache_syncI)
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#ifdef CACHE_CLEAN_BLOCK_INTR
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mrs r3, cpsr_all
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orr r0, r3, #(I32_bit | F32_bit)
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msr cpsr_all, r0
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#else
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ldr r3, Lblock_userspace_access
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ldr ip, [r3]
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orr r0, ip, #1
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str r0, [r3]
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#endif
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ldr r2, Lsa110_cache_clean_addr
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ldmia r2, {r0, r1}
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#ifdef DOUBLE_CACHE_CLEAN_BANK
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eor r0, r0, r1
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str r0, [r2]
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#endif
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SA1_CACHE_CLEAN_PROLOGUE
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Lsa110_cache_syncI_loop:
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ldr r2, [r0], #32
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1: ldr r2, [r0], #32
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subs r1, r1, #32
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bne Lsa110_cache_syncI_loop
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bne 1b
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mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
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mcr p15, 0, r0, c7, c5, 0 /* flush I cache */
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#ifdef CACHE_CLEAN_BLOCK_INTR
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msr cpsr_all, r3
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#else
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str ip, [r3]
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#endif
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SA1_CACHE_CLEAN_EPILOGUE
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mov pc, lr
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ENTRY(sa110_cache_cleanID_rng)
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@ -289,11 +249,10 @@ ENTRY(sa110_cache_cleanD_rng)
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add r1, r1, r2
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bic r0, r0, #0x1f
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sa110_cache_cleanD_rng_loop:
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mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
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1: mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
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add r0, r0, #32
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subs r1, r1, #32
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bpl sa110_cache_cleanD_rng_loop
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bpl 1b
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mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
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mov pc, lr
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@ -306,12 +265,11 @@ ENTRY(sa110_cache_purgeID_rng)
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add r1, r1, r2
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bic r0, r0, #0x1f
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sa110_cache_purgeID_rng_loop:
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mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
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1: mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
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mcr p15, 0, r0, c7, c6, 1 /* flush D cache single entry */
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add r0, r0, #32
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subs r1, r1, #32
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bpl sa110_cache_purgeID_rng_loop
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bpl 1b
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mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
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mcr p15, 0, r0, c7, c5, 0 /* flush I cache */
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@ -325,12 +283,11 @@ ENTRY(sa110_cache_purgeD_rng)
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add r1, r1, r2
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bic r0, r0, #0x1f
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sa110_cache_purgeD_rng_loop:
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mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
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1: mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
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mcr p15, 0, r0, c7, c6, 1 /* flush D cache single entry */
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add r0, r0, #32
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subs r1, r1, #32
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bpl sa110_cache_purgeD_rng_loop
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bpl 1b
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mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
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mov pc, lr
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@ -343,11 +300,10 @@ ENTRY(sa110_cache_syncI_rng)
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add r1, r1, r2
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bic r0, r0, #0x1f
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sa110_cache_syncI_rng_loop:
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mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
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1: mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
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add r0, r0, #32
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subs r1, r1, #32
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bpl sa110_cache_syncI_rng_loop
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bpl 1b
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mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
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mcr p15, 0, r0, c7, c5, 0 /* flush I cache */
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