From Ignatios Souvatzis <is@NetBSD.ORG>:

properly distinguish between a bus error and an MMU fault
	on systems with 68030 MMU
This commit is contained in:
oki 1996-07-16 16:18:34 +00:00
parent e4de48ff39
commit de609f142b

View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.3 1996/05/29 17:19:07 oki Exp $ */
/* $NetBSD: locore.s,v 1.4 1996/07/16 16:18:34 oki Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -188,18 +188,39 @@ Lbe10:
cmpw #12,d0 | address error vector?
jeq Lisaerr | yes, go to it
movl d1,a0 | fault address
ptestr #1,a0@,#7 | do a table search
movl sp@,d0 | function code from ssw
btst #8,d0 | data fault?
jne Lbe10a
movql #1,d0 | user program access FC
| (we dont separate data/program)
btst #5,a1@ | supervisor mode?
jeq Lbe10a | if no, done
movql #5,d0 | else supervisor program access
Lbe10a:
ptestr d0,a0@,#7 | do a table search
pmove psr,sp@ | save result
btst #7,sp@ | bus error bit set?
jeq Lismerr | no, must be MMU fault
clrw sp@ | yes, re-clear pad word
jra Lisberr | and process as normal bus error
movb sp@,d1
btst #2,d1 | invalid? (incl. limit viol and berr)
jeq Lmightnotbemerr | no -> wp check
btst #7,d1 | is it MMU table berr?
jeq Lismerr | no, must be fast
jra Lisberr1 | real bus err needs not be fast
Lmightnotbemerr:
btst #3,d1 | write protect bit set?
jeq Lisberr1 | no, must be bus error
movl sp@,d0 | ssw into low word of d0
andw #0xc0,d0 | write protect is set on page:
cmpw #0x40,d0 | was it read cycle?
jeq Lisberr1 | yes, was not WPE, must be bus err
jra Lismerr | no, must be mem err
Lismerr:
movl #T_MMUFLT,sp@- | show that we are an MMU fault
jra Ltrapnstkadj | and deal with it
Lisaerr:
movl #T_ADDRERR,sp@- | mark address error
jra Ltrapnstkadj | and deal with it
Lisberr1:
clrw sp@ | re-clear pad word
Lisberr:
movl #T_BUSERR,sp@- | mark bus error
Ltrapnstkadj: