Fix improper USB clocking (makes USB work on DBAu1550).

Closes PR port-evbmips/32355.
This commit is contained in:
gdamore 2006-01-27 23:05:16 +00:00
parent 0c00fd29c5
commit de4cbc1b05

View File

@ -1,4 +1,4 @@
/* $NetBSD: machdep.c,v 1.22 2006/01/01 15:05:32 he Exp $ */
/* $NetBSD: machdep.c,v 1.23 2006/01/27 23:05:16 gdamore Exp $ */
/*
* Copyright (c) 1992, 1993
@ -77,7 +77,7 @@
*/
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.22 2006/01/01 15:05:32 he Exp $");
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.23 2006/01/27 23:05:16 gdamore Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@ -332,24 +332,6 @@ mach_init(int argc, char **argv, yamon_env_var *envp, u_long memsize)
curpcb = &lwp0.l_addr->u_pcb;
curpcb->pcb_context[11] = MIPS_INT_MASK | MIPS_SR_INT_IE; /* SR */
#if NOHCI > 0
{
#define USBH_ALL (0x1f<<10) /* All relevant bits in USBH portion of SYS_CLKSRC */
/*
* Assign a clock for the USB Host controller.
*/
volatile u_int32_t *scsreg, *auxpll;
u_int32_t tmp;
scsreg = (volatile u_int32_t *)(MIPS_PHYS_TO_KSEG1(SYS_CLKSRC));
auxpll = (volatile u_int32_t *)(MIPS_PHYS_TO_KSEG1(SYS_AUXPLL));
*auxpll = 8; /* 96Mhz */
tmp = *scsreg;
tmp &= ~USBH_ALL; /* clear all USBH bits in SYS_CLKSRC first */
tmp |= (SCS_DUH|SCS_CUH|SCS_MUH(SCS_MEx_AUX)); /* 48Mhz */
*scsreg = tmp;
}
#endif /* NOHCI */
/*
* Initialize debuggers, and break into them, if appropriate.
*/