Since a context table is now pointing at the correct per-CPU region table
at all times, we can dispense with the hackery that patches the magic entry at context-switch time.
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@ -1,4 +1,4 @@
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/* $NetBSD: cpuvar.h,v 1.21 1999/02/27 13:11:21 pk Exp $ */
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/* $NetBSD: cpuvar.h,v 1.22 1999/10/04 19:23:49 pk Exp $ */
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/*
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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@ -157,7 +157,6 @@ struct cpu_info {
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/* Context administration */
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int *ctx_tbl; /* [4m] SRMMU-edible context table */
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paddr_t ctx_tbl_pa; /* [4m] ctx table physical address */
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u_int cpu_seg_ptd; /* [4m] CPUINFO_VA segment PT desc. */
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union ctxinfo *ctxinfo;
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union ctxinfo *ctx_freelist; /* context free list */
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int ctx_kick; /* allocation rover when none free */
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@ -1,4 +1,4 @@
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# $NetBSD: genassym.cf,v 1.21 1999/03/25 22:21:09 pk Exp $
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# $NetBSD: genassym.cf,v 1.22 1999/10/04 19:23:49 pk Exp $
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#
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# Copyright (c) 1998 The NetBSD Foundation, Inc.
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@ -130,9 +130,6 @@ define SRUN SRUN
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define VM_PMAP offsetof(struct vmspace, vm_map.pmap)
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define PMAP_CTX offsetof(struct pmap, pm_ctx)
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define PMAP_CTXNUM offsetof(struct pmap, pm_ctxnum)
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define PMAP_REGPTPS offsetof(struct pmap, pm_reg_ptps)
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define REGTAB_CPU_OFF (int)(&((int *)0)[VA_VREG(CPUINFO_VA)])
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# interrupt/fault metering
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define V_SWTCH offsetof(struct uvmexp, swtch)
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@ -154,7 +151,6 @@ define REDSIZE REDSIZE
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define CPUINFO_IDLE_U offsetof(struct cpu_info, idle_u)
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define CPUINFO_CURPCB offsetof(struct cpu_info, curpcb)
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define CPUINFO_CURPROC offsetof(struct cpu_info, _curproc)
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define CPUINFO_SEGPTD offsetof(struct cpu_info, cpu_seg_ptd)
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# PTE bits and related information
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define PG_W PG_W
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.s,v 1.124 1999/09/17 20:04:52 thorpej Exp $ */
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/* $NetBSD: locore.s,v 1.125 1999/10/04 19:23:49 pk Exp $ */
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/*
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* Copyright (c) 1996 Paul Kranenburg
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@ -4792,15 +4792,6 @@ Lsw_havectx:
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jmpl %o2, %o7 ! this function must not clobber %o0 and %g7
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nop
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#if defined(MULTIPROCESSOR)
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/* Fixup CPUINFO_VA region table entry */
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sethi %hi(CPUINFO_VA+CPUINFO_SEGPTD), %o2
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ld [%o2 + %lo(CPUINFO_VA+CPUINFO_SEGPTD)], %o2
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ld [%o3 + PMAP_REGPTPS], %o3 ! load region table address
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add %o3, REGTAB_CPU_OFF, %o3 ! goto CPUINFO_VA segment entry
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st %o2, [%o3] ! switch to this CPU's segment
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#endif
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set SRMMU_CXR, %o1
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jmp %g7 + 8
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sta %o0, [%o1] ASI_SRMMU ! setcontext(vm->vm_pmap.pm_ctxnum);
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