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Since a context table is now pointing at the correct per-CPU region table 

at all times, we can dispense with the hackery that patches the magic entry
at context-switch time.
This commit is contained in:
pk 1999-10-04 19:23:49 +00:00
parent 9648d2fcd6
commit de22be977a
3 changed files with 3 additions and 17 deletions
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3
sys/arch/sparc/sparc/cpuvar.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpuvar.h,v 1.21 1999/02/27 13:11:21 pk Exp $ */
/* $NetBSD: cpuvar.h,v 1.22 1999/10/04 19:23:49 pk Exp $ */
/*
* Copyright (c) 1996 The NetBSD Foundation, Inc.
@ -157,7 +157,6 @@ struct cpu_info {
/* Context administration */
int *ctx_tbl; /* [4m] SRMMU-edible context table */
paddr_t ctx_tbl_pa; /* [4m] ctx table physical address */
u_int cpu_seg_ptd; /* [4m] CPUINFO_VA segment PT desc. */
union ctxinfo *ctxinfo;
union ctxinfo *ctx_freelist; /* context free list */
int ctx_kick; /* allocation rover when none free */

6
sys/arch/sparc/sparc/genassym.cf
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@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.21 1999/03/25 22:21:09 pk Exp $
# $NetBSD: genassym.cf,v 1.22 1999/10/04 19:23:49 pk Exp $
#
# Copyright (c) 1998 The NetBSD Foundation, Inc.
@ -130,9 +130,6 @@ define SRUN SRUN
define VM_PMAP offsetof(struct vmspace, vm_map.pmap)
define PMAP_CTX offsetof(struct pmap, pm_ctx)
define PMAP_CTXNUM offsetof(struct pmap, pm_ctxnum)
define PMAP_REGPTPS offsetof(struct pmap, pm_reg_ptps)
define REGTAB_CPU_OFF (int)(&((int *)0)[VA_VREG(CPUINFO_VA)])
# interrupt/fault metering
define V_SWTCH offsetof(struct uvmexp, swtch)
@ -154,7 +151,6 @@ define REDSIZE REDSIZE
define CPUINFO_IDLE_U offsetof(struct cpu_info, idle_u)
define CPUINFO_CURPCB offsetof(struct cpu_info, curpcb)
define CPUINFO_CURPROC offsetof(struct cpu_info, _curproc)
define CPUINFO_SEGPTD offsetof(struct cpu_info, cpu_seg_ptd)
# PTE bits and related information
define PG_W PG_W

11
sys/arch/sparc/sparc/locore.s
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@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.124 1999/09/17 20:04:52 thorpej Exp $ */
/* $NetBSD: locore.s,v 1.125 1999/10/04 19:23:49 pk Exp $ */
/*
* Copyright (c) 1996 Paul Kranenburg
@ -4792,15 +4792,6 @@ Lsw_havectx:
jmpl %o2, %o7 ! this function must not clobber %o0 and %g7
nop
#if defined(MULTIPROCESSOR)
/* Fixup CPUINFO_VA region table entry */
sethi %hi(CPUINFO_VA+CPUINFO_SEGPTD), %o2
ld [%o2 + %lo(CPUINFO_VA+CPUINFO_SEGPTD)], %o2
ld [%o3 + PMAP_REGPTPS], %o3 ! load region table address
add %o3, REGTAB_CPU_OFF, %o3 ! goto CPUINFO_VA segment entry
st %o2, [%o3] ! switch to this CPU's segment
#endif
set SRMMU_CXR, %o1
jmp %g7 + 8
sta %o0, [%o1] ASI_SRMMU ! setcontext(vm->vm_pmap.pm_ctxnum);