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Changes to interrupt architecture for softintr support

This commit is contained in:
wdk 2001-03-30 23:51:14 +00:00
parent cdba0ef41c
commit dd068f675e
1 changed files with 10 additions and 9 deletions
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19
sys/arch/mipsco/mipsco/mips_3x30.c
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@ -1,4 +1,4 @@
/* $NetBSD: mips_3x30.c,v 1.4 2000/12/03 04:51:04 matt Exp $ */
/* $NetBSD: mips_3x30.c,v 1.5 2001/03/30 23:51:14 wdk Exp $ */
/*
* Copyright (c) 2000 The NetBSD Foundation, Inc.
@ -58,6 +58,8 @@ int pizazz_level0_intr (void *);
void pizazz_level5_intr (int, int, int);
void pizazz_intr_establish (int, int (*)(void *), void *);
#define INT_MASK_FPU MIPS_INT_MASK_3
void
pizazz_init(void)
{
@ -116,11 +118,10 @@ pizazz_intr(status, cause, pc, ipending)
_splset((status & ~cause & MIPS_HARD_INT_MASK) | MIPS_SR_INT_IE);
/* FPU nofiticaition */
if (ipending & MIPS_INT_MASK_3) {
if (ipending & INT_MASK_FPU) {
if (!USERMODE(status))
panic("kernel used FPU: PC %x, CR %x, SR %x",
pc, cause, status);
/* dealfpu(status, cause, pc); */
MachFPInterrupt(status, cause, pc, curproc->p_md.md_regs);
}
}
@ -140,6 +141,9 @@ pizazz_level0_intr(arg)
/* stat register is active low */
stat = ~*(volatile u_char *)INTREG_0;
if (stat & INT_ExpSlot)
CALL_INTR(SYS_INTR_ATBUS);
if (stat & INT_Lance)
CALL_INTR(SYS_INTR_ETHER);
@ -176,12 +180,9 @@ pizazz_intr_establish(level, func, arg)
if (level < 0 || level >= MAX_INTR_COOKIES)
panic("invalid interrupt level");
if (intrtab[level].func != NULL)
if (intrtab[level].ih_fun != NULL)
panic("cannot share interrupt %d", level);
intrtab[level].func = func;
intrtab[level].arg = arg;
intrtab[level].ih_fun = func;
intrtab[level].ih_arg = arg;
}