From dcd1f30fb8043fb939452c307038b1bf72e2668e Mon Sep 17 00:00:00 2001 From: scw Date: Fri, 24 Nov 2000 09:42:09 +0000 Subject: [PATCH] First cut of a driver for the Memory Controller ASICs found on mvme16x and mvme17x boards. --- sys/arch/mvme68k/conf/files.mvme68k | 7 +- sys/arch/mvme68k/dev/memc.c | 156 ++++++++++++++++++++++++++++ sys/arch/mvme68k/dev/memcreg.h | 118 +++++++++++++++++++++ sys/arch/mvme68k/dev/pcctwo.c | 6 +- sys/arch/mvme68k/dev/pcctworeg.h | 5 +- 5 files changed, 288 insertions(+), 4 deletions(-) create mode 100644 sys/arch/mvme68k/dev/memc.c create mode 100644 sys/arch/mvme68k/dev/memcreg.h diff --git a/sys/arch/mvme68k/conf/files.mvme68k b/sys/arch/mvme68k/conf/files.mvme68k index 4bb03f0f1bdb..c45a4cd4a788 100644 --- a/sys/arch/mvme68k/conf/files.mvme68k +++ b/sys/arch/mvme68k/conf/files.mvme68k @@ -1,4 +1,4 @@ -# $NetBSD: files.mvme68k,v 1.37 2000/11/24 08:54:08 scw Exp $ +# $NetBSD: files.mvme68k,v 1.38 2000/11/24 09:42:09 scw Exp $ # config file for mvme68k @@ -78,6 +78,11 @@ file arch/mvme68k/dev/if_ie.c ie_pcctwo attach clmpcc at pcctwo with clmpcc_pcctwo file arch/mvme68k/dev/clmpcc_pcctwo.c clmpcc_pcctwo needs-flag +# MVME16x and MVME17x Memory Controller ASICs +device memc +attach memc at pcctwo +file arch/mvme68k/dev/memc.c memc + # Memory disk for boot tape file dev/md_root.c memory_disk_hooks diff --git a/sys/arch/mvme68k/dev/memc.c b/sys/arch/mvme68k/dev/memc.c new file mode 100644 index 000000000000..7871f3d7e91e --- /dev/null +++ b/sys/arch/mvme68k/dev/memc.c @@ -0,0 +1,156 @@ +/* $NetBSD: memc.c,v 1.1 2000/11/24 09:42:10 scw Exp $ */ + +/*- + * Copyright (c) 2000 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Steve C. Woodford. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Support for the MEMECC and MEMC40 memory controllers on MVME1[67][27] + */ + +#include +#include +#include +#include +#include + +#include +#include + +#include + +#include +#include + +struct memc_softc { + struct device sc_dev; + bus_space_tag_t sc_bust; + bus_space_handle_t sc_bush; +}; + +int memc_match(struct device *, struct cfdata *, void *); +void memc_attach(struct device *, struct device *, void *); + +struct cfattach memc_ca = { + sizeof(struct memc_softc), memc_match, memc_attach +}; + +extern struct cfdriver memc_cd; + +static void memc040_attach(struct memc_softc *, struct pcctwo_attach_args *); +static void memecc_attach(struct memc_softc *, struct pcctwo_attach_args *); + +/* ARGSUSED */ +int +memc_match(parent, cf, aux) + struct device *parent; + struct cfdata *cf; + void *aux; +{ + struct pcctwo_attach_args *pa = aux; + bus_space_handle_t bh; + u_int8_t chipid; + int rv; + + if (machineid != MVME_167 && machineid != MVME_177 && + machineid != MVME_162 && machineid != MVME_172) + return (0); + + if (strcmp(pa->pa_name, memc_cd.cd_name)) + return (0); + + if (bus_space_map(pa->pa_bust, pa->pa_offset, MEMC_REGSIZE, 0, &bh)) + return (0); + + rv = bus_space_peek_1(pa->pa_bust, bh, MEMC_REG_CHIP_ID, &chipid); + bus_space_unmap(pa->pa_bust, bh, MEMC_REGSIZE); + + if (rv) + return (0); + + /* Verify the Chip Id register is sane */ + if (chipid != MEMC_CHIP_ID_MEMC040 && chipid != MEMC_CHIP_ID_MEMECC) + return (0); + + return (1); +} + +/* ARGSUSED */ +void +memc_attach(parent, self, aux) + struct device *parent; + struct device *self; + void *aux; +{ + struct pcctwo_attach_args *pa = aux; + struct memc_softc *sc = (struct memc_softc *) self; + u_int8_t chipid; + u_int8_t memcfg; + + sc->sc_bust = pa->pa_bust; + + /* Map the memory controller's registers */ + bus_space_map(sc->sc_bust, pa->pa_offset, MEMC_REGSIZE, 0, + &sc->sc_bush); + chipid = bus_space_read_1(pa->pa_bust, sc->sc_bush, MEMC_REG_CHIP_ID); + memcfg = bus_space_read_1(pa->pa_bust, sc->sc_bush, MEMC_REG_MEMORY_CONFIG); + + printf(": %dMB %s Memory Controller Chip\n", + MEMC_MEMORY_CONFIG_2_MB(memcfg), + (chipid == MEMC_CHIP_ID_MEMC040) ? "Parity" : "ECC"); + + switch (chipid) { + case MEMC_CHIP_ID_MEMC040: + memc040_attach(sc, pa); + break; + case MEMC_CHIP_ID_MEMECC: + memecc_attach(sc, pa); + break; + } +} + +static void +memc040_attach(struct memc_softc *sc, struct pcctwo_attach_args *pa) +{ + + /* XXX: TBD */ +} + +static void +memecc_attach(struct memc_softc *sc, struct pcctwo_attach_args *pa) +{ + + /* XXX: TBD */ +} diff --git a/sys/arch/mvme68k/dev/memcreg.h b/sys/arch/mvme68k/dev/memcreg.h new file mode 100644 index 000000000000..8ba1352e1659 --- /dev/null +++ b/sys/arch/mvme68k/dev/memcreg.h @@ -0,0 +1,118 @@ +/* $NetBSD: memcreg.h,v 1.1 2000/11/24 09:42:10 scw Exp $ */ + +/*- + * Copyright (c) 2000 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Steve C. Woodford. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Register definitions for the MEMECC and MEMC040 devices. + */ +#ifndef _MVME68K_MEMCREG_H +#define _MVME68K_MEMCREG_H + +/* + * Size, in bytes, of the memory controller's register set + * (Actually, the MEMC040's register set is only 0x20 bytes in size, but + * we go with the larger of the two). + */ +#define MEMC_REGSIZE 0x80 + +/* Both memory controllers share some registers in common */ +#define MEMC_REG_CHIP_ID 0x00 +#define MEMC_CHIP_ID_MEMC040 0x80 /* It's a MEMC040 */ +#define MEMC_CHIP_ID_MEMECC 0x81 /* It's a MEMECC */ + +/* Revision of the ASIC */ +#define MEMC_REG_CHIP_REVISION 0x04 + +/* Configuration of the memory block controlled by this ASIC */ +#define MEMC_REG_MEMORY_CONFIG 0x08 +#define MEMC_MEMORY_CONFIG_2_BYTES(x) (0x400000 << ((x) & 0x07)) +#define MEMC_MEMORY_CONFIG_2_MB(x) (4 << ((x) & 0x07)) +#define MEMC040_MEMORY_CONFIG_EXTPEN (1u << 3) /* External parity enabled */ +#define MEMC040_MEMORY_CONFIG_WPB (1u << 4) /* Write Per Bit mode */ +#define MEMC_MEMORY_CONFIG_FSTRD (1u << 5) /* Fast RAM Read enabled */ + +/* Where, in the cpu's address space, does this memory appear? */ +#define MEMC_REG_BASE_ADDRESS_HI 0x14 +#define MEMC_REG_BASE_ADDRESS_LO 0x18 +#define MEMC_BASE_ADDRESS(hi,lo) (((hi) << 24) | (((lo) & 0xc0) << 22)) + +/* Tells the memory controller what the board's Bus Clock frequency is */ +#define MEMC_REG_BUS_CLOCK 0x1c + + +/* Register offsets and definitions for the Parity Memory Controller */ +#define MEMC040_REG_ALT_STATUS 0x0c /* Not used */ +#define MEMC040_REG_ALT_CONTROL 0x10 /* Not used */ + +/* Memory Control Register */ +#define MEMC040_REG_RAM_CONTROL 0x18 +#define MEMC040_RAM_CONTROL_RAMEN (1u << 0) +#define MEMC040_RAM_CONTROL_PAREN (1u << 1) +#define MEMC040_RAM_CONTROL_PARINT (1u << 2) +#define MEMC040_RAM_CONTROL_WWP (1u << 3) +#define MEMC040_RAM_CONTROL_SWAIT (1u << 4) +#define MEMC040_RAM_CONTROL_DMCTL (1u << 5) + + +/* Register offsets and definitions for the ECC Memory Controller */ +#define MEMECC_REG_DRAM_CONTROL 0x18 +#define MEMECC_REG_DATA_CONTROL 0x20 +#define MEMECC_REG_SCRUB_CONTROL 0x24 +#define MEMECC_REG_SCRUB_PERIOD_HI 0x28 +#define MEMECC_REG_SCRUB_PERIOD_LO 0x2c +#define MEMECC_REG_CHIP_PRESCALE 0x30 +#define MEMECC_REG_SCRUB_TIME_ONOFF 0x34 +#define MEMECC_REG_SCRUB_PRESCALE_HI 0x38 +#define MEMECC_REG_SCRUB_PRESCALE_MID 0x3c +#define MEMECC_REG_SCRUB_PRESCALE_LO 0x40 +#define MEMECC_REG_SCRUB_TIMER_HI 0x44 +#define MEMECC_REG_SCRUB_TIMER_LO 0x48 +#define MEMECC_REG_SCRUB_ADDR_CNTR_HIHI 0x4c +#define MEMECC_REG_SCRUB_ADDR_CNTR_HI 0x50 +#define MEMECC_REG_SCRUB_ADDR_CNTR_MID 0x54 +#define MEMECC_REG_SCRUB_ADDR_CNTR_LO 0x58 +#define MEMECC_REG_ERROR_LOGGER 0x5c +#define MEMECC_REG_ERROR_ADDRESS_HIHI 0x60 +#define MEMECC_REG_ERROR_ADDRESS_HI 0x64 +#define MEMECC_REG_ERROR_ADDRESS_MID 0x68 +#define MEMECC_REG_ERROR_ADDRESS_LO 0x6c +#define MEMECC_REG_ERROR_SYNDROME 0x70 +#define MEMECC_REG_DEFAULTS1 0x74 +#define MEMECC_REG_DEFAULTS2 0x78 +#define MEMECC_REG_SDRAM_CONFIG 0x7c + +#endif /* _MVME68K_MEMCREG_H */ diff --git a/sys/arch/mvme68k/dev/pcctwo.c b/sys/arch/mvme68k/dev/pcctwo.c index 1df8af95b87a..d80f7c54a05c 100644 --- a/sys/arch/mvme68k/dev/pcctwo.c +++ b/sys/arch/mvme68k/dev/pcctwo.c @@ -1,4 +1,4 @@ -/* $NetBSD: pcctwo.c,v 1.6 2000/11/24 09:36:41 scw Exp $ */ +/* $NetBSD: pcctwo.c,v 1.7 2000/11/24 09:42:10 scw Exp $ */ /*- * Copyright (c) 1999 The NetBSD Foundation, Inc. @@ -94,6 +94,8 @@ struct pcctwo_device { */ static struct pcctwo_device pcctwo_devices[] = { {"clock", PCCTWO_RTC_OFF}, + {"memc", PCCTWO_MEMC1_OFF}, + {"memc", PCCTWO_MEMC2_OFF}, {"clmpcc", PCCTWO_SCC_OFF}, {"ie", PCCTWO_IE_OFF}, {"ncrsc", PCCTWO_NCRSC_OFF}, @@ -128,6 +130,8 @@ static int pcctwo_vec2icsr_1x7[] = { */ static struct pcctwo_device mcchip_devices[] = { {"clock", PCCTWO_RTC_OFF}, + {"memc", PCCTWO_MEMC1_OFF}, + {"memc", PCCTWO_MEMC2_OFF}, {"zsc", MCCHIP_ZS0_OFF}, {"zsc", MCCHIP_ZS1_OFF}, {"ie", PCCTWO_IE_OFF}, diff --git a/sys/arch/mvme68k/dev/pcctworeg.h b/sys/arch/mvme68k/dev/pcctworeg.h index 81b03a8ce895..fc20776165a9 100644 --- a/sys/arch/mvme68k/dev/pcctworeg.h +++ b/sys/arch/mvme68k/dev/pcctworeg.h @@ -1,4 +1,4 @@ -/* $NetBSD: pcctworeg.h,v 1.6 2000/09/06 19:51:44 scw Exp $ */ +/* $NetBSD: pcctworeg.h,v 1.7 2000/11/24 09:42:10 scw Exp $ */ /*- * Copyright (c) 1999 The NetBSD Foundation, Inc. @@ -50,7 +50,8 @@ */ #define PCCTWO_REG_OFF 0x00000 /* Offset of PCCChip2's own registers */ #define PCCTWO_LPT_OFF 0x00000 /* Offset of parallel port registers */ -#define PCCTWO_MEMC_OFF 0x01000 /* Offset of Memory Controller's regs */ +#define PCCTWO_MEMC1_OFF 0x01000 /* Offset of Memory Controller #1 */ +#define PCCTWO_MEMC2_OFF 0x01100 /* Offset of Memory Controller #2 */ #define PCCTWO_SCC_OFF 0x03000 /* Offset of CD2401 Serial Comms chip */ #define PCCTWO_IE_OFF 0x04000 /* Offset of 82596 LAN controller */ #define PCCTWO_NCRSC_OFF 0x05000 /* Offset of NCR53C710 SCSI chip */