fix for newer boards (pr#1829) from Matthias Scheler

This commit is contained in:
chopps 1995-12-27 07:15:53 +00:00
parent f7ea355074
commit dafae56a80
2 changed files with 17 additions and 5 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: grf_cv.c,v 1.4 1995/11/30 00:56:57 jtc Exp $ */ /* $NetBSD: grf_cv.c,v 1.5 1995/12/27 07:15:53 chopps Exp $ */
/* /*
* Copyright (c) 1995 Michael Teske * Copyright (c) 1995 Michael Teske
@ -395,10 +395,21 @@ cv_boardinit(gp)
clockpar = compute_clock(0x3473BC0); clockpar = compute_clock(0x3473BC0);
test = (clockpar & 0xFF00) >> 8; test = (clockpar & 0xFF00) >> 8;
WSeq(ba, SEQ_ID_MCLK_HI, test); /* PLL N-Divider Value */
test = clockpar & 0xFF; if (RCrt(ba, CRT_ID_REVISION) == 0x10) {
WSeq(ba, SEQ_ID_MCLK_LO, test); /* PLL M-Divider Value */ WSeq(ba, SEQ_ID_MCLK_HI, test); /* PLL N-Divider Value */
test = clockpar & 0xFF;
WSeq(ba, SEQ_ID_MCLK_LO, test); /* PLL M-Divider Value */
test = (clockpar & 0xFF00) >> 8;
WSeq(ba, SEQ_ID_MORE_MAGIC, test);
} else {
WSeq(ba, SEQ_ID_MCLK_HI, test); /* PLL N-Divider Value */
test = clockpar & 0xFF;
WSeq(ba, SEQ_ID_MCLK_LO, test); /* PLL M-Divider Value */
}
/* We now load an 25 MHz, 31 kHz, 640x480 standard VGA Mode. */ /* We now load an 25 MHz, 31 kHz, 640x480 standard VGA Mode. */
/* DCLK */ /* DCLK */

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@ -1,4 +1,4 @@
/* $NetBSD: grf_cvreg.h,v 1.2 1995/11/30 00:56:59 jtc Exp $ */ /* $NetBSD: grf_cvreg.h,v 1.3 1995/12/27 07:15:55 chopps Exp $ */
/* /*
* Copyright (c) 1995 Michael Teske * Copyright (c) 1995 Michael Teske
@ -158,6 +158,7 @@ struct grfcvtext_mode {
#define SEQ_ID_CLKSYN_TEST_HI 0x16 /* reserved for S3 testing of the */ #define SEQ_ID_CLKSYN_TEST_HI 0x16 /* reserved for S3 testing of the */
#define SEQ_ID_CLKSYN_TEST_LO 0x17 /* internal clock synthesizer */ #define SEQ_ID_CLKSYN_TEST_LO 0x17 /* internal clock synthesizer */
#define SEQ_ID_RAMDAC_CNTL 0x18 #define SEQ_ID_RAMDAC_CNTL 0x18
#define SEQ_ID_MORE_MAGIC 0x1A
/* CRT Controller: */ /* CRT Controller: */
#define CRT_ADDRESS 0x03D4 #define CRT_ADDRESS 0x03D4