fix for newer boards (pr#1829) from Matthias Scheler
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@ -1,4 +1,4 @@
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/* $NetBSD: grf_cv.c,v 1.4 1995/11/30 00:56:57 jtc Exp $ */
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/* $NetBSD: grf_cv.c,v 1.5 1995/12/27 07:15:53 chopps Exp $ */
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/*
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* Copyright (c) 1995 Michael Teske
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@ -395,10 +395,21 @@ cv_boardinit(gp)
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clockpar = compute_clock(0x3473BC0);
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test = (clockpar & 0xFF00) >> 8;
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WSeq(ba, SEQ_ID_MCLK_HI, test); /* PLL N-Divider Value */
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test = clockpar & 0xFF;
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WSeq(ba, SEQ_ID_MCLK_LO, test); /* PLL M-Divider Value */
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if (RCrt(ba, CRT_ID_REVISION) == 0x10) {
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WSeq(ba, SEQ_ID_MCLK_HI, test); /* PLL N-Divider Value */
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test = clockpar & 0xFF;
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WSeq(ba, SEQ_ID_MCLK_LO, test); /* PLL M-Divider Value */
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test = (clockpar & 0xFF00) >> 8;
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WSeq(ba, SEQ_ID_MORE_MAGIC, test);
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} else {
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WSeq(ba, SEQ_ID_MCLK_HI, test); /* PLL N-Divider Value */
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test = clockpar & 0xFF;
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WSeq(ba, SEQ_ID_MCLK_LO, test); /* PLL M-Divider Value */
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}
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/* We now load an 25 MHz, 31 kHz, 640x480 standard VGA Mode. */
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/* DCLK */
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@ -1,4 +1,4 @@
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/* $NetBSD: grf_cvreg.h,v 1.2 1995/11/30 00:56:59 jtc Exp $ */
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/* $NetBSD: grf_cvreg.h,v 1.3 1995/12/27 07:15:55 chopps Exp $ */
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/*
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* Copyright (c) 1995 Michael Teske
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@ -158,6 +158,7 @@ struct grfcvtext_mode {
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#define SEQ_ID_CLKSYN_TEST_HI 0x16 /* reserved for S3 testing of the */
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#define SEQ_ID_CLKSYN_TEST_LO 0x17 /* internal clock synthesizer */
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#define SEQ_ID_RAMDAC_CNTL 0x18
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#define SEQ_ID_MORE_MAGIC 0x1A
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/* CRT Controller: */
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#define CRT_ADDRESS 0x03D4
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