1. Fixed GPIO bits. (PCCR and PCDR)
2. Save and restore PCDR, PDDR, PEDR.
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@ -1,4 +1,4 @@
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/* $NetBSD: pfckbd.c,v 1.14 2005/01/18 04:09:09 uwe Exp $ */
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/* $NetBSD: pfckbd.c,v 1.15 2005/05/23 17:49:48 kiyohara Exp $ */
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/*-
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* Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
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@ -37,7 +37,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pfckbd.c,v 1.14 2005/01/18 04:09:09 uwe Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pfckbd.c,v 1.15 2005/05/23 17:49:48 kiyohara Exp $");
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#include "debug_hpcsh.h"
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@ -319,11 +319,11 @@ pfckbd_callout_hp(void *arg)
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void
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pfckbd_callout_hitachi(void *arg)
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{
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#define PFCKBD_HITACHI_PCCR_MASK 0xfffc
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#define PFCKBD_HITACHI_PCCR_MASK 0xfff3
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#define PFCKBD_HITACHI_PDCR_MASK 0x000c
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#define PFCKBD_HITACHI_PECR_MASK 0x30cf
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#define PFCKBD_HITACHI_PCDR_SCN_MASK 0xfe
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#define PFCKBD_HITACHI_PCDR_SCN_MASK 0xfd
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#define PFCKBD_HITACHI_PDDR_SCN_MASK 0xf7
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#define PFCKBD_HITACHI_PEDR_SCN_MASK 0xff
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@ -364,7 +364,7 @@ pfckbd_callout_hitachi(void *arg)
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uint16_t cc, dc, ec; uint8_t c, d, e;
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} scan[] = {
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PE(6), PE(3), PE(1), PE(0), PC(7), PC(6), PC(5), PC(4),
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PC(3), PC(2), PD(1), PC(1)
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PC(3), PC(2), PD(1), PC(0)
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};
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#undef PC
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@ -373,7 +373,7 @@ pfckbd_callout_hitachi(void *arg)
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struct pfckbd_core *pc = arg;
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uint16_t cc, dc, ec;
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uint8_t data[2];
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uint8_t data[2], cd, dd, ed;
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int i;
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if (!pc->pc_enabled)
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@ -384,9 +384,13 @@ pfckbd_callout_hitachi(void *arg)
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dc = _reg_read_2(SH7709_PDCR) & ~PFCKBD_HITACHI_PDCR_MASK;
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ec = _reg_read_2(SH7709_PECR) & ~PFCKBD_HITACHI_PECR_MASK;
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cd = _reg_read_1(SH7709_PCDR);
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dd = _reg_read_1(SH7709_PDDR);
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ed = _reg_read_1(SH7709_PEDR);
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for (i = 0; i < 12; i++) {
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/* disable output to all lines except the one we scan */
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_reg_write_2(SH7709_PDCR, cc | scan[i].cc);
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_reg_write_2(SH7709_PCCR, cc | scan[i].cc);
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_reg_write_2(SH7709_PDCR, dc | scan[i].dc);
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_reg_write_2(SH7709_PECR, ec | scan[i].ec);
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delay(5);
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@ -408,9 +412,9 @@ pfckbd_callout_hitachi(void *arg)
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}
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/* scan no lines */
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_reg_write_1(SH7709_PCDR, PFCKBD_HITACHI_PCDR_SCN_MASK);
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_reg_write_1(SH7709_PDDR, PFCKBD_HITACHI_PDDR_SCN_MASK);
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_reg_write_1(SH7709_PEDR, PFCKBD_HITACHI_PEDR_SCN_MASK);
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_reg_write_1(SH7709_PCDR, cd);
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_reg_write_1(SH7709_PDDR, dd);
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_reg_write_1(SH7709_PEDR, ed);
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/* enable all scan lines */
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_reg_write_2(SH7709_PCCR, cc | (0x5555 & PFCKBD_HITACHI_PCCR_MASK));
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