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Refactor the 68040 writeback() from each m68k port's trap handler into a 

shared copy: m68040_writeback().  It is essentially a copy of the Atari
version, with some minor cosmetic tweaks and one small performance optimization
from the mvme68k port.

Tested by rjs@ on a Quadra 950.  (Thanks!)
This commit is contained in:
thorpej 2019-02-18 01:12:22 +00:00
parent 2f668af971
commit daca0f564b
28 changed files with 467 additions and 2812 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

314
sys/arch/atari/atari/trap.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: trap.c,v 1.113 2015/03/04 20:29:59 martin Exp $ */
/* $NetBSD: trap.c,v 1.114 2019/02/18 01:12:22 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.113 2015/03/04 20:29:59 martin Exp $");
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.114 2019/02/18 01:12:22 thorpej Exp $");
#include "opt_ddb.h"
#include "opt_execfmt.h"
@ -93,9 +93,6 @@ void trap(struct frame *, int, u_int, u_int);
static void panictrap(int, u_int, u_int, struct frame *);
static void trapcpfault(struct lwp *, struct frame *, int);
static void userret(struct lwp *, struct frame *fp, u_quad_t, u_int, int);
#ifdef M68040
static int writeback(struct frame *, int);
#endif /* M68040 */
const char *trap_type[] = {
"Bus error",
@ -220,7 +217,7 @@ again:
"pid %d(%s): writeback aborted in sigreturn, pc=%x\n",
p->p_pid, p->p_comm, fp->f_pc, faultaddr);
#endif
} else if ((sig = writeback(fp, fromtrap))) {
} else if ((sig = m68040_writeback(fp, fromtrap))) {
ksiginfo_t ksi;
beenhere = 1;
oticks = p->p_sticks;
@ -633,7 +630,7 @@ trap(struct frame *fp, int type, u_int code, u_int v)
}
#ifdef M68040
if (cputype == CPU_68040)
(void) writeback(fp, 1);
(void) m68040_writeback(fp, 1);
#endif
return;
}
@ -688,306 +685,3 @@ trap(struct frame *fp, int type, u_int code, u_int v)
out:
userret(l, fp, sticks, v, 1);
}
#ifdef M68040
#ifdef DEBUG
struct writebackstats {
int calls;
int cpushes;
int move16s;
int wb1s, wb2s, wb3s;
int wbsize[4];
} wbstats;
const char *f7sz[] = { "longword", "byte", "word", "line" };
const char *f7tt[] = { "normal", "MOVE16", "AFC", "ACK" };
const char *f7tm[] = { "d-push", "u-data", "u-code", "M-data",
"M-code", "k-data", "k-code", "RES" };
const char wberrstr[] =
"WARNING: pid %d(%s) writeback [%s] failed, pc=%x fa=%x wba=%x wbd=%x\n";
static void dumpwb(int, u_short, u_int, u_int);
static void dumpssw(u_short);
#endif /* DEBUG */
static int
writeback(struct frame *fp, int docachepush)
{
struct fmt7 *f = &fp->f_fmt7;
struct lwp *l = curlwp;
struct proc *p = l->l_proc;
struct pcb *pcb = lwp_getpcb(l);
int err = 0;
u_int fa = 0;
void *oonfault = pcb->pcb_onfault;
paddr_t pa;
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pid=%d, fa=%x,", p->p_pid, f->f_fa);
dumpssw(f->f_ssw);
}
wbstats.calls++;
#endif
/*
* Deal with special cases first.
*/
if ((f->f_ssw & SSW4_TMMASK) == SSW4_TMDCP) {
/*
* Dcache push fault.
* Line-align the address and write out the push data to
* the indicated physical address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pushing %s to PA %x, data %x",
f7sz[(f->f_ssw & SSW4_SZMASK) >> 5],
f->f_fa, f->f_pd0);
if ((f->f_ssw & SSW4_SZMASK) == SSW4_SZLN)
printf("/%x/%x/%x",
f->f_pd1, f->f_pd2, f->f_pd3);
printf("\n");
}
if (f->f_wb1s & SSW4_WBSV)
panic("writeback: cache push with WB1S valid");
wbstats.cpushes++;
#endif
/*
* XXX there are security problems if we attempt to do a
* cache push after a signal handler has been called.
*/
if (docachepush) {
pmap_enter(pmap_kernel(), (vaddr_t)vmmap,
trunc_page(f->f_fa), VM_PROT_WRITE,
VM_PROT_WRITE|PMAP_WIRED);
pmap_update(pmap_kernel());
fa = (u_int)&vmmap[(f->f_fa & PGOFSET) & ~0xF];
memcpy((void *)fa, (void *)&f->f_pd0, 16);
(void) pmap_extract(pmap_kernel(), (vaddr_t)fa, &pa);
DCFL(pa);
pmap_remove(pmap_kernel(), (vaddr_t)vmmap,
(vaddr_t)&vmmap[PAGE_SIZE]);
pmap_update(pmap_kernel());
} else
printf("WARNING: pid %d(%s) uid %d: CPUSH not done\n",
p->p_pid, p->p_comm, kauth_cred_geteuid(l->l_cred));
} else if ((f->f_ssw & (SSW4_RW|SSW4_TTMASK)) == SSW4_TTM16) {
/*
* MOVE16 fault.
* Line-align the address and write out the push data to
* the indicated virtual address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
printf(" MOVE16 to VA %x(%x), data %x/%x/%x/%x\n",
f->f_fa, f->f_fa & ~0xF, f->f_pd0, f->f_pd1,
f->f_pd2, f->f_pd3);
if (f->f_wb1s & SSW4_WBSV)
panic("writeback: MOVE16 with WB1S valid");
wbstats.move16s++;
#endif
if (KDFAULT(f->f_wb1s))
memcpy((void *)(f->f_fa & ~0xF), (void *)&f->f_pd0, 16);
else
err = suline((void *)(f->f_fa & ~0xF), (void *)&f->f_pd0);
if (err) {
fa = f->f_fa & ~0xF;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"MOVE16", fp->f_pc, f->f_fa,
f->f_fa & ~0xF, f->f_pd0);
#endif
}
} else if (f->f_wb1s & SSW4_WBSV) {
/*
* Writeback #1.
* Position the "memory-aligned" data and write it out.
*/
u_int wb1d = f->f_wb1d;
int off;
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(1, f->f_wb1s, f->f_wb1a, f->f_wb1d);
wbstats.wb1s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
off = (f->f_wb1a & 3) * 8;
switch (f->f_wb1s & SSW4_SZMASK) {
case SSW4_SZLW:
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT(f->f_wb1s))
*(long *)f->f_wb1a = wb1d;
else
err = suword((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZB:
off = 24 - off;
if (off)
wb1d >>= off;
if (KDFAULT(f->f_wb1s))
*(char *)f->f_wb1a = wb1d;
else
err = subyte((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZW:
off = (off + 16) % 32;
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT(f->f_wb1s))
*(short *)f->f_wb1a = wb1d;
else
err = susword((void *)f->f_wb1a, wb1d);
break;
}
if (err) {
fa = f->f_wb1a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#1", fp->f_pc, f->f_fa,
f->f_wb1a, f->f_wb1d);
#endif
}
}
/*
* Deal with the "normal" writebacks.
*
* XXX writeback2 is known to reflect a LINE size writeback after
* a MOVE16 was already dealt with above. Ignore it.
*/
if (err == 0 && (f->f_wb2s & SSW4_WBSV) &&
(f->f_wb2s & SSW4_SZMASK) != SSW4_SZLN) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
wbstats.wb2s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb2s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT(f->f_wb2s))
*(long *)f->f_wb2a = f->f_wb2d;
else
err = suword((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZB:
if (KDFAULT(f->f_wb2s))
*(char *)f->f_wb2a = f->f_wb2d;
else
err = subyte((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZW:
if (KDFAULT(f->f_wb2s))
*(short *)f->f_wb2a = f->f_wb2d;
else
err = susword((void *)f->f_wb2a, f->f_wb2d);
break;
}
if (err) {
fa = f->f_wb2a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED) {
printf(wberrstr, p->p_pid, p->p_comm,
"#2", fp->f_pc, f->f_fa,
f->f_wb2a, f->f_wb2d);
dumpssw(f->f_ssw);
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
}
#endif
}
}
if (err == 0 && (f->f_wb3s & SSW4_WBSV)) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(3, f->f_wb3s, f->f_wb3a, f->f_wb3d);
wbstats.wb3s++;
wbstats.wbsize[(f->f_wb3s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb3s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT(f->f_wb3s))
*(long *)f->f_wb3a = f->f_wb3d;
else
err = suword((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZB:
if (KDFAULT(f->f_wb3s))
*(char *)f->f_wb3a = f->f_wb3d;
else
err = subyte((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZW:
if (KDFAULT(f->f_wb3s))
*(short *)f->f_wb3a = f->f_wb3d;
else
err = susword((void *)f->f_wb3a, f->f_wb3d);
break;
#ifdef DEBUG
case SSW4_SZLN:
panic("writeback: wb3s indicates LINE write");
#endif
}
if (err) {
fa = f->f_wb3a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#3", fp->f_pc, f->f_fa,
f->f_wb3a, f->f_wb3d);
#endif
}
}
pcb->pcb_onfault = oonfault;
if (err)
err = SIGSEGV;
return(err);
}
#ifdef DEBUG
static void
dumpssw(u_short ssw)
{
printf(" SSW: %x: ", ssw);
if (ssw & SSW4_CP)
printf("CP,");
if (ssw & SSW4_CU)
printf("CU,");
if (ssw & SSW4_CT)
printf("CT,");
if (ssw & SSW4_CM)
printf("CM,");
if (ssw & SSW4_MA)
printf("MA,");
if (ssw & SSW4_ATC)
printf("ATC,");
if (ssw & SSW4_LK)
printf("LK,");
if (ssw & SSW4_RW)
printf("RW,");
printf(" SZ=%s, TT=%s, TM=%s\n",
f7sz[(ssw & SSW4_SZMASK) >> 5],
f7tt[(ssw & SSW4_TTMASK) >> 3],
f7tm[ssw & SSW4_TMMASK]);
}
static void
dumpwb(int num, u_short s, u_int a, u_int d)
{
struct proc *p = curproc;
paddr_t pa;
printf(" writeback #%d: VA %x, data %x, SZ=%s, TT=%s, TM=%s\n",
num, a, d, f7sz[(s & SSW4_SZMASK) >> 5],
f7tt[(s & SSW4_TTMASK) >> 3], f7tm[s & SSW4_TMMASK]);
printf(" PA ");
if (pmap_extract(p->p_vmspace->vm_map.pmap, (vaddr_t)a, &pa) == false)
printf("<invalid address>");
else
printf("%lx, current value %lx", pa, fuword((void *)a));
printf("\n");
}
#endif /* DEBUG */
#endif /* M68040 */

3
sys/arch/atari/conf/files.atari
View File

@ -1,5 +1,5 @@
#
# $NetBSD: files.atari,v 1.122 2018/12/19 13:57:46 maxv Exp $
# $NetBSD: files.atari,v 1.123 2019/02/18 01:12:22 thorpej Exp $
maxpartitions 16
@ -218,6 +218,7 @@ file arch/atari/atari/intr.c
file arch/m68k/m68k/cacheops.c
file arch/m68k/m68k/db_memrw.c ddb
file arch/m68k/m68k/fpu.c compile-with "${M68K_KERN_FPU}"
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

3
sys/arch/atari/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.71 2018/08/22 01:05:22 msaitoh Exp $ */
/* $NetBSD: cpu.h,v 1.72 2019/02/18 01:12:22 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -164,7 +164,6 @@ void doboot(void);
void loadustp(int);
void physcopyseg(paddr_t, paddr_t);
u_int probeva(u_int, u_int);
int suline(void *, void *);
/*
* Prototypes from machdep.c:

310
sys/arch/cesfic/cesfic/trap.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: trap.c,v 1.57 2015/03/04 20:29:59 martin Exp $ */
/* $NetBSD: trap.c,v 1.58 2019/02/18 01:12:22 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.57 2015/03/04 20:29:59 martin Exp $");
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.58 2019/02/18 01:12:22 thorpej Exp $");
#include "opt_ddb.h"
#include "opt_execfmt.h"
@ -83,7 +83,6 @@ __KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.57 2015/03/04 20:29:59 martin Exp $");
extern struct emul emul_sunos;
#endif
int writeback(struct frame *fp, int docachepush);
void trap(struct frame *fp, int type, u_int code, u_int v);
void syscall(register_t code, struct frame frame);
void trap_kdebug(int, struct trapframe);
@ -219,7 +218,7 @@ again:
"pid %d(%s): writeback aborted in sigreturn, pc=%x\n",
p->p_pid, p->p_comm, fp->f_pc, faultaddr);
#endif
} else if ((sig = writeback(fp, fromtrap))) {
} else if ((sig = m68040_writeback(fp, fromtrap))) {
ksiginfo_t ksi;
beenhere = 1;
oticks = p->p_sticks;
@ -589,7 +588,7 @@ trap(struct frame *fp, int type, unsigned code, unsigned v)
}
#ifdef M68040
if (cputype == CPU_68040)
(void) writeback(fp, 1);
(void) m68040_writeback(fp, 1);
#endif
return;
}
@ -641,307 +640,6 @@ out:
userret(l, fp, sticks, v, 1);
}
#ifdef M68040
#ifdef DEBUG
struct writebackstats {
int calls;
int cpushes;
int move16s;
int wb1s, wb2s, wb3s;
int wbsize[4];
} wbstats;
const char *f7sz[] = { "longword", "byte", "word", "line" };
const char *f7tt[] = { "normal", "MOVE16", "AFC", "ACK" };
const char *f7tm[] = { "d-push", "u-data", "u-code", "M-data",
"M-code", "k-data", "k-code", "RES" };
const char wberrstr[] =
"WARNING: pid %d(%s) writeback [%s] failed, pc=%x fa=%x wba=%x wbd=%x\n";
#endif
int
writeback(struct frame *fp, int docachepush)
{
struct fmt7 *f = &fp->f_fmt7;
struct lwp *l = curlwp;
struct proc *p = l->l_proc;
struct pcb *pcb = lwp_getpcb(l);
int err = 0;
u_int fa;
void *oonfault = pcb->pcb_onfault;
paddr_t pa;
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pid=%d, fa=%x,", p->p_pid, f->f_fa);
dumpssw(f->f_ssw);
}
wbstats.calls++;
#endif
/*
* Deal with special cases first.
*/
if ((f->f_ssw & SSW4_TMMASK) == SSW4_TMDCP) {
/*
* Dcache push fault.
* Line-align the address and write out the push data to
* the indicated physical address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pushing %s to PA %x, data %x",
f7sz[(f->f_ssw & SSW4_SZMASK) >> 5],
f->f_fa, f->f_pd0);
if ((f->f_ssw & SSW4_SZMASK) == SSW4_SZLN)
printf("/%x/%x/%x",
f->f_pd1, f->f_pd2, f->f_pd3);
printf("\n");
}
if (f->f_wb1s & SSW4_WBSV)
panic("writeback: cache push with WB1S valid");
wbstats.cpushes++;
#endif
/*
* XXX there are security problems if we attempt to do a
* cache push after a signal handler has been called.
*/
if (docachepush) {
pmap_enter(pmap_kernel(), (vaddr_t)vmmap,
trunc_page(f->f_fa), VM_PROT_WRITE,
VM_PROT_WRITE|PMAP_WIRED);
pmap_update(pmap_kernel());
fa = (u_int)&vmmap[(f->f_fa & PGOFSET) & ~0xF];
memcpy((void *)fa, (void *)&f->f_pd0, 16);
pmap_extract(pmap_kernel(), (vaddr_t)fa, &pa);
DCFL(pa);
pmap_remove(pmap_kernel(), (vaddr_t)vmmap,
(vaddr_t)&vmmap[PAGE_SIZE]);
pmap_update(pmap_kernel());
} else
printf("WARNING: pid %d(%s) uid %d: CPUSH not done\n",
p->p_pid, p->p_comm, kauth_cred_geteuid(l->l_cred));
} else if ((f->f_ssw & (SSW4_RW|SSW4_TTMASK)) == SSW4_TTM16) {
/*
* MOVE16 fault.
* Line-align the address and write out the push data to
* the indicated virtual address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
printf(" MOVE16 to VA %x(%x), data %x/%x/%x/%x\n",
f->f_fa, f->f_fa & ~0xF, f->f_pd0, f->f_pd1,
f->f_pd2, f->f_pd3);
if (f->f_wb1s & SSW4_WBSV)
panic("writeback: MOVE16 with WB1S valid");
wbstats.move16s++;
#endif
if (KDFAULT(f->f_wb1s))
memcpy((void *)(f->f_fa & ~0xF), (void *)&f->f_pd0, 16);
else
err = suline((void *)(f->f_fa & ~0xF), (void *)&f->f_pd0);
if (err) {
fa = f->f_fa & ~0xF;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"MOVE16", fp->f_pc, f->f_fa,
f->f_fa & ~0xF, f->f_pd0);
#endif
}
} else if (f->f_wb1s & SSW4_WBSV) {
/*
* Writeback #1.
* Position the "memory-aligned" data and write it out.
*/
u_int wb1d = f->f_wb1d;
int off;
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(1, f->f_wb1s, f->f_wb1a, f->f_wb1d);
wbstats.wb1s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
off = (f->f_wb1a & 3) * 8;
switch (f->f_wb1s & SSW4_SZMASK) {
case SSW4_SZLW:
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT(f->f_wb1s))
*(long *)f->f_wb1a = wb1d;
else
err = suword((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZB:
off = 24 - off;
if (off)
wb1d >>= off;
if (KDFAULT(f->f_wb1s))
*(char *)f->f_wb1a = wb1d;
else
err = subyte((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZW:
off = (off + 16) % 32;
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT(f->f_wb1s))
*(short *)f->f_wb1a = wb1d;
else
err = susword((void *)f->f_wb1a, wb1d);
break;
}
if (err) {
fa = f->f_wb1a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#1", fp->f_pc, f->f_fa,
f->f_wb1a, f->f_wb1d);
#endif
}
}
/*
* Deal with the "normal" writebacks.
*
* XXX writeback2 is known to reflect a LINE size writeback after
* a MOVE16 was already dealt with above. Ignore it.
*/
if (err == 0 && (f->f_wb2s & SSW4_WBSV) &&
(f->f_wb2s & SSW4_SZMASK) != SSW4_SZLN) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
wbstats.wb2s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb2s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT(f->f_wb2s))
*(long *)f->f_wb2a = f->f_wb2d;
else
err = suword((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZB:
if (KDFAULT(f->f_wb2s))
*(char *)f->f_wb2a = f->f_wb2d;
else
err = subyte((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZW:
if (KDFAULT(f->f_wb2s))
*(short *)f->f_wb2a = f->f_wb2d;
else
err = susword((void *)f->f_wb2a, f->f_wb2d);
break;
}
if (err) {
fa = f->f_wb2a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED) {
printf(wberrstr, p->p_pid, p->p_comm,
"#2", fp->f_pc, f->f_fa,
f->f_wb2a, f->f_wb2d);
dumpssw(f->f_ssw);
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
}
#endif
}
}
if (err == 0 && (f->f_wb3s & SSW4_WBSV)) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(3, f->f_wb3s, f->f_wb3a, f->f_wb3d);
wbstats.wb3s++;
wbstats.wbsize[(f->f_wb3s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb3s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT(f->f_wb3s))
*(long *)f->f_wb3a = f->f_wb3d;
else
err = suword((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZB:
if (KDFAULT(f->f_wb3s))
*(char *)f->f_wb3a = f->f_wb3d;
else
err = subyte((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZW:
if (KDFAULT(f->f_wb3s))
*(short *)f->f_wb3a = f->f_wb3d;
else
err = susword((void *)f->f_wb3a, f->f_wb3d);
break;
#ifdef DEBUG
case SSW4_SZLN:
panic("writeback: wb3s indicates LINE write");
#endif
}
if (err) {
fa = f->f_wb3a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#3", fp->f_pc, f->f_fa,
f->f_wb3a, f->f_wb3d);
#endif
}
}
pcb->pcb_onfault = oonfault;
if (err)
err = SIGSEGV;
return (err);
}
#ifdef DEBUG
void
dumpssw(u_short ssw)
{
printf(" SSW: %x: ", ssw);
if (ssw & SSW4_CP)
printf("CP,");
if (ssw & SSW4_CU)
printf("CU,");
if (ssw & SSW4_CT)
printf("CT,");
if (ssw & SSW4_CM)
printf("CM,");
if (ssw & SSW4_MA)
printf("MA,");
if (ssw & SSW4_ATC)
printf("ATC,");
if (ssw & SSW4_LK)
printf("LK,");
if (ssw & SSW4_RW)
printf("RW,");
printf(" SZ=%s, TT=%s, TM=%s\n",
f7sz[(ssw & SSW4_SZMASK) >> 5],
f7tt[(ssw & SSW4_TTMASK) >> 3],
f7tm[ssw & SSW4_TMMASK]);
}
void
dumpwb(int num, u_short s, u_int a, u_int d)
{
struct lwp *l = curlwp;
struct proc *p = l->l_proc;
paddr_t pa;
printf(" writeback #%d: VA %x, data %x, SZ=%s, TT=%s, TM=%s\n",
num, a, d, f7sz[(s & SSW4_SZMASK) >> 5],
f7tt[(s & SSW4_TTMASK) >> 3], f7tm[s & SSW4_TMMASK]);
printf(" PA ");
if (pmap_extract(p->p_vmspace->vm_map.pmap, (vaddr_t)a, &pa) == false)
printf("<invalid address>");
else
printf("%lx, current value %lx", pa, fuword((void *)a));
printf("\n");
}
#endif
#endif
/*
* This is called by locore for supervisor-mode trace and
* breakpoint traps. This is separate from trap() above

3
sys/arch/cesfic/conf/files.cesfic
View File

@ -1,4 +1,4 @@
# $NetBSD: files.cesfic,v 1.17 2011/06/12 03:35:40 rmind Exp $
# $NetBSD: files.cesfic,v 1.18 2019/02/18 01:12:22 thorpej Exp $
#
# cesfic-specific configuration info
@ -58,6 +58,7 @@ file arch/cesfic/cesfic/trap.c
file arch/m68k/m68k/cacheops.c
file arch/m68k/m68k/db_memrw.c ddb | kgdb
file arch/m68k/m68k/kgdb_machdep.c kgdb
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

3
sys/arch/cesfic/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.31 2018/08/22 01:05:22 msaitoh Exp $ */
/* $NetBSD: cpu.h,v 1.32 2019/02/18 01:12:22 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -111,7 +111,6 @@ extern int astpending; /* need to trap before returning to user mode */
#endif /* ! M68K_MMU_MOTOROLA */
/* locore.s functions */
int suline(void *, void *);
void loadustp(int);
void doboot(void)

3
sys/arch/hp300/conf/files.hp300
View File

@ -1,4 +1,4 @@
# $NetBSD: files.hp300,v 1.91 2018/12/19 13:57:47 maxv Exp $
# $NetBSD: files.hp300,v 1.92 2019/02/18 01:12:22 thorpej Exp $
#
# hp300-specific configuration info
@ -219,6 +219,7 @@ file arch/m68k/m68k/cacheops.c
file arch/m68k/m68k/db_memrw.c ddb | kgdb
file arch/m68k/m68k/fpu.c compile-with "${M68K_KERN_FPU}"
file arch/m68k/m68k/kgdb_machdep.c kgdb
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

313
sys/arch/hp300/hp300/trap.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: trap.c,v 1.151 2015/03/04 20:29:59 martin Exp $ */
/* $NetBSD: trap.c,v 1.152 2019/02/18 01:12:23 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.151 2015/03/04 20:29:59 martin Exp $");
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.152 2019/02/18 01:12:23 thorpej Exp $");
#include "opt_ddb.h"
#include "opt_execfmt.h"
@ -84,7 +84,6 @@ __KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.151 2015/03/04 20:29:59 martin Exp $");
#include <compat/sunos/sunos_syscall.h>
#endif
int writeback(struct frame *fp, int docachepush);
void trap(struct frame *fp, int type, u_int code, u_int v);
#ifdef DEBUG
@ -216,7 +215,7 @@ userret(struct lwp *l, struct frame *fp, u_quad_t oticks,
"pid %d(%s): writeback aborted in sigreturn, pc=%x\n",
p->p_pid, p->p_comm, fp->f_pc, faultaddr);
#endif
} else if ((sig = writeback(fp, fromtrap))) {
} else if ((sig = m68040_writeback(fp, fromtrap))) {
ksiginfo_t ksi;
beenhere = 1;
oticks = p->p_sticks;
@ -611,7 +610,7 @@ trap(struct frame *fp, int type, u_int code, u_int v)
}
#ifdef M68040
if (cputype == CPU_68040)
(void) writeback(fp, 1);
(void) m68040_writeback(fp, 1);
#endif
return;
}
@ -663,307 +662,3 @@ trap(struct frame *fp, int type, u_int code, u_int v)
out:
userret(l, fp, sticks, v, 1);
}
#ifdef M68040
#ifdef DEBUG
struct writebackstats {
int calls;
int cpushes;
int move16s;
int wb1s, wb2s, wb3s;
int wbsize[4];
} wbstats;
static const char *f7sz[] = { "longword", "byte", "word", "line" };
static const char *f7tt[] = { "normal", "MOVE16", "AFC", "ACK" };
static const char *f7tm[] = { "d-push", "u-data", "u-code", "M-data",
"M-code", "k-data", "k-code", "RES" };
static const char wberrstr[] =
"WARNING: pid %d(%s) writeback [%s] failed, pc=%x fa=%x wba=%x wbd=%x\n";
#endif
int
writeback(struct frame *fp, int docachepush)
{
struct fmt7 *f = &fp->f_fmt7;
struct lwp *l = curlwp;
struct proc *p = l->l_proc;
struct pcb *pcb = lwp_getpcb(l);
void *oonfault = pcb->pcb_onfault;
int err = 0;
u_int fa;
paddr_t pa;
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pid=%d, fa=%x,", p->p_pid, f->f_fa);
dumpssw(f->f_ssw);
}
wbstats.calls++;
#endif
/*
* Deal with special cases first.
*/
if ((f->f_ssw & SSW4_TMMASK) == SSW4_TMDCP) {
/*
* Dcache push fault.
* Line-align the address and write out the push data to
* the indicated physical address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pushing %s to PA %x, data %x",
f7sz[(f->f_ssw & SSW4_SZMASK) >> 5],
f->f_fa, f->f_pd0);
if ((f->f_ssw & SSW4_SZMASK) == SSW4_SZLN)
printf("/%x/%x/%x",
f->f_pd1, f->f_pd2, f->f_pd3);
printf("\n");
}
if (f->f_wb1s & SSW4_WBSV)
panic("writeback: cache push with WB1S valid");
wbstats.cpushes++;
#endif
/*
* XXX there are security problems if we attempt to do a
* cache push after a signal handler has been called.
*/
if (docachepush) {
pmap_enter(pmap_kernel(), (vaddr_t)vmmap,
trunc_page(f->f_fa), VM_PROT_WRITE,
VM_PROT_WRITE|PMAP_WIRED);
pmap_update(pmap_kernel());
fa = (u_int)&vmmap[m68k_page_offset(f->f_fa) & ~0xF];
memcpy((void *)fa, (void *)&f->f_pd0, 16);
(void) pmap_extract(pmap_kernel(), (vaddr_t)fa, &pa);
DCFL(pa);
pmap_remove(pmap_kernel(), (vaddr_t)vmmap,
(vaddr_t)&vmmap[PAGE_SIZE]);
pmap_update(pmap_kernel());
} else
printf("WARNING: pid %d(%s) uid %d: CPUSH not done\n",
p->p_pid, p->p_comm, kauth_cred_geteuid(l->l_cred));
} else if ((f->f_ssw & (SSW4_RW|SSW4_TTMASK)) == SSW4_TTM16) {
/*
* MOVE16 fault.
* Line-align the address and write out the push data to
* the indicated virtual address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
printf(" MOVE16 to VA %x(%x), data %x/%x/%x/%x\n",
f->f_fa, f->f_fa & ~0xF, f->f_pd0, f->f_pd1,
f->f_pd2, f->f_pd3);
if (f->f_wb1s & SSW4_WBSV)
panic("writeback: MOVE16 with WB1S valid");
wbstats.move16s++;
#endif
if (KDFAULT(f->f_wb1s))
memcpy((void *)(f->f_fa & ~0xF),
(void *)&f->f_pd0, 16);
else
err = suline((void *)(f->f_fa & ~0xF),
(void *)&f->f_pd0);
if (err) {
fa = f->f_fa & ~0xF;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"MOVE16", fp->f_pc, f->f_fa,
f->f_fa & ~0xF, f->f_pd0);
#endif
}
} else if (f->f_wb1s & SSW4_WBSV) {
/*
* Writeback #1.
* Position the "memory-aligned" data and write it out.
*/
u_int wb1d = f->f_wb1d;
int off;
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(1, f->f_wb1s, f->f_wb1a, f->f_wb1d);
wbstats.wb1s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
off = (f->f_wb1a & 3) * 8;
switch (f->f_wb1s & SSW4_SZMASK) {
case SSW4_SZLW:
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT(f->f_wb1s))
*(long *)f->f_wb1a = wb1d;
else
err = suword((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZB:
off = 24 - off;
if (off)
wb1d >>= off;
if (KDFAULT(f->f_wb1s))
*(char *)f->f_wb1a = wb1d;
else
err = subyte((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZW:
off = (off + 16) % 32;
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT(f->f_wb1s))
*(short *)f->f_wb1a = wb1d;
else
err = susword((void *)f->f_wb1a, wb1d);
break;
}
if (err) {
fa = f->f_wb1a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#1", fp->f_pc, f->f_fa,
f->f_wb1a, f->f_wb1d);
#endif
}
}
/*
* Deal with the "normal" writebacks.
*
* XXX writeback2 is known to reflect a LINE size writeback after
* a MOVE16 was already dealt with above. Ignore it.
*/
if (err == 0 && (f->f_wb2s & SSW4_WBSV) &&
(f->f_wb2s & SSW4_SZMASK) != SSW4_SZLN) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
wbstats.wb2s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb2s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT(f->f_wb2s))
*(long *)f->f_wb2a = f->f_wb2d;
else
err = suword((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZB:
if (KDFAULT(f->f_wb2s))
*(char *)f->f_wb2a = f->f_wb2d;
else
err = subyte((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZW:
if (KDFAULT(f->f_wb2s))
*(short *)f->f_wb2a = f->f_wb2d;
else
err = susword((void *)f->f_wb2a, f->f_wb2d);
break;
}
if (err) {
fa = f->f_wb2a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED) {
printf(wberrstr, p->p_pid, p->p_comm,
"#2", fp->f_pc, f->f_fa,
f->f_wb2a, f->f_wb2d);
dumpssw(f->f_ssw);
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
}
#endif
}
}
if (err == 0 && (f->f_wb3s & SSW4_WBSV)) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(3, f->f_wb3s, f->f_wb3a, f->f_wb3d);
wbstats.wb3s++;
wbstats.wbsize[(f->f_wb3s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb3s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT(f->f_wb3s))
*(long *)f->f_wb3a = f->f_wb3d;
else
err = suword((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZB:
if (KDFAULT(f->f_wb3s))
*(char *)f->f_wb3a = f->f_wb3d;
else
err = subyte((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZW:
if (KDFAULT(f->f_wb3s))
*(short *)f->f_wb3a = f->f_wb3d;
else
err = susword((void *)f->f_wb3a, f->f_wb3d);
break;
#ifdef DEBUG
case SSW4_SZLN:
panic("writeback: wb3s indicates LINE write");
#endif
}
if (err) {
fa = f->f_wb3a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#3", fp->f_pc, f->f_fa,
f->f_wb3a, f->f_wb3d);
#endif
}
}
pcb->pcb_onfault = oonfault;
if (err)
err = SIGSEGV;
return err;
}
#ifdef DEBUG
void
dumpssw(u_short ssw)
{
printf(" SSW: %x: ", ssw);
if (ssw & SSW4_CP)
printf("CP,");
if (ssw & SSW4_CU)
printf("CU,");
if (ssw & SSW4_CT)
printf("CT,");
if (ssw & SSW4_CM)
printf("CM,");
if (ssw & SSW4_MA)
printf("MA,");
if (ssw & SSW4_ATC)
printf("ATC,");
if (ssw & SSW4_LK)
printf("LK,");
if (ssw & SSW4_RW)
printf("RW,");
printf(" SZ=%s, TT=%s, TM=%s\n",
f7sz[(ssw & SSW4_SZMASK) >> 5],
f7tt[(ssw & SSW4_TTMASK) >> 3],
f7tm[ssw & SSW4_TMMASK]);
}
void
dumpwb(int num, u_short s, u_int a, u_int d)
{
struct lwp *l = curlwp;
struct proc *p = l->l_proc;
paddr_t pa;
printf(" writeback #%d: VA %x, data %x, SZ=%s, TT=%s, TM=%s\n",
num, a, d, f7sz[(s & SSW4_SZMASK) >> 5],
f7tt[(s & SSW4_TTMASK) >> 3], f7tm[s & SSW4_TMMASK]);
printf(" PA ");
if (pmap_extract(p->p_vmspace->vm_map.pmap, (vaddr_t)a, &pa) == false)
printf("<invalid address>");
else
printf("%lx, current value %lx", pa, fuword((void *)a));
printf("\n");
}
#endif
#endif

3
sys/arch/hp300/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.70 2018/08/22 01:05:22 msaitoh Exp $ */
/* $NetBSD: cpu.h,v 1.71 2019/02/18 01:12:23 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -120,7 +120,6 @@ extern uint8_t *intiobase, *intiolimit, *extiobase;
extern void (*vectab[])(void);
/* locore.s functions */
int suline(void *, void *);
void loadustp(int);
void doboot(void) __attribute__((__noreturn__));

3
sys/arch/luna68k/conf/files.luna68k
View File

@ -1,5 +1,5 @@
#
# $NetBSD: files.luna68k,v 1.27 2018/02/25 00:27:16 mrg Exp $
# $NetBSD: files.luna68k,v 1.28 2019/02/18 01:12:23 thorpej Exp $
#
maxpartitions 8
maxusers 2 8 64
@ -17,6 +17,7 @@ file arch/luna68k/luna68k/trap.c
file arch/m68k/m68k/cacheops.c
file arch/m68k/m68k/db_memrw.c ddb | kgdb
file arch/m68k/m68k/fpu.c compile-with "${M68K_KERN_FPU}"
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

3
sys/arch/luna68k/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.35 2018/08/22 01:05:22 msaitoh Exp $ */
/* $NetBSD: cpu.h,v 1.36 2019/02/18 01:12:23 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -120,7 +120,6 @@ extern u_int intiobase_phys, intiotop_phys; /* XXX */
void dumpsys(void);
/* locore.s functions */
int suline(void *, void *);
void loadustp(int);
/* machdep.c functions */

310
sys/arch/luna68k/luna68k/trap.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: trap.c,v 1.69 2015/03/04 20:29:59 martin Exp $ */
/* $NetBSD: trap.c,v 1.70 2019/02/18 01:12:23 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.69 2015/03/04 20:29:59 martin Exp $");
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.70 2019/02/18 01:12:23 thorpej Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@ -69,7 +69,6 @@ __KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.69 2015/03/04 20:29:59 martin Exp $");
#include <dev/cons.h>
int writeback(struct frame *fp, int docachepush);
void trap(struct frame *fp, int type, u_int code, u_int v);
#if defined(M68040)
@ -186,7 +185,7 @@ again:
"pid %d(%s): writeback aborted in sigreturn, pc=%x\n",
p->p_pid, p->p_comm, fp->f_pc, faultaddr);
#endif
} else if ((sig = writeback(fp, fromtrap))) {
} else if ((sig = m68040_writeback(fp, fromtrap))) {
ksiginfo_t ksi;
beenhere = 1;
oticks = p->p_sticks;
@ -538,7 +537,7 @@ trap(struct frame *fp, int type, unsigned code, unsigned v)
}
#ifdef M68040
if (cputype == CPU_68040)
(void) writeback(fp, 1);
(void) m68040_writeback(fp, 1);
#endif
return;
}
@ -589,304 +588,3 @@ trap(struct frame *fp, int type, unsigned code, unsigned v)
out:
userret(l, fp, sticks, v, 1);
}
#ifdef M68040
#include <m68k/cacheops_40.h>
#ifdef DEBUG
struct writebackstats {
int calls;
int cpushes;
int move16s;
int wb1s, wb2s, wb3s;
int wbsize[4];
} wbstats;
char *f7sz[] = { "longword", "byte", "word", "line" };
char *f7tt[] = { "normal", "MOVE16", "AFC", "ACK" };
char *f7tm[] = { "d-push", "u-data", "u-code", "M-data",
"M-code", "k-data", "k-code", "RES" };
char wberrstr[] =
"WARNING: pid %d(%s) writeback [%s] failed, pc=%x fa=%x wba=%x wbd=%x\n";
#endif
int
writeback(struct frame *fp, int docachepush)
{
struct fmt7 *f = &fp->f_fmt7;
struct lwp *l = curlwp;
struct proc *p = l->l_proc;
struct pcb *pcb = lwp_getpcb(l);
int err = 0;
u_int fa;
void *oonfault = pcb->pcb_onfault;
paddr_t pa;
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pid=%d, fa=%x,", p->p_pid, f->f_fa);
dumpssw(f->f_ssw);
}
wbstats.calls++;
#endif
/*
* Deal with special cases first.
*/
if ((f->f_ssw & SSW4_TMMASK) == SSW4_TMDCP) {
/*
* Dcache push fault.
* Line-align the address and write out the push data to
* the indicated physical address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pushing %s to PA %x, data %x",
f7sz[(f->f_ssw & SSW4_SZMASK) >> 5],
f->f_fa, f->f_pd0);
if ((f->f_ssw & SSW4_SZMASK) == SSW4_SZLN)
printf("/%x/%x/%x",
f->f_pd1, f->f_pd2, f->f_pd3);
printf("\n");
}
if (f->f_wb1s & SSW4_WBSV)
panic("writeback: cache push with WB1S valid");
wbstats.cpushes++;
#endif
/*
* XXX there are security problems if we attempt to do a
* cache push after a signal handler has been called.
*/
if (docachepush) {
pmap_enter(pmap_kernel(), (vaddr_t)vmmap,
trunc_page(f->f_fa), VM_PROT_WRITE,
VM_PROT_WRITE|PMAP_WIRED);
pmap_update(pmap_kernel());
fa = (u_int)&vmmap[(f->f_fa & PGOFSET) & ~0xF];
memcpy((void *)fa, (void *)&f->f_pd0, 16);
(void) pmap_extract(pmap_kernel(), (vaddr_t)fa, &pa);
DCFL_40(pa);
pmap_remove(pmap_kernel(), (vaddr_t)vmmap,
(vaddr_t)&vmmap[PAGE_SIZE]);
pmap_update(pmap_kernel());
} else
printf("WARNING: pid %d(%s) uid %d: CPUSH not done\n",
p->p_pid, p->p_comm, kauth_cred_geteuid(l->l_cred));
} else if ((f->f_ssw & (SSW4_RW|SSW4_TTMASK)) == SSW4_TTM16) {
/*
* MOVE16 fault.
* Line-align the address and write out the push data to
* the indicated virtual address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
printf(" MOVE16 to VA %x(%x), data %x/%x/%x/%x\n",
f->f_fa, f->f_fa & ~0xF, f->f_pd0, f->f_pd1,
f->f_pd2, f->f_pd3);
if (f->f_wb1s & SSW4_WBSV)
panic("writeback: MOVE16 with WB1S valid");
wbstats.move16s++;
#endif
if (KDFAULT(f->f_wb1s))
memcpy((void *)(f->f_fa & ~0xF), (void *)&f->f_pd0, 16);
else
err = suline((void *)(f->f_fa & ~0xF), (void *)&f->f_pd0);
if (err) {
fa = f->f_fa & ~0xF;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"MOVE16", fp->f_pc, f->f_fa,
f->f_fa & ~0xF, f->f_pd0);
#endif
}
} else if (f->f_wb1s & SSW4_WBSV) {
/*
* Writeback #1.
* Position the "memory-aligned" data and write it out.
*/
u_int wb1d = f->f_wb1d;
int off;
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(1, f->f_wb1s, f->f_wb1a, f->f_wb1d);
wbstats.wb1s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
off = (f->f_wb1a & 3) * 8;
switch (f->f_wb1s & SSW4_SZMASK) {
case SSW4_SZLW:
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT(f->f_wb1s))
*(long *)f->f_wb1a = wb1d;
else
err = suword((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZB:
off = 24 - off;
if (off)
wb1d >>= off;
if (KDFAULT(f->f_wb1s))
*(char *)f->f_wb1a = wb1d;
else
err = subyte((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZW:
off = (off + 16) % 32;
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT(f->f_wb1s))
*(short *)f->f_wb1a = wb1d;
else
err = susword((void *)f->f_wb1a, wb1d);
break;
}
if (err) {
fa = f->f_wb1a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#1", fp->f_pc, f->f_fa,
f->f_wb1a, f->f_wb1d);
#endif
}
}
/*
* Deal with the "normal" writebacks.
*
* XXX writeback2 is known to reflect a LINE size writeback after
* a MOVE16 was already dealt with above. Ignore it.
*/
if (err == 0 && (f->f_wb2s & SSW4_WBSV) &&
(f->f_wb2s & SSW4_SZMASK) != SSW4_SZLN) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
wbstats.wb2s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb2s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT(f->f_wb2s))
*(long *)f->f_wb2a = f->f_wb2d;
else
err = suword((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZB:
if (KDFAULT(f->f_wb2s))
*(char *)f->f_wb2a = f->f_wb2d;
else
err = subyte((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZW:
if (KDFAULT(f->f_wb2s))
*(short *)f->f_wb2a = f->f_wb2d;
else
err = susword((void *)f->f_wb2a, f->f_wb2d);
break;
}
if (err) {
fa = f->f_wb2a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED) {
printf(wberrstr, p->p_pid, p->p_comm,
"#2", fp->f_pc, f->f_fa,
f->f_wb2a, f->f_wb2d);
dumpssw(f->f_ssw);
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
}
#endif
}
}
if (err == 0 && (f->f_wb3s & SSW4_WBSV)) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(3, f->f_wb3s, f->f_wb3a, f->f_wb3d);
wbstats.wb3s++;
wbstats.wbsize[(f->f_wb3s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb3s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT(f->f_wb3s))
*(long *)f->f_wb3a = f->f_wb3d;
else
err = suword((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZB:
if (KDFAULT(f->f_wb3s))
*(char *)f->f_wb3a = f->f_wb3d;
else
err = subyte((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZW:
if (KDFAULT(f->f_wb3s))
*(short *)f->f_wb3a = f->f_wb3d;
else
err = susword((void *)f->f_wb3a, f->f_wb3d);
break;
#ifdef DEBUG
case SSW4_SZLN:
panic("writeback: wb3s indicates LINE write");
#endif
}
if (err) {
fa = f->f_wb3a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#3", fp->f_pc, f->f_fa,
f->f_wb3a, f->f_wb3d);
#endif
}
}
pcb->pcb_onfault = oonfault;
if (err)
err = SIGSEGV;
return (err);
}
#ifdef DEBUG
static void
dumpssw(u_short ssw)
{
printf(" SSW: %x: ", ssw);
if (ssw & SSW4_CP)
printf("CP,");
if (ssw & SSW4_CU)
printf("CU,");
if (ssw & SSW4_CT)
printf("CT,");
if (ssw & SSW4_CM)
printf("CM,");
if (ssw & SSW4_MA)
printf("MA,");
if (ssw & SSW4_ATC)
printf("ATC,");
if (ssw & SSW4_LK)
printf("LK,");
if (ssw & SSW4_RW)
printf("RW,");
printf(" SZ=%s, TT=%s, TM=%s\n",
f7sz[(ssw & SSW4_SZMASK) >> 5],
f7tt[(ssw & SSW4_TTMASK) >> 3],
f7tm[ssw & SSW4_TMMASK]);
}
static void
dumpwb(int num, u_short s, u_int a, u_int d)
{
struct proc *p = curproc;
paddr_t pa;
printf(" writeback #%d: VA %x, data %x, SZ=%s, TT=%s, TM=%s\n",
num, a, d, f7sz[(s & SSW4_SZMASK) >> 5],
f7tt[(s & SSW4_TTMASK) >> 3], f7tm[s & SSW4_TMMASK]);
printf(" PA ");
if (pmap_extract(p->p_vmspace->vm_map.pmap, (vaddr_t)a, &pa) == false)
printf("<invalid address>");
else
printf("%lx, current value %lx", pa, fuword((void *)a));
printf("\n");
}
#endif
#endif

6
sys/arch/m68k/include/frame.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: frame.h,v 1.30 2011/02/08 20:20:16 rmind Exp $ */
/* $NetBSD: frame.h,v 1.31 2019/02/18 01:12:23 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -218,6 +218,10 @@ void buildcontext(struct lwp *, void *, void *);
void sendsig_sigcontext(const ksiginfo_t *, const sigset_t *);
#endif
#ifdef M68040
int m68040_writeback(struct frame *, int);
#endif
#if defined(__mc68010__)
/*
* Restartable atomic sequence-cased compare-and-swap for atomic_cas ops

400
sys/arch/m68k/m68k/m68k_trap.c Normal file
View File

@ -0,0 +1,400 @@
/* $NetBSD: m68k_trap.c,v 1.1 2019/02/18 01:12:23 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
* Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* the Systems Programming Group of the University of Utah Computer
* Science Department.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: Utah $Hdr: trap.c 1.32 91/04/06$
*
* @(#)trap.c 7.15 (Berkeley) 8/2/91
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: m68k_trap.c,v 1.1 2019/02/18 01:12:23 thorpej Exp $");
#include "opt_m68k_arch.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/proc.h>
#include <sys/kauth.h>
#include <uvm/uvm_extern.h>
#include <m68k/cpu.h>
#include <m68k/cacheops.h>
#include <machine/trap.h>
#include <machine/cpu.h>
#include <machine/pcb.h>
extern int suline(void *, void *); /* locore.s */
#ifdef M68060
#define KDFAULT_060(c) (cputype == CPU_68060 && ((c) & FSLW_TM_SV))
#define WRFAULT_060(c) (cputype == CPU_68060 && ((c) & FSLW_RW_W))
#else
#define KDFAULT_060(c) 0
#define WRFAULT_060(c) 0
#endif
#ifdef M68040
#define KDFAULT_040(c) (cputype == CPU_68040 && \
((c) & SSW4_TMMASK) == SSW4_TMKD)
#define WRFAULT_040(c) (cputype == CPU_68040 && \
((c) & (SSW4_LK|SSW4_RW)) != SSW4_RW)
#else
#define KDFAULT_040(c) 0
#define WRFAULT_040(c) 0
#endif
#if defined(M68030) || defined(M68020)
#define KDFAULT_OTH(c) (cputype <= CPU_68030 && \
((c) & (SSW_DF|SSW_FCMASK)) == (SSW_DF|FC_SUPERD))
#define WRFAULT_OTH(c) (cputype <= CPU_68030 && \
(((c) & SSW_DF) != 0 && \
((((c) & SSW_RW) == 0) || (((c) & SSW_RM) != 0))))
#else
#define KDFAULT_OTH(c) 0
#define WRFAULT_OTH(c) 0
#endif
#define KDFAULT(c) (KDFAULT_060(c) || KDFAULT_040(c) || KDFAULT_OTH(c))
#define WRFAULT(c) (WRFAULT_060(c) || WRFAULT_040(c) || WRFAULT_OTH(c))
#ifdef M68040
#ifdef DEBUG
struct writebackstats {
int calls;
int cpushes;
int move16s;
int wb1s, wb2s, wb3s;
int wbsize[4];
} wbstats;
static const char *f7sz[] = { "longword", "byte", "word", "line" };
static const char *f7tt[] = { "normal", "MOVE16", "AFC", "ACK" };
static const char *f7tm[] = { "d-push", "u-data", "u-code", "M-data",
"M-code", "k-data", "k-code", "RES" };
static const char wberrstr[] =
"WARNING: pid %d(%s) writeback [%s] failed, pc=%x fa=%x wba=%x wbd=%x\n";
static void
dumpssw(u_short ssw)
{
printf(" SSW: %x: ", ssw);
if (ssw & SSW4_CP)
printf("CP,");
if (ssw & SSW4_CU)
printf("CU,");
if (ssw & SSW4_CT)
printf("CT,");
if (ssw & SSW4_CM)
printf("CM,");
if (ssw & SSW4_MA)
printf("MA,");
if (ssw & SSW4_ATC)
printf("ATC,");
if (ssw & SSW4_LK)
printf("LK,");
if (ssw & SSW4_RW)
printf("RW,");
printf(" SZ=%s, TT=%s, TM=%s\n",
f7sz[(ssw & SSW4_SZMASK) >> 5],
f7tt[(ssw & SSW4_TTMASK) >> 3],
f7tm[ssw & SSW4_TMMASK]);
}
static void
dumpwb(int num, u_short s, u_int a, u_int d)
{
struct proc *p = curproc;
paddr_t pa;
printf(" writeback #%d: VA %x, data %x, SZ=%s, TT=%s, TM=%s\n",
num, a, d, f7sz[(s & SSW4_SZMASK) >> 5],
f7tt[(s & SSW4_TTMASK) >> 3], f7tm[s & SSW4_TMMASK]);
printf(" PA ");
if (pmap_extract(p->p_vmspace->vm_map.pmap, (vaddr_t)a, &pa) == false)
printf("<invalid address>");
else
printf("%lx, current value %lx", pa, fuword((void *)a));
printf("\n");
}
#endif /* DEBUG */
/* Because calling memcpy() for 16 bytes is *way* too much overhead ... */
static inline void
fastcopy16(u_int *dst, const u_int *src)
{
*dst++ = *src++;
*dst++ = *src++;
*dst++ = *src++;
*dst = *src;
}
int
m68040_writeback(struct frame *fp, int docachepush)
{
struct fmt7 *f = &fp->f_fmt7;
struct lwp *l = curlwp;
struct proc *p = l->l_proc;
struct pcb *pcb = lwp_getpcb(l);
int err = 0;
u_int fa = 0;
void *oonfault = pcb->pcb_onfault;
paddr_t pa;
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pid=%d, fa=%x,", p->p_pid, f->f_fa);
dumpssw(f->f_ssw);
}
wbstats.calls++;
#endif
/*
* Deal with special cases first.
*/
if ((f->f_ssw & SSW4_TMMASK) == SSW4_TMDCP) {
/*
* Dcache push fault.
* Line-align the address and write out the push data to
* the indicated physical address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pushing %s to PA %x, data %x",
f7sz[(f->f_ssw & SSW4_SZMASK) >> 5],
f->f_fa, f->f_pd0);
if ((f->f_ssw & SSW4_SZMASK) == SSW4_SZLN)
printf("/%x/%x/%x",
f->f_pd1, f->f_pd2, f->f_pd3);
printf("\n");
}
if (f->f_wb1s & SSW4_WBSV)
panic("writeback: cache push with WB1S valid");
wbstats.cpushes++;
#endif
/*
* XXX there are security problems if we attempt to do a
* cache push after a signal handler has been called.
*/
if (docachepush) {
pmap_enter(pmap_kernel(), (vaddr_t)vmmap,
trunc_page(f->f_fa), VM_PROT_WRITE,
VM_PROT_WRITE|PMAP_WIRED);
pmap_update(pmap_kernel());
fa = (u_int)&vmmap[m68k_page_offset(f->f_fa) & ~0xF];
fastcopy16((void *)fa, (void *)&f->f_pd0);
(void) pmap_extract(pmap_kernel(), (vaddr_t)fa, &pa);
DCFL(pa);
pmap_remove(pmap_kernel(), (vaddr_t)vmmap,
(vaddr_t)&vmmap[PAGE_SIZE]);
pmap_update(pmap_kernel());
} else
printf("WARNING: pid %d(%s) uid %d: CPUSH not done\n",
p->p_pid, p->p_comm, kauth_cred_geteuid(l->l_cred));
} else if ((f->f_ssw & (SSW4_RW|SSW4_TTMASK)) == SSW4_TTM16) {
/*
* MOVE16 fault.
* Line-align the address and write out the push data to
* the indicated virtual address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
printf(" MOVE16 to VA %x(%x), data %x/%x/%x/%x\n",
f->f_fa, f->f_fa & ~0xF, f->f_pd0, f->f_pd1,
f->f_pd2, f->f_pd3);
if (f->f_wb1s & SSW4_WBSV)
panic("writeback: MOVE16 with WB1S valid");
wbstats.move16s++;
#endif
if (KDFAULT(f->f_wb1s))
fastcopy16((void *)(f->f_fa & ~0xF), (void *)&f->f_pd0);
else
err = suline((void *)(f->f_fa & ~0xF), (void *)&f->f_pd0);
if (err) {
fa = f->f_fa & ~0xF;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"MOVE16", fp->f_pc, f->f_fa,
f->f_fa & ~0xF, f->f_pd0);
#endif
}
} else if (f->f_wb1s & SSW4_WBSV) {
/*
* Writeback #1.
* Position the "memory-aligned" data and write it out.
*/
u_int wb1d = f->f_wb1d;
int off;
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(1, f->f_wb1s, f->f_wb1a, f->f_wb1d);
wbstats.wb1s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
off = (f->f_wb1a & 3) * 8;
switch (f->f_wb1s & SSW4_SZMASK) {
case SSW4_SZLW:
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT(f->f_wb1s))
*(long *)f->f_wb1a = wb1d;
else
err = suword((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZB:
off = 24 - off;
if (off)
wb1d >>= off;
if (KDFAULT(f->f_wb1s))
*(char *)f->f_wb1a = wb1d;
else
err = subyte((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZW:
off = (off + 16) % 32;
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT(f->f_wb1s))
*(short *)f->f_wb1a = wb1d;
else
err = susword((void *)f->f_wb1a, wb1d);
break;
}
if (err) {
fa = f->f_wb1a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#1", fp->f_pc, f->f_fa,
f->f_wb1a, f->f_wb1d);
#endif
}
}
/*
* Deal with the "normal" writebacks.
*
* XXX writeback2 is known to reflect a LINE size writeback after
* a MOVE16 was already dealt with above. Ignore it.
*/
if (err == 0 && (f->f_wb2s & SSW4_WBSV) &&
(f->f_wb2s & SSW4_SZMASK) != SSW4_SZLN) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
wbstats.wb2s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb2s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT(f->f_wb2s))
*(long *)f->f_wb2a = f->f_wb2d;
else
err = suword((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZB:
if (KDFAULT(f->f_wb2s))
*(char *)f->f_wb2a = f->f_wb2d;
else
err = subyte((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZW:
if (KDFAULT(f->f_wb2s))
*(short *)f->f_wb2a = f->f_wb2d;
else
err = susword((void *)f->f_wb2a, f->f_wb2d);
break;
}
if (err) {
fa = f->f_wb2a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED) {
printf(wberrstr, p->p_pid, p->p_comm,
"#2", fp->f_pc, f->f_fa,
f->f_wb2a, f->f_wb2d);
dumpssw(f->f_ssw);
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
}
#endif
}
}
if (err == 0 && (f->f_wb3s & SSW4_WBSV)) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(3, f->f_wb3s, f->f_wb3a, f->f_wb3d);
wbstats.wb3s++;
wbstats.wbsize[(f->f_wb3s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb3s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT(f->f_wb3s))
*(long *)f->f_wb3a = f->f_wb3d;
else
err = suword((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZB:
if (KDFAULT(f->f_wb3s))
*(char *)f->f_wb3a = f->f_wb3d;
else
err = subyte((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZW:
if (KDFAULT(f->f_wb3s))
*(short *)f->f_wb3a = f->f_wb3d;
else
err = susword((void *)f->f_wb3a, f->f_wb3d);
break;
#ifdef DEBUG
case SSW4_SZLN:
panic("writeback: wb3s indicates LINE write");
#endif
}
if (err) {
fa = f->f_wb3a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#3", fp->f_pc, f->f_fa,
f->f_wb3a, f->f_wb3d);
#endif
}
}
pcb->pcb_onfault = oonfault;
if (err)
err = SIGSEGV;
return err;
}
#endif /* M68040 */

3
sys/arch/mac68k/conf/files.mac68k
View File

@ -1,4 +1,4 @@
# $NetBSD: files.mac68k,v 1.127 2018/12/19 13:57:48 maxv Exp $
# $NetBSD: files.mac68k,v 1.128 2019/02/18 01:12:23 thorpej Exp $
# mac68k-specific configuration info
@ -176,6 +176,7 @@ file arch/m68k/m68k/cacheops.c
file arch/m68k/m68k/db_memrw.c ddb | kgdb
file arch/m68k/m68k/fpu.c compile-with "${M68K_KERN_FPU}"
file arch/m68k/m68k/kgdb_machdep.c kgdb
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

3
sys/arch/mac68k/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.100 2018/08/22 01:05:22 msaitoh Exp $ */
/* $NetBSD: cpu.h,v 1.101 2019/02/18 01:12:23 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -289,7 +289,6 @@ int mac68k_ring_bell(int, int, int);
u_int get_mapping(void);
/* locore.s functions */
int suline(void *, void *);
void loadustp(int);
/* fpu.c */

317
sys/arch/mac68k/mac68k/trap.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: trap.c,v 1.147 2015/03/03 20:36:31 martin Exp $ */
/* $NetBSD: trap.c,v 1.148 2019/02/18 01:12:23 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.147 2015/03/03 20:36:31 martin Exp $");
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.148 2019/02/18 01:12:23 thorpej Exp $");
#include "opt_ddb.h"
#include "opt_execfmt.h"
@ -151,14 +151,6 @@ void trap(struct frame *, int, u_int, u_int);
static inline void userret(struct lwp *, struct frame *, u_quad_t, u_int, int);
#if defined(M68040)
static int writeback(struct frame *, int);
#if DEBUG
static void dumpssw(u_short);
static void dumpwb(int, u_short, u_int, u_int);
#endif
#endif
/*
* Trap and syscall both need the following work done before returning
* to user mode.
@ -204,7 +196,7 @@ again:
"pid %d(%s): writeback aborted in sigreturn, pc=%x\n",
p->p_pid, p->p_comm, fp->f_pc, faultaddr);
#endif
} else if ((sig = writeback(fp, fromtrap))) {
} else if ((sig = m68040_writeback(fp, fromtrap))) {
ksiginfo_t ksi;
beenhere = 1;
oticks = p->p_sticks;
@ -579,7 +571,7 @@ copyfault:
}
#if defined(M68040)
if (mmutype == MMU_68040)
(void)writeback(fp, 1);
(void)m68040_writeback(fp, 1);
#endif
return;
}
@ -626,304 +618,3 @@ copyfault:
out:
userret(l, fp, sticks, v, 1);
}
#if defined(M68040)
#ifdef DEBUG
struct writebackstats {
int calls;
int cpushes;
int move16s;
int wb1s, wb2s, wb3s;
int wbsize[4];
} wbstats;
const char *f7sz[] = { "longword", "byte", "word", "line" };
const char *f7tt[] = { "normal", "MOVE16", "AFC", "ACK" };
const char *f7tm[] = { "d-push", "u-data", "u-code", "M-data",
"M-code", "k-data", "k-code", "RES" };
char wberrstr[] =
"WARNING: pid %d(%s) writeback [%s] failed, pc=%x fa=%x wba=%x wbd=%x\n";
#endif
static int
writeback(struct frame *fp, int docachepush)
{
struct fmt7 *f = &fp->f_fmt7;
struct lwp *l = curlwp;
struct proc *p = l->l_proc;
struct pcb *pcb = lwp_getpcb(l);
int err = 0;
u_int fa;
void *oonfault = pcb->pcb_onfault;
paddr_t pa;
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pid=%d, fa=%x,", p->p_pid, f->f_fa);
dumpssw(f->f_ssw);
}
wbstats.calls++;
#endif
/*
* Deal with special cases first.
*/
if ((f->f_ssw & SSW4_TMMASK) == SSW4_TMDCP) {
/*
* Dcache push fault.
* Line-align the address and write out the push data to
* the indicated physical address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pushing %s to PA %x, data %x",
f7sz[(f->f_ssw & SSW4_SZMASK) >> 5],
f->f_fa, f->f_pd0);
if ((f->f_ssw & SSW4_SZMASK) == SSW4_SZLN)
printf("/%x/%x/%x",
f->f_pd1, f->f_pd2, f->f_pd3);
printf("\n");
}
if (f->f_wb1s & SSW4_WBSV)
panic("writeback: cache push with WB1S valid");
wbstats.cpushes++;
#endif
/*
* XXX there are security problems if we attempt to do a
* cache push after a signal handler has been called.
*/
if (docachepush) {
pmap_enter(pmap_kernel(), (vaddr_t)vmmap,
trunc_page(f->f_fa), VM_PROT_WRITE,
VM_PROT_WRITE|PMAP_WIRED);
pmap_update(pmap_kernel());
fa = (u_int)&vmmap[m68k_page_offset(f->f_fa) & ~0xF];
memcpy((void *)fa, (void *)&f->f_pd0, 16);
(void) pmap_extract(pmap_kernel(), (vaddr_t)fa, &pa);
DCFL(pa);
pmap_remove(pmap_kernel(), (vaddr_t)vmmap,
(vaddr_t)&vmmap[PAGE_SIZE]);
pmap_update(pmap_kernel());
} else
printf("WARNING: pid %d(%s) uid %d: CPUSH not done\n",
p->p_pid, p->p_comm, kauth_cred_geteuid(l->l_cred));
} else if ((f->f_ssw & (SSW4_RW|SSW4_TTMASK)) == SSW4_TTM16) {
/*
* MOVE16 fault.
* Line-align the address and write out the push data to
* the indicated virtual address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
printf(" MOVE16 to VA %x(%x), data %x/%x/%x/%x\n",
f->f_fa, f->f_fa & ~0xF, f->f_pd0, f->f_pd1,
f->f_pd2, f->f_pd3);
if (f->f_wb1s & SSW4_WBSV)
panic("writeback: MOVE16 with WB1S valid");
wbstats.move16s++;
#endif
if (KDFAULT(f->f_wb1s))
memcpy((void *)(f->f_fa & ~0xF), (void *)&f->f_pd0, 16);
else
err = suline((void *)(f->f_fa & ~0xF), (void *)&f->f_pd0);
if (err) {
fa = f->f_fa & ~0xF;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"MOVE16", fp->f_pc, f->f_fa,
f->f_fa & ~0xF, f->f_pd0);
#endif
}
} else if (f->f_wb1s & SSW4_WBSV) {
/*
* Writeback #1.
* Position the "memory-aligned" data and write it out.
*/
u_int wb1d = f->f_wb1d;
int off;
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(1, f->f_wb1s, f->f_wb1a, f->f_wb1d);
wbstats.wb1s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
off = (f->f_wb1a & 3) * 8;
switch (f->f_wb1s & SSW4_SZMASK) {
case SSW4_SZLW:
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT(f->f_wb1s))
*(long *)f->f_wb1a = wb1d;
else
err = suword((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZB:
off = 24 - off;
if (off)
wb1d >>= off;
if (KDFAULT(f->f_wb1s))
*(char *)f->f_wb1a = wb1d;
else
err = subyte((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZW:
off = (off + 16) % 32;
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT(f->f_wb1s))
*(short *)f->f_wb1a = wb1d;
else
err = susword((void *)f->f_wb1a, wb1d);
break;
}
if (err) {
fa = f->f_wb1a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#1", fp->f_pc, f->f_fa,
f->f_wb1a, f->f_wb1d);
#endif
}
}
/*
* Deal with the "normal" writebacks.
*
* XXX writeback2 is known to reflect a LINE size writeback after
* a MOVE16 was already dealt with above. Ignore it.
*/
if (err == 0 && (f->f_wb2s & SSW4_WBSV) &&
(f->f_wb2s & SSW4_SZMASK) != SSW4_SZLN) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
wbstats.wb2s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb2s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT(f->f_wb2s))
*(long *)f->f_wb2a = f->f_wb2d;
else
err = suword((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZB:
if (KDFAULT(f->f_wb2s))
*(char *)f->f_wb2a = f->f_wb2d;
else
err = subyte((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZW:
if (KDFAULT(f->f_wb2s))
*(short *)f->f_wb2a = f->f_wb2d;
else
err = susword((void *)f->f_wb2a, f->f_wb2d);
break;
}
if (err) {
fa = f->f_wb2a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED) {
printf(wberrstr, p->p_pid, p->p_comm,
"#2", fp->f_pc, f->f_fa,
f->f_wb2a, f->f_wb2d);
dumpssw(f->f_ssw);
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
}
#endif
}
}
if (err == 0 && (f->f_wb3s & SSW4_WBSV)) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(3, f->f_wb3s, f->f_wb3a, f->f_wb3d);
wbstats.wb3s++;
wbstats.wbsize[(f->f_wb3s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb3s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT(f->f_wb3s))
*(long *)f->f_wb3a = f->f_wb3d;
else
err = suword((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZB:
if (KDFAULT(f->f_wb3s))
*(char *)f->f_wb3a = f->f_wb3d;
else
err = subyte((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZW:
if (KDFAULT(f->f_wb3s))
*(short *)f->f_wb3a = f->f_wb3d;
else
err = susword((void *)f->f_wb3a, f->f_wb3d);
break;
#ifdef DEBUG
case SSW4_SZLN:
panic("writeback: wb3s indicates LINE write");
#endif
}
if (err) {
fa = f->f_wb3a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#3", fp->f_pc, f->f_fa,
f->f_wb3a, f->f_wb3d);
#endif
}
}
pcb->pcb_onfault = oonfault;
if (err)
err = SIGSEGV;
return (err);
}
#ifdef DEBUG
static void
dumpssw(u_short ssw)
{
printf(" SSW: %x: ", ssw);
if (ssw & SSW4_CP)
printf("CP,");
if (ssw & SSW4_CU)
printf("CU,");
if (ssw & SSW4_CT)
printf("CT,");
if (ssw & SSW4_CM)
printf("CM,");
if (ssw & SSW4_MA)
printf("MA,");
if (ssw & SSW4_ATC)
printf("ATC,");
if (ssw & SSW4_LK)
printf("LK,");
if (ssw & SSW4_RW)
printf("RW,");
printf(" SZ=%s, TT=%s, TM=%s\n",
f7sz[(ssw & SSW4_SZMASK) >> 5],
f7tt[(ssw & SSW4_TTMASK) >> 3],
f7tm[ssw & SSW4_TMMASK]);
}
static
void
dumpwb(int num, u_short s, u_int a, u_int d)
{
struct proc *p = curproc;
paddr_t pa;
printf(" writeback #%d: VA %x, data %x, SZ=%s, TT=%s, TM=%s\n",
num, a, d, f7sz[(s & SSW4_SZMASK) >> 5],
f7tt[(s & SSW4_TTMASK) >> 3], f7tm[s & SSW4_TMMASK]);
printf(" PA ");
if (pmap_extract(p->p_vmspace->vm_map.pmap, (vaddr_t)a, &pa) == false)
printf("<invalid address>");
else
printf("%lx, current value %lx", pa, fuword((void *)a));
printf("\n");
}
#endif
#endif

3
sys/arch/mvme68k/conf/files.mvme68k
View File

@ -1,4 +1,4 @@
# $NetBSD: files.mvme68k,v 1.63 2018/12/19 13:57:48 maxv Exp $
# $NetBSD: files.mvme68k,v 1.64 2019/02/18 01:12:23 thorpej Exp $
# config file for mvme68k
@ -97,6 +97,7 @@ file arch/mvme68k/mvme68k/pmap_bootstrap.c compile-with "${NOPROF_C}"
file arch/mvme68k/mvme68k/trap.c
file arch/m68k/m68k/cacheops.c
file arch/m68k/m68k/db_memrw.c ddb | kgdb
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

326
sys/arch/mvme68k/mvme68k/trap.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: trap.c,v 1.108 2015/03/04 20:29:59 martin Exp $ */
/* $NetBSD: trap.c,v 1.109 2019/02/18 01:12:24 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.108 2015/03/04 20:29:59 martin Exp $");
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.109 2019/02/18 01:12:24 thorpej Exp $");
#include "opt_ddb.h"
#include "opt_execfmt.h"
@ -78,7 +78,6 @@ __KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.108 2015/03/04 20:29:59 martin Exp $");
#include <compat/sunos/sunos_exec.h>
#endif
int writeback(struct frame *fp, int docachepush);
void trap(struct frame *fp, int type, u_int code, u_int v);
#if defined(M68040) || defined(M68060)
@ -237,7 +236,7 @@ again:
"pid %d(%s): writeback aborted in sigreturn, pc=%x\n",
p->p_pid, p->p_comm, fp->f_pc, faultaddr);
#endif
} else if ((sig = writeback(fp, fromtrap))) {
} else if ((sig = m68040_writeback(fp, fromtrap))) {
ksiginfo_t ksi;
beenhere = 1;
oticks = p->p_sticks;
@ -607,7 +606,7 @@ trap(struct frame *fp, int type, unsigned int code, unsigned int v)
#if defined(M68030) || defined(M68060)
if (cputype == CPU_68040)
#endif
(void)writeback(fp, 1);
(void)m68040_writeback(fp, 1);
#endif
return;
}
@ -658,320 +657,3 @@ trap(struct frame *fp, int type, unsigned int code, unsigned int v)
out:
userret(l, fp, sticks, v, 1);
}
#ifdef M68040
#ifdef DEBUG
struct writebackstats {
int calls;
int cpushes;
int move16s;
int wb1s, wb2s, wb3s;
int wbsize[4];
} wbstats;
const char *f7sz[] = { "longword", "byte", "word", "line" };
const char *f7tt[] = { "normal", "MOVE16", "AFC", "ACK" };
const char *f7tm[] = { "d-push", "u-data", "u-code", "M-data",
"M-code", "k-data", "k-code", "RES" };
char wberrstr[] =
"WARNING: pid %d(%s) writeback [%s] failed, pc=%x fa=%x wba=%x wbd=%x\n";
#endif
/*
* Because calling memcpy() for 16 bytes is *way* too much overhead ...
*/
static inline void fastcopy16(u_int *, u_int *);
static inline void
fastcopy16(u_int *src, u_int *dst)
{
*src++ = *dst++;
*src++ = *dst++;
*src++ = *dst++;
*src = *dst;
}
int
writeback(struct frame *fp, int docachepush)
{
struct fmt7 *f = &fp->f_fmt7;
struct lwp *l = curlwp;
struct proc *p = l->l_proc;
struct pcb *pcb = lwp_getpcb(l);
int err = 0;
u_int fa;
void *oonfault = pcb->pcb_onfault;
extern int suline(void *, void *); /* locore.s */
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pid=%d, fa=%x,", p->p_pid, f->f_fa);
dumpssw(f->f_ssw);
}
wbstats.calls++;
#endif
/*
* Deal with special cases first.
*/
if ((f->f_ssw & SSW4_TMMASK) == SSW4_TMDCP) {
/*
* Dcache push fault.
* Line-align the address and write out the push data to
* the indicated physical address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pushing %s to PA %x, data %x",
f7sz[(f->f_ssw & SSW4_SZMASK) >> 5],
f->f_fa, f->f_pd0);
if ((f->f_ssw & SSW4_SZMASK) == SSW4_SZLN)
printf("/%x/%x/%x",
f->f_pd1, f->f_pd2, f->f_pd3);
printf("\n");
}
if (f->f_wb1s & SSW4_WBSV)
panic("writeback: cache push with WB1S valid");
wbstats.cpushes++;
#endif
/*
* XXX there are security problems if we attempt to do a
* cache push after a signal handler has been called.
*/
if (docachepush) {
paddr_t pa;
pmap_enter(pmap_kernel(), (vaddr_t)vmmap,
trunc_page(f->f_fa), VM_PROT_WRITE,
VM_PROT_WRITE|PMAP_WIRED);
pmap_update(pmap_kernel());
fa = (u_int)&vmmap[(f->f_fa & PGOFSET) & ~0xF];
fastcopy16(&f->f_pd0, (u_int *)fa);
(void) pmap_extract(pmap_kernel(), (vaddr_t)fa, &pa);
DCFL_40(pa);
pmap_remove(pmap_kernel(), (vaddr_t)vmmap,
(vaddr_t)&vmmap[PAGE_SIZE]);
pmap_update(pmap_kernel());
} else
printf("WARNING: pid %d(%s) uid %d: CPUSH not done\n",
p->p_pid, p->p_comm, kauth_cred_geteuid(l->l_cred));
} else if ((f->f_ssw & (SSW4_RW|SSW4_TTMASK)) == SSW4_TTM16) {
/*
* MOVE16 fault.
* Line-align the address and write out the push data to
* the indicated virtual address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
printf(" MOVE16 to VA %x(%x), data %x/%x/%x/%x\n",
f->f_fa, f->f_fa & ~0xF, f->f_pd0, f->f_pd1,
f->f_pd2, f->f_pd3);
if (f->f_wb1s & SSW4_WBSV)
panic("%s: MOVE16 with WB1S valid", __func__);
wbstats.move16s++;
#endif
if (KDFAULT_040(f->f_wb1s))
fastcopy16(&f->f_pd0, (u_int *)(f->f_fa & ~0xF));
else
err = suline((void *)(f->f_fa & ~0xF),
(void *)&f->f_pd0);
if (err) {
fa = f->f_fa & ~0xF;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"MOVE16", fp->f_pc, f->f_fa,
f->f_fa & ~0xF, f->f_pd0);
#endif
}
} else if (f->f_wb1s & SSW4_WBSV) {
/*
* Writeback #1.
* Position the "memory-aligned" data and write it out.
*/
u_int wb1d = f->f_wb1d;
int off;
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(1, f->f_wb1s, f->f_wb1a, f->f_wb1d);
wbstats.wb1s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
off = (f->f_wb1a & 3) * 8;
switch (f->f_wb1s & SSW4_SZMASK) {
case SSW4_SZLW:
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT_040(f->f_wb1s))
*(long *)f->f_wb1a = wb1d;
else
err = suword((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZB:
off = 24 - off;
if (off)
wb1d >>= off;
if (KDFAULT_040(f->f_wb1s))
*(char *)f->f_wb1a = wb1d;
else
err = subyte((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZW:
off = (off + 16) % 32;
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT_040(f->f_wb1s))
*(short *)f->f_wb1a = wb1d;
else
err = susword((void *)f->f_wb1a, wb1d);
break;
}
if (err) {
fa = f->f_wb1a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#1", fp->f_pc, f->f_fa,
f->f_wb1a, f->f_wb1d);
#endif
}
}
/*
* Deal with the "normal" writebacks.
*
* XXX writeback2 is known to reflect a LINE size writeback after
* a MOVE16 was already dealt with above. Ignore it.
*/
if (err == 0 && (f->f_wb2s & SSW4_WBSV) &&
(f->f_wb2s & SSW4_SZMASK) != SSW4_SZLN) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
wbstats.wb2s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb2s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT_040(f->f_wb2s))
*(long *)f->f_wb2a = f->f_wb2d;
else
err = suword((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZB:
if (KDFAULT_040(f->f_wb2s))
*(char *)f->f_wb2a = f->f_wb2d;
else
err = subyte((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZW:
if (KDFAULT_040(f->f_wb2s))
*(short *)f->f_wb2a = f->f_wb2d;
else
err = susword((void *)f->f_wb2a, f->f_wb2d);
break;
}
if (err) {
fa = f->f_wb2a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED) {
printf(wberrstr, p->p_pid, p->p_comm,
"#2", fp->f_pc, f->f_fa,
f->f_wb2a, f->f_wb2d);
dumpssw(f->f_ssw);
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
}
#endif
}
}
if (err == 0 && (f->f_wb3s & SSW4_WBSV)) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(3, f->f_wb3s, f->f_wb3a, f->f_wb3d);
wbstats.wb3s++;
wbstats.wbsize[(f->f_wb3s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb3s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT_040(f->f_wb3s))
*(long *)f->f_wb3a = f->f_wb3d;
else
err = suword((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZB:
if (KDFAULT_040(f->f_wb3s))
*(char *)f->f_wb3a = f->f_wb3d;
else
err = subyte((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZW:
if (KDFAULT_040(f->f_wb3s))
*(short *)f->f_wb3a = f->f_wb3d;
else
err = susword((void *)f->f_wb3a, f->f_wb3d);
break;
#ifdef DEBUG
case SSW4_SZLN:
panic("writeback: wb3s indicates LINE write");
#endif
}
if (err) {
fa = f->f_wb3a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#3", fp->f_pc, f->f_fa,
f->f_wb3a, f->f_wb3d);
#endif
}
}
pcb->pcb_onfault = oonfault;
if (err)
err = SIGSEGV;
return err;
}
#ifdef DEBUG
void
dumpssw(u_short ssw)
{
printf(" SSW: %x: ", ssw);
if (ssw & SSW4_CP)
printf("CP,");
if (ssw & SSW4_CU)
printf("CU,");
if (ssw & SSW4_CT)
printf("CT,");
if (ssw & SSW4_CM)
printf("CM,");
if (ssw & SSW4_MA)
printf("MA,");
if (ssw & SSW4_ATC)
printf("ATC,");
if (ssw & SSW4_LK)
printf("LK,");
if (ssw & SSW4_RW)
printf("RW,");
printf(" SZ=%s, TT=%s, TM=%s\n",
f7sz[(ssw & SSW4_SZMASK) >> 5],
f7tt[(ssw & SSW4_TTMASK) >> 3],
f7tm[ssw & SSW4_TMMASK]);
}
void
dumpwb(int num, u_short s, u_int a, u_int d)
{
struct lwp *l = curlwp;
struct proc *p = l->l_proc;
paddr_t pa;
printf(" writeback #%d: VA %x, data %x, SZ=%s, TT=%s, TM=%s\n",
num, a, d, f7sz[(s & SSW4_SZMASK) >> 5],
f7tt[(s & SSW4_TTMASK) >> 3], f7tm[s & SSW4_TMMASK]);
printf(" PA ");
if (pmap_extract(p->p_vmspace->vm_map.pmap, (vaddr_t)a, &pa) == false)
printf("<invalid address>");
else
printf("%lx, current value %lx", pa, fuword((void *)a));
printf("\n");
}
#endif
#endif

3
sys/arch/news68k/conf/files.news68k
View File

@ -1,4 +1,4 @@
# $NetBSD: files.news68k,v 1.34 2018/12/19 13:57:49 maxv Exp $
# $NetBSD: files.news68k,v 1.35 2019/02/18 01:12:24 thorpej Exp $
# NEWS68K-specific configuration info
@ -23,6 +23,7 @@ file arch/news68k/news68k/romcalls.S
file arch/news68k/news68k/trap.c
file arch/m68k/m68k/cacheops.c
file arch/m68k/m68k/db_memrw.c ddb | kgdb
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

3
sys/arch/news68k/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.44 2018/08/22 01:05:23 msaitoh Exp $ */
/* $NetBSD: cpu.h,v 1.45 2019/02/18 01:12:24 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -156,7 +156,6 @@ extern void *romcallvec;
struct frame;
/* locore.s functions */
int suline(void *, void *);
void loadustp(int);
void badtrap(void);
void intrhand_vectored(void);

313
sys/arch/news68k/news68k/trap.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: trap.c,v 1.69 2015/03/04 20:30:00 martin Exp $ */
/* $NetBSD: trap.c,v 1.70 2019/02/18 01:12:24 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.69 2015/03/04 20:30:00 martin Exp $");
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.70 2019/02/18 01:12:24 thorpej Exp $");
#include "opt_ddb.h"
#include "opt_execfmt.h"
@ -73,7 +73,6 @@ __KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.69 2015/03/04 20:30:00 martin Exp $");
#include <compat/sunos/sunos_syscall.h>
#endif
int writeback(struct frame *fp, int docachepush);
void trap(struct frame *fp, int type, u_int code, u_int v);
#ifdef DEBUG
@ -208,7 +207,7 @@ userret(struct lwp *l, struct frame *fp, u_quad_t oticks,
"pid %d(%s): writeback aborted in sigreturn, pc=%x\n",
p->p_pid, p->p_comm, fp->f_pc, faultaddr);
#endif
} else if ((sig = writeback(fp, fromtrap))) {
} else if ((sig = m68040_writeback(fp, fromtrap))) {
ksiginfo_t ksi;
beenhere = 1;
oticks = p->p_sticks;
@ -554,7 +553,7 @@ trap(struct frame *fp, int type, u_int code, u_int v)
}
#ifdef M68040
if (cputype == CPU_68040)
(void) writeback(fp, 1);
(void) m68040_writeback(fp, 1);
#endif
return;
}
@ -605,307 +604,3 @@ trap(struct frame *fp, int type, u_int code, u_int v)
out:
userret(l, fp, sticks, v, 1);
}
#ifdef M68040
#ifdef DEBUG
struct writebackstats {
int calls;
int cpushes;
int move16s;
int wb1s, wb2s, wb3s;
int wbsize[4];
} wbstats;
static const char *f7sz[] = { "longword", "byte", "word", "line" };
static const char *f7tt[] = { "normal", "MOVE16", "AFC", "ACK" };
static const char *f7tm[] = { "d-push", "u-data", "u-code", "M-data",
"M-code", "k-data", "k-code", "RES" };
static const char wberrstr[] =
"WARNING: pid %d(%s) writeback [%s] failed, pc=%x fa=%x wba=%x wbd=%x\n";
#endif
int
writeback(struct frame *fp, int docachepush)
{
struct fmt7 *f = &fp->f_fmt7;
struct lwp *l = curlwp;
struct proc *p = l->l_proc;
struct pcb *pcb = lwp_getpcb(l);
int err = 0;
u_int fa;
void *oonfault = pcb->pcb_onfault;
paddr_t pa;
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pid=%d, fa=%x,", p->p_pid, f->f_fa);
dumpssw(f->f_ssw);
}
wbstats.calls++;
#endif
/*
* Deal with special cases first.
*/
if ((f->f_ssw & SSW4_TMMASK) == SSW4_TMDCP) {
/*
* Dcache push fault.
* Line-align the address and write out the push data to
* the indicated physical address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pushing %s to PA %x, data %x",
f7sz[(f->f_ssw & SSW4_SZMASK) >> 5],
f->f_fa, f->f_pd0);
if ((f->f_ssw & SSW4_SZMASK) == SSW4_SZLN)
printf("/%x/%x/%x",
f->f_pd1, f->f_pd2, f->f_pd3);
printf("\n");
}
if (f->f_wb1s & SSW4_WBSV)
panic("writeback: cache push with WB1S valid");
wbstats.cpushes++;
#endif
/*
* XXX there are security problems if we attempt to do a
* cache push after a signal handler has been called.
*/
if (docachepush) {
pmap_enter(pmap_kernel(), (vaddr_t)vmmap,
trunc_page(f->f_fa), VM_PROT_WRITE,
VM_PROT_WRITE|PMAP_WIRED);
pmap_update(pmap_kernel());
fa = (u_int)&vmmap[m68k_page_offset(f->f_fa) & ~0xF];
memcpy((void *)fa, (void *)&f->f_pd0, 16);
(void) pmap_extract(pmap_kernel(), (vaddr_t)fa, &pa);
DCFL(pa);
pmap_remove(pmap_kernel(), (vaddr_t)vmmap,
(vaddr_t)&vmmap[PAGE_SIZE]);
pmap_update(pmap_kernel());
} else
printf("WARNING: pid %d(%s) uid %d: CPUSH not done\n",
p->p_pid, p->p_comm, kauth_cred_geteuid(l->l_cred));
} else if ((f->f_ssw & (SSW4_RW|SSW4_TTMASK)) == SSW4_TTM16) {
/*
* MOVE16 fault.
* Line-align the address and write out the push data to
* the indicated virtual address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
printf(" MOVE16 to VA %x(%x), data %x/%x/%x/%x\n",
f->f_fa, f->f_fa & ~0xF, f->f_pd0, f->f_pd1,
f->f_pd2, f->f_pd3);
if (f->f_wb1s & SSW4_WBSV)
panic("writeback: MOVE16 with WB1S valid");
wbstats.move16s++;
#endif
if (KDFAULT(f->f_wb1s))
memcpy((void *)(f->f_fa & ~0xF),
(void *)&f->f_pd0, 16);
else
err = suline((void *)(f->f_fa & ~0xF),
(void *)&f->f_pd0);
if (err) {
fa = f->f_fa & ~0xF;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"MOVE16", fp->f_pc, f->f_fa,
f->f_fa & ~0xF, f->f_pd0);
#endif
}
} else if (f->f_wb1s & SSW4_WBSV) {
/*
* Writeback #1.
* Position the "memory-aligned" data and write it out.
*/
u_int wb1d = f->f_wb1d;
int off;
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(1, f->f_wb1s, f->f_wb1a, f->f_wb1d);
wbstats.wb1s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
off = (f->f_wb1a & 3) * 8;
switch (f->f_wb1s & SSW4_SZMASK) {
case SSW4_SZLW:
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT(f->f_wb1s))
*(long *)f->f_wb1a = wb1d;
else
err = suword((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZB:
off = 24 - off;
if (off)
wb1d >>= off;
if (KDFAULT(f->f_wb1s))
*(char *)f->f_wb1a = wb1d;
else
err = subyte((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZW:
off = (off + 16) % 32;
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT(f->f_wb1s))
*(short *)f->f_wb1a = wb1d;
else
err = susword((void *)f->f_wb1a, wb1d);
break;
}
if (err) {
fa = f->f_wb1a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#1", fp->f_pc, f->f_fa,
f->f_wb1a, f->f_wb1d);
#endif
}
}
/*
* Deal with the "normal" writebacks.
*
* XXX writeback2 is known to reflect a LINE size writeback after
* a MOVE16 was already dealt with above. Ignore it.
*/
if (err == 0 && (f->f_wb2s & SSW4_WBSV) &&
(f->f_wb2s & SSW4_SZMASK) != SSW4_SZLN) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
wbstats.wb2s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb2s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT(f->f_wb2s))
*(long *)f->f_wb2a = f->f_wb2d;
else
err = suword((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZB:
if (KDFAULT(f->f_wb2s))
*(char *)f->f_wb2a = f->f_wb2d;
else
err = subyte((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZW:
if (KDFAULT(f->f_wb2s))
*(short *)f->f_wb2a = f->f_wb2d;
else
err = susword((void *)f->f_wb2a, f->f_wb2d);
break;
}
if (err) {
fa = f->f_wb2a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED) {
printf(wberrstr, p->p_pid, p->p_comm,
"#2", fp->f_pc, f->f_fa,
f->f_wb2a, f->f_wb2d);
dumpssw(f->f_ssw);
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
}
#endif
}
}
if (err == 0 && (f->f_wb3s & SSW4_WBSV)) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(3, f->f_wb3s, f->f_wb3a, f->f_wb3d);
wbstats.wb3s++;
wbstats.wbsize[(f->f_wb3s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb3s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT(f->f_wb3s))
*(long *)f->f_wb3a = f->f_wb3d;
else
err = suword((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZB:
if (KDFAULT(f->f_wb3s))
*(char *)f->f_wb3a = f->f_wb3d;
else
err = subyte((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZW:
if (KDFAULT(f->f_wb3s))
*(short *)f->f_wb3a = f->f_wb3d;
else
err = susword((void *)f->f_wb3a, f->f_wb3d);
break;
#ifdef DEBUG
case SSW4_SZLN:
panic("writeback: wb3s indicates LINE write");
#endif
}
if (err) {
fa = f->f_wb3a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#3", fp->f_pc, f->f_fa,
f->f_wb3a, f->f_wb3d);
#endif
}
}
pcb->pcb_onfault = oonfault;
if (err)
err = SIGSEGV;
return err;
}
#ifdef DEBUG
void
dumpssw(u_short ssw)
{
printf(" SSW: %x: ", ssw);
if (ssw & SSW4_CP)
printf("CP,");
if (ssw & SSW4_CU)
printf("CU,");
if (ssw & SSW4_CT)
printf("CT,");
if (ssw & SSW4_CM)
printf("CM,");
if (ssw & SSW4_MA)
printf("MA,");
if (ssw & SSW4_ATC)
printf("ATC,");
if (ssw & SSW4_LK)
printf("LK,");
if (ssw & SSW4_RW)
printf("RW,");
printf(" SZ=%s, TT=%s, TM=%s\n",
f7sz[(ssw & SSW4_SZMASK) >> 5],
f7tt[(ssw & SSW4_TTMASK) >> 3],
f7tm[ssw & SSW4_TMMASK]);
}
void
dumpwb(int num, u_short s, u_int a, u_int d)
{
struct lwp *l = curlwp;
struct proc *p = l->l_proc;
paddr_t pa;
printf(" writeback #%d: VA %x, data %x, SZ=%s, TT=%s, TM=%s\n",
num, a, d, f7sz[(s & SSW4_SZMASK) >> 5],
f7tt[(s & SSW4_TTMASK) >> 3], f7tm[s & SSW4_TMMASK]);
printf(" PA ");
if (pmap_extract(p->p_vmspace->vm_map.pmap, (vaddr_t)a, &pa) == false)
printf("<invalid address>");
else
printf("%lx, current value %lx", pa, fuword((void *)a));
printf("\n");
}
#endif
#endif

3
sys/arch/next68k/conf/files.next68k
View File

@ -1,4 +1,4 @@
# $NetBSD: files.next68k,v 1.41 2018/12/19 13:57:49 maxv Exp $
# $NetBSD: files.next68k,v 1.42 2019/02/18 01:12:24 thorpej Exp $
# next68k-specific configuration info
@ -35,6 +35,7 @@ file arch/next68k/dev/zs_kgdb.c kgdb
file arch/m68k/m68k/cacheops.c
file arch/m68k/m68k/db_memrw.c ddb | kgdb
file arch/m68k/m68k/kgdb_machdep.c kgdb
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

3
sys/arch/next68k/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.48 2016/12/17 14:36:30 flxd Exp $ */
/* $NetBSD: cpu.h,v 1.49 2019/02/18 01:12:24 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -116,7 +116,6 @@ extern int astpending; /* need to trap before returning to user mode */
extern void (*vectab[])(void);
/* locore.s functions */
int suline(void *, void *);
void loadustp(int);
void doboot(void) __attribute__((__noreturn__));

309
sys/arch/next68k/next68k/trap.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: trap.c,v 1.88 2015/03/04 20:30:00 martin Exp $ */
/* $NetBSD: trap.c,v 1.89 2019/02/18 01:12:24 thorpej Exp $ */
/*
* This file was taken from mvme68k/mvme68k/trap.c
@ -46,7 +46,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.88 2015/03/04 20:30:00 martin Exp $");
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.89 2019/02/18 01:12:24 thorpej Exp $");
#include "opt_ddb.h"
#include "opt_execfmt.h"
@ -90,7 +90,6 @@ extern struct emul emul_sunos;
#include <sys/kgdb.h>
#endif
int writeback(struct frame *, int);
void trap(struct frame *, int, u_int, u_int);
#ifdef DEBUG
@ -224,7 +223,7 @@ again:
"pid %d(%s): writeback aborted in sigreturn, pc=%x\n",
p->p_pid, p->p_comm, fp->f_pc, faultaddr);
#endif
} else if ((sig = writeback(fp, fromtrap))) {
} else if ((sig = m68040_writeback(fp, fromtrap))) {
ksiginfo_t ksi;
beenhere = 1;
oticks = p->p_sticks;
@ -599,7 +598,7 @@ trap(struct frame *fp, int type, unsigned code, unsigned v)
}
#ifdef M68040
if (cputype == CPU_68040)
(void) writeback(fp, 1);
(void) m68040_writeback(fp, 1);
#endif
return;
}
@ -650,303 +649,3 @@ trap(struct frame *fp, int type, unsigned code, unsigned v)
out:
userret(l, fp, sticks, v, 1);
}
#ifdef M68040
#ifdef DEBUG
struct writebackstats {
int calls;
int cpushes;
int move16s;
int wb1s, wb2s, wb3s;
int wbsize[4];
} wbstats;
const char *f7sz[] = { "longword", "byte", "word", "line" };
const char *f7tt[] = { "normal", "MOVE16", "AFC", "ACK" };
const char *f7tm[] = { "d-push", "u-data", "u-code", "M-data",
"M-code", "k-data", "k-code", "RES" };
const char wberrstr[] =
"WARNING: pid %d(%s) writeback [%s] failed, pc=%x fa=%x wba=%x wbd=%x\n";
#endif
int
writeback(struct frame *fp, int docachepush)
{
struct fmt7 *f = &fp->f_fmt7;
struct lwp *l = curlwp;
struct proc *p = l->l_proc;
struct pcb *pcb = lwp_getpcb(l);
int err = 0;
u_int fa;
void *oonfault = pcb->pcb_onfault;
paddr_t pa;
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pid=%d, fa=%x,", p->p_pid, f->f_fa);
dumpssw(f->f_ssw);
}
wbstats.calls++;
#endif
/*
* Deal with special cases first.
*/
if ((f->f_ssw & SSW4_TMMASK) == SSW4_TMDCP) {
/*
* Dcache push fault.
* Line-align the address and write out the push data to
* the indicated physical address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pushing %s to PA %x, data %x",
f7sz[(f->f_ssw & SSW4_SZMASK) >> 5],
f->f_fa, f->f_pd0);
if ((f->f_ssw & SSW4_SZMASK) == SSW4_SZLN)
printf("/%x/%x/%x",
f->f_pd1, f->f_pd2, f->f_pd3);
printf("\n");
}
if (f->f_wb1s & SSW4_WBSV)
panic("writeback: cache push with WB1S valid");
wbstats.cpushes++;
#endif
/*
* XXX there are security problems if we attempt to do a
* cache push after a signal handler has been called.
*/
if (docachepush) {
pmap_enter(pmap_kernel(), (vaddr_t)vmmap,
trunc_page(f->f_fa), VM_PROT_WRITE,
VM_PROT_WRITE|PMAP_WIRED);
pmap_update(pmap_kernel());
fa = (u_int)&vmmap[(f->f_fa & PGOFSET) & ~0xF];
memcpy((void *)fa, (void *)&f->f_pd0, 16);
(void) pmap_extract(pmap_kernel(), (vaddr_t)fa, &pa);
DCFL(pa);
pmap_remove(pmap_kernel(), (vaddr_t)vmmap,
(vaddr_t)&vmmap[PAGE_SIZE]);
pmap_update(pmap_kernel());
} else
printf("WARNING: pid %d(%s) uid %d: CPUSH not done\n",
p->p_pid, p->p_comm, kauth_cred_geteuid(l->l_cred));
} else if ((f->f_ssw & (SSW4_RW|SSW4_TTMASK)) == SSW4_TTM16) {
/*
* MOVE16 fault.
* Line-align the address and write out the push data to
* the indicated virtual address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
printf(" MOVE16 to VA %x(%x), data %x/%x/%x/%x\n",
f->f_fa, f->f_fa & ~0xF, f->f_pd0, f->f_pd1,
f->f_pd2, f->f_pd3);
if (f->f_wb1s & SSW4_WBSV)
panic("writeback: MOVE16 with WB1S valid");
wbstats.move16s++;
#endif
if (KDFAULT(f->f_wb1s))
memcpy((void *)(f->f_fa & ~0xF), (void *)&f->f_pd0, 16);
else
err = suline((void *)(f->f_fa & ~0xF), (void *)&f->f_pd0);
if (err) {
fa = f->f_fa & ~0xF;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"MOVE16", fp->f_pc, f->f_fa,
f->f_fa & ~0xF, f->f_pd0);
#endif
}
} else if (f->f_wb1s & SSW4_WBSV) {
/*
* Writeback #1.
* Position the "memory-aligned" data and write it out.
*/
u_int wb1d = f->f_wb1d;
int off;
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(1, f->f_wb1s, f->f_wb1a, f->f_wb1d);
wbstats.wb1s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
off = (f->f_wb1a & 3) * 8;
switch (f->f_wb1s & SSW4_SZMASK) {
case SSW4_SZLW:
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT(f->f_wb1s))
*(long *)f->f_wb1a = wb1d;
else
err = suword((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZB:
off = 24 - off;
if (off)
wb1d >>= off;
if (KDFAULT(f->f_wb1s))
*(char *)f->f_wb1a = wb1d;
else
err = subyte((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZW:
off = (off + 16) % 32;
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT(f->f_wb1s))
*(short *)f->f_wb1a = wb1d;
else
err = susword((void *)f->f_wb1a, wb1d);
break;
}
if (err) {
fa = f->f_wb1a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#1", fp->f_pc, f->f_fa,
f->f_wb1a, f->f_wb1d);
#endif
}
}
/*
* Deal with the "normal" writebacks.
*
* XXX writeback2 is known to reflect a LINE size writeback after
* a MOVE16 was already dealt with above. Ignore it.
*/
if (err == 0 && (f->f_wb2s & SSW4_WBSV) &&
(f->f_wb2s & SSW4_SZMASK) != SSW4_SZLN) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
wbstats.wb2s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb2s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT(f->f_wb2s))
*(long *)f->f_wb2a = f->f_wb2d;
else
err = suword((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZB:
if (KDFAULT(f->f_wb2s))
*(char *)f->f_wb2a = f->f_wb2d;
else
err = subyte((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZW:
if (KDFAULT(f->f_wb2s))
*(short *)f->f_wb2a = f->f_wb2d;
else
err = susword((void *)f->f_wb2a, f->f_wb2d);
break;
}
if (err) {
fa = f->f_wb2a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED) {
printf(wberrstr, p->p_pid, p->p_comm,
"#2", fp->f_pc, f->f_fa,
f->f_wb2a, f->f_wb2d);
dumpssw(f->f_ssw);
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
}
#endif
}
}
if (err == 0 && (f->f_wb3s & SSW4_WBSV)) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(3, f->f_wb3s, f->f_wb3a, f->f_wb3d);
wbstats.wb3s++;
wbstats.wbsize[(f->f_wb3s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb3s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT(f->f_wb3s))
*(long *)f->f_wb3a = f->f_wb3d;
else
err = suword((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZB:
if (KDFAULT(f->f_wb3s))
*(char *)f->f_wb3a = f->f_wb3d;
else
err = subyte((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZW:
if (KDFAULT(f->f_wb3s))
*(short *)f->f_wb3a = f->f_wb3d;
else
err = susword((void *)f->f_wb3a, f->f_wb3d);
break;
#ifdef DEBUG
case SSW4_SZLN:
panic("writeback: wb3s indicates LINE write");
#endif
}
if (err) {
fa = f->f_wb3a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#3", fp->f_pc, f->f_fa,
f->f_wb3a, f->f_wb3d);
#endif
}
}
pcb->pcb_onfault = oonfault;
if (err)
err = SIGSEGV;
return (err);
}
#ifdef DEBUG
void
dumpssw(u_short ssw)
{
printf(" SSW: %x: ", ssw);
if (ssw & SSW4_CP)
printf("CP,");
if (ssw & SSW4_CU)
printf("CU,");
if (ssw & SSW4_CT)
printf("CT,");
if (ssw & SSW4_CM)
printf("CM,");
if (ssw & SSW4_MA)
printf("MA,");
if (ssw & SSW4_ATC)
printf("ATC,");
if (ssw & SSW4_LK)
printf("LK,");
if (ssw & SSW4_RW)
printf("RW,");
printf(" SZ=%s, TT=%s, TM=%s\n",
f7sz[(ssw & SSW4_SZMASK) >> 5],
f7tt[(ssw & SSW4_TTMASK) >> 3],
f7tm[ssw & SSW4_TMMASK]);
}
void
dumpwb(int num, u_short s, u_int a, u_int d)
{
struct proc *p = curproc;
paddr_t pa;
printf(" writeback #%d: VA %x, data %x, SZ=%s, TT=%s, TM=%s\n",
num, a, d, f7sz[(s & SSW4_SZMASK) >> 5],
f7tt[(s & SSW4_TTMASK) >> 3], f7tm[s & SSW4_TMMASK]);
printf(" PA ");
if (pmap_extract(p->p_vmspace->vm_map.pmap, (vaddr_t)a, &pa) == false)
printf("<invalid address>");
else
printf("%lx, current value %lx", pa, fuword((void *)a));
printf("\n");
}
#endif
#endif

3
sys/arch/x68k/conf/files.x68k
View File

@ -1,4 +1,4 @@
# $NetBSD: files.x68k,v 1.81 2018/12/19 13:57:51 maxv Exp $
# $NetBSD: files.x68k,v 1.82 2019/02/18 01:12:24 thorpej Exp $
#
# new style config file for x68k architecture
#
@ -34,6 +34,7 @@ file arch/x68k/x68k/bus.c
file arch/m68k/m68k/cacheops.c
file arch/m68k/m68k/db_memrw.c ddb
file arch/m68k/m68k/fpu.c compile-with "${M68K_KERN_FPU}"
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/pmap_motorola.c
file arch/m68k/m68k/procfs_machdep.c procfs
file arch/m68k/m68k/sys_machdep.c

3
sys/arch/x68k/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.60 2018/08/22 01:05:23 msaitoh Exp $ */
/* $NetBSD: cpu.h,v 1.61 2019/02/18 01:12:24 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -123,7 +123,6 @@ extern uint8_t *intiolimit;
void dumpsys(void);
/* locore.s functions */
int suline(void *, void *);
void loadustp(int);
/* machdep.c functions */

310
sys/arch/x68k/x68k/trap.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: trap.c,v 1.106 2015/03/04 20:30:00 martin Exp $ */
/* $NetBSD: trap.c,v 1.107 2019/02/18 01:12:24 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.106 2015/03/04 20:30:00 martin Exp $");
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.107 2019/02/18 01:12:24 thorpej Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@ -81,7 +81,6 @@ __KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.106 2015/03/04 20:30:00 martin Exp $");
#include <compat/sunos/sunos_syscall.h>
#endif
int writeback(struct frame *, int);
void trap(struct frame *, int, u_int, u_int);
#if defined(M68040) || defined(M68060)
@ -217,7 +216,7 @@ again:
"pid %d(%s): writeback aborted in sigreturn, pc=%x\n",
p->p_pid, p->p_comm, fp->f_pc, faultaddr);
#endif
} else if ((sig = writeback(fp, fromtrap))) {
} else if ((sig = m68040_writeback(fp, fromtrap))) {
ksiginfo_t ksi;
beenhere = 1;
oticks = p->p_sticks;
@ -608,7 +607,7 @@ trap(struct frame *fp, int type, unsigned code, unsigned v)
}
#ifdef M68040
if (cputype == CPU_68040)
(void) writeback(fp, 1);
(void) m68040_writeback(fp, 1);
#endif
return;
}
@ -660,304 +659,3 @@ trap(struct frame *fp, int type, unsigned code, unsigned v)
out:
userret(l, fp, sticks, v, 1);
}
#ifdef M68040
#ifdef DEBUG
struct writebackstats {
int calls;
int cpushes;
int move16s;
int wb1s, wb2s, wb3s;
int wbsize[4];
} wbstats;
const char *f7sz[] = { "longword", "byte", "word", "line" };
const char *f7tt[] = { "normal", "MOVE16", "AFC", "ACK" };
const char *f7tm[] = { "d-push", "u-data", "u-code", "M-data",
"M-code", "k-data", "k-code", "RES" };
const char wberrstr[] =
"WARNING: pid %d(%s) writeback [%s] failed, pc=%x fa=%x wba=%x wbd=%x\n";
#endif
int
writeback(struct frame *fp, int docachepush)
{
struct fmt7 *f = &fp->f_fmt7;
struct lwp *l = curlwp;
struct proc *p = l->l_proc;
struct pcb *pcb = lwp_getpcb(l);
int err = 0;
u_int fa;
void *oonfault = pcb->pcb_onfault;
paddr_t pa;
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pid=%d, fa=%x,", p->p_pid, f->f_fa);
dumpssw(f->f_ssw);
}
wbstats.calls++;
#endif
/*
* Deal with special cases first.
*/
if ((f->f_ssw & SSW4_TMMASK) == SSW4_TMDCP) {
/*
* Dcache push fault.
* Line-align the address and write out the push data to
* the indicated physical address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) {
printf(" pushing %s to PA %x, data %x",
f7sz[(f->f_ssw & SSW4_SZMASK) >> 5],
f->f_fa, f->f_pd0);
if ((f->f_ssw & SSW4_SZMASK) == SSW4_SZLN)
printf("/%x/%x/%x",
f->f_pd1, f->f_pd2, f->f_pd3);
printf("\n");
}
if (f->f_wb1s & SSW4_WBSV)
panic("writeback: cache push with WB1S valid");
wbstats.cpushes++;
#endif
/*
* XXX there are security problems if we attempt to do a
* cache push after a signal handler has been called.
*/
if (docachepush) {
pmap_enter(pmap_kernel(), (vaddr_t)vmmap,
trunc_page(f->f_fa), VM_PROT_WRITE,
VM_PROT_WRITE|PMAP_WIRED);
pmap_update(pmap_kernel());
fa = (u_int)&vmmap[m68k_page_offset(f->f_fa) & ~0xF];
memcpy((void *)fa, (void *)&f->f_pd0, 16);
(void) pmap_extract(pmap_kernel(), (paddr_t)fa, &pa);
DCFL(pa);
pmap_remove(pmap_kernel(), (vaddr_t)vmmap,
(vaddr_t)&vmmap[PAGE_SIZE]);
pmap_update(pmap_kernel());
} else
printf("WARNING: pid %d(%s) uid %d: CPUSH not done\n",
p->p_pid, p->p_comm, kauth_cred_geteuid(l->l_cred));
} else if ((f->f_ssw & (SSW4_RW|SSW4_TTMASK)) == SSW4_TTM16) {
/*
* MOVE16 fault.
* Line-align the address and write out the push data to
* the indicated virtual address.
*/
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
printf(" MOVE16 to VA %x(%x), data %x/%x/%x/%x\n",
f->f_fa, f->f_fa & ~0xF, f->f_pd0, f->f_pd1,
f->f_pd2, f->f_pd3);
if (f->f_wb1s & SSW4_WBSV)
panic("writeback: MOVE16 with WB1S valid");
wbstats.move16s++;
#endif
if (KDFAULT(f->f_wb1s))
memcpy((void *)(f->f_fa & ~0xF),
(void *)&f->f_pd0, 16);
else
err = suline((void *)(f->f_fa & ~0xF), (void *)&f->f_pd0);
if (err) {
fa = f->f_fa & ~0xF;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"MOVE16", fp->f_pc, f->f_fa,
f->f_fa & ~0xF, f->f_pd0);
#endif
}
} else if (f->f_wb1s & SSW4_WBSV) {
/*
* Writeback #1.
* Position the "memory-aligned" data and write it out.
*/
u_int wb1d = f->f_wb1d;
int off;
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(1, f->f_wb1s, f->f_wb1a, f->f_wb1d);
wbstats.wb1s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
off = (f->f_wb1a & 3) * 8;
switch (f->f_wb1s & SSW4_SZMASK) {
case SSW4_SZLW:
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT(f->f_wb1s))
*(long *)f->f_wb1a = wb1d;
else
err = suword((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZB:
off = 24 - off;
if (off)
wb1d >>= off;
if (KDFAULT(f->f_wb1s))
*(char *)f->f_wb1a = wb1d;
else
err = subyte((void *)f->f_wb1a, wb1d);
break;
case SSW4_SZW:
off = (off + 16) % 32;
if (off)
wb1d = (wb1d >> (32 - off)) | (wb1d << off);
if (KDFAULT(f->f_wb1s))
*(short *)f->f_wb1a = wb1d;
else
err = susword((void *)f->f_wb1a, wb1d);
break;
}
if (err) {
fa = f->f_wb1a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#1", fp->f_pc, f->f_fa,
f->f_wb1a, f->f_wb1d);
#endif
}
}
/*
* Deal with the "normal" writebacks.
*
* XXX writeback2 is known to reflect a LINE size writeback after
* a MOVE16 was already dealt with above. Ignore it.
*/
if (err == 0 && (f->f_wb2s & SSW4_WBSV) &&
(f->f_wb2s & SSW4_SZMASK) != SSW4_SZLN) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
wbstats.wb2s++;
wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb2s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT(f->f_wb2s))
*(long *)f->f_wb2a = f->f_wb2d;
else
err = suword((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZB:
if (KDFAULT(f->f_wb2s))
*(char *)f->f_wb2a = f->f_wb2d;
else
err = subyte((void *)f->f_wb2a, f->f_wb2d);
break;
case SSW4_SZW:
if (KDFAULT(f->f_wb2s))
*(short *)f->f_wb2a = f->f_wb2d;
else
err = susword((void *)f->f_wb2a, f->f_wb2d);
break;
}
if (err) {
fa = f->f_wb2a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED) {
printf(wberrstr, p->p_pid, p->p_comm,
"#2", fp->f_pc, f->f_fa,
f->f_wb2a, f->f_wb2d);
dumpssw(f->f_ssw);
dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d);
}
#endif
}
}
if (err == 0 && (f->f_wb3s & SSW4_WBSV)) {
#ifdef DEBUG
if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid))
dumpwb(3, f->f_wb3s, f->f_wb3a, f->f_wb3d);
wbstats.wb3s++;
wbstats.wbsize[(f->f_wb3s&SSW4_SZMASK)>>5]++;
#endif
switch (f->f_wb3s & SSW4_SZMASK) {
case SSW4_SZLW:
if (KDFAULT(f->f_wb3s))
*(long *)f->f_wb3a = f->f_wb3d;
else
err = suword((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZB:
if (KDFAULT(f->f_wb3s))
*(char *)f->f_wb3a = f->f_wb3d;
else
err = subyte((void *)f->f_wb3a, f->f_wb3d);
break;
case SSW4_SZW:
if (KDFAULT(f->f_wb3s))
*(short *)f->f_wb3a = f->f_wb3d;
else
err = susword((void *)f->f_wb3a, f->f_wb3d);
break;
#ifdef DEBUG
case SSW4_SZLN:
panic("writeback: wb3s indicates LINE write");
#endif
}
if (err) {
fa = f->f_wb3a;
#ifdef DEBUG
if (mmudebug & MDB_WBFAILED)
printf(wberrstr, p->p_pid, p->p_comm,
"#3", fp->f_pc, f->f_fa,
f->f_wb3a, f->f_wb3d);
#endif
}
}
pcb->pcb_onfault = oonfault;
if (err)
err = SIGSEGV;
return (err);
}
#ifdef DEBUG
static void
dumpssw(u_short ssw)
{
printf(" SSW: %x: ", ssw);
if (ssw & SSW4_CP)
printf("CP,");
if (ssw & SSW4_CU)
printf("CU,");
if (ssw & SSW4_CT)
printf("CT,");
if (ssw & SSW4_CM)
printf("CM,");
if (ssw & SSW4_MA)
printf("MA,");
if (ssw & SSW4_ATC)
printf("ATC,");
if (ssw & SSW4_LK)
printf("LK,");
if (ssw & SSW4_RW)
printf("RW,");
printf(" SZ=%s, TT=%s, TM=%s\n",
f7sz[(ssw & SSW4_SZMASK) >> 5],
f7tt[(ssw & SSW4_TTMASK) >> 3],
f7tm[ssw & SSW4_TMMASK]);
}
static void
dumpwb(int num, u_short s, u_int a, u_int d)
{
struct proc *p = curproc;
paddr_t pa;
printf(" writeback #%d: VA %x, data %x, SZ=%s, TT=%s, TM=%s\n",
num, a, d, f7sz[(s & SSW4_SZMASK) >> 5],
f7tt[(s & SSW4_TTMASK) >> 3], f7tm[s & SSW4_TMMASK]);
printf(" PA ");
if (pmap_extract(p->p_vmspace->vm_map.pmap, (vaddr_t)a, &pa) == false)
printf("<invalid address>");
else
printf("%lx, current value %lx", pa, fuword((void *)a));
printf("\n");
}
#endif
#endif