Add atomic_cas_64 support for ARM EABI on V5TE and V5TEJ cpus.
(strd is atomic).
This commit is contained in:
matt
parent
99ca27526b
commit
d9d3fe3d18
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@ -1,22 +1,13 @@
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# $NetBSD: Makefile.inc,v 1.18 2014/02/22 17:16:12 martin Exp $
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# $NetBSD: Makefile.inc,v 1.19 2014/02/27 09:39:00 matt Exp $
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ARMV6= ${CPUFLAGS:M-march=armv6*} ${CPUFLAGS:M-mcpu=arm11*}
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ARMV6+= ${CFLAGS:M-march=armv6*:} ${CFLAGS:M-mcpu=arm11*}
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ARMV6+= ${CPPFLAGS:M-march=armv6*:} ${CPPFLAGS:M-mcpu=arm11*}
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ARMV7= ${CPUFLAGS:M-march=armv7*} ${CPUFLAGS:M-mcpu=cortex*}
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ARMV7+= ${CFLAGS:M-march=armv7*:} ${CFLAGS:M-mcpu=cortex*}
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ARMV7+= ${CPPFLAGS:M-march=armv7*:} ${CPPFLAGS:M-mcpu=cortex*}
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.if empty(CFLAGS:M-march=*) && empty(CFLAGS:M-mcpu=*) \
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&& empty(CPPFLAGS:M-march=*) && empty(CPPFLAGS:M-mcpu=*) \
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&& empty(CPUFLAGS:M-march=*) && empty(CPUFLAGS:M-mcpu=*)
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ARMV6+= ${MACHINE_ARCH:Mearmv6*}
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ARMV7+= ${MACHINE_ARCH:Mearmv7*}
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.ifnmake obj
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.include "${NETBSDSRCDIR}/common/lib/libc/arch/arm/features.mk"
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.endif
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.if defined(LIB) && (${LIB} == "kern" || ${LIB} == "c" || ${LIB} == "pthread" \
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|| ${LIB} == "rump")
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.if empty(ARMV6) && empty(ARMV7)
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.if "${FEAT_LDREX}" == "no"
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SRCS.atomic+= atomic_add_32_cas.c atomic_add_32_nv_cas.c \
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atomic_and_32_cas.c atomic_and_32_nv_cas.c \
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atomic_dec_32_cas.c atomic_dec_32_nv_cas.c \
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@ -58,7 +49,7 @@ SRCS.atomic+= sync_bool_compare_and_swap_${sz}.S
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.if defined(LIB) && (${LIB} == "c" || ${LIB} == "pthread" || ${LIB} == "rump")
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SRCS.atomic+= atomic_simplelock.c
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.if empty(ARMV7)
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.if "${FEAT_THUMB2}" == "no"
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CPUFLAGS.atomic_simplelock.c+= -marm
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.endif
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@ -66,19 +57,22 @@ CPUFLAGS.atomic_simplelock.c+= -marm
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.if defined(LIB) && (${LIB} == "c" || ${LIB} == "pthread")
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.if empty(ARMV6) && empty(ARMV7)
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.if "${FEAT_LDREX}" == "no"
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SRCS.atomic+= atomic_init_testset.c
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SRCS.atomic+= atomic_cas_up.S
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CPPFLAGS+= -D__HAVE_ASM_ATOMIC_CAS_UP
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CPPFLAGS+= -D__HAVE_ASM_ATOMIC_CAS_16_UP
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CPPFLAGS+= -D__HAVE_ASM_ATOMIC_CAS_8_UP
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.if "${FEAT_EABI}" == "yes" && "${FEAT_LDRD}" == "yes"
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CPPFLAGS+= -D__HAVE_ATOMIC_CAS_64_UP -D__HAVE_ASM_ATOMIC_CAS_64_UP
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.endif
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.else
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SRCS.atomic+= atomic_init_cas.c
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.endif
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.endif #FEAT_LDREX
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.endif
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.endif #LIB
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.if !empty(ARMV6)
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.if "${FEAT_THUMB2}" == "no"
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.for f in ${SRCS.atomic:M*.S}
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CPUFLAGS.$f+= -marm
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.endfor
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@ -1,4 +1,4 @@
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/* $NetBSD: atomic_cas_up.S,v 1.5 2014/01/27 18:05:24 matt Exp $ */
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/* $NetBSD: atomic_cas_up.S,v 1.6 2014/02/27 09:39:00 matt Exp $ */
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/*-
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* Copyright (c) 2008 The NetBSD Foundation, Inc.
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@ -49,6 +49,24 @@ RAS_END_ASM_HIDDEN(_atomic_cas)
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1: RET
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END(_atomic_cas_up)
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#if defined(__HAVE_ASM_ATOMIC_CAS_64_UP)
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ARM_ENTRY(_atomic_cas_64_up)
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push {r4-r5}
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mov ip, r0
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ldrd r4, r5, [sp]
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.align 0
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RAS_START_ASM_HIDDEN(_atomic_cas_64)
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ldrd r0, r1, [ip]
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cmp r0, r2
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cmpeq r1, r3
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strdeq r4, r5, [ip]
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.align 0
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RAS_END_ASM_HIDDEN(_atomic_cas_64)
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1: pop {r4-r5}
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bx lr
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END(_atomic_cas_64_up)
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#endif /* __HAVE_ASM_ATOMIC_64_UP */
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ENTRY(_atomic_cas_16_up)
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mov r3, r0
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.align 0
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@ -1,4 +1,4 @@
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/* $NetBSD: atomic_init_testset.c,v 1.14 2014/02/24 17:18:27 martin Exp $ */
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/* $NetBSD: atomic_init_testset.c,v 1.15 2014/02/27 09:39:00 matt Exp $ */
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/*-
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* Copyright (c) 2008 The NetBSD Foundation, Inc.
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@ -36,7 +36,7 @@
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*/
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#include <sys/cdefs.h>
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__RCSID("$NetBSD: atomic_init_testset.c,v 1.14 2014/02/24 17:18:27 martin Exp $");
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__RCSID("$NetBSD: atomic_init_testset.c,v 1.15 2014/02/27 09:39:00 matt Exp $");
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#include "atomic_op_namespace.h"
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@ -69,6 +69,17 @@ static uint32_t (*_atomic_cas_fn)(volatile uint32_t *, uint32_t, uint32_t) =
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_atomic_cas_up;
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RAS_DECL(_atomic_cas);
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#ifdef __HAVE_ATOMIC_CAS_64_UP
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#ifdef __HAVE_ASM_ATOMIC_CAS_64_UP
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extern uint64_t _atomic_cas_64_up(volatile uint64_t *, uint64_t, uint64_t);
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#else
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static uint64_t _atomic_cas_64_up(volatile uint64_t *, uint64_t, uint64_t);
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#endif
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static uint64_t (*_atomic_cas_64_fn)(volatile uint64_t *, uint64_t, uint64_t) =
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_atomic_cas_64_up;
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RAS_DECL(_atomic_cas_64);
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#endif
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#ifdef __HAVE_ASM_ATOMIC_CAS_16_UP
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extern uint16_t _atomic_cas_16_up(volatile uint16_t *, uint16_t, uint16_t);
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#else
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@ -107,6 +118,24 @@ _atomic_cas_up(volatile uint32_t *ptr, uint32_t old, uint32_t new)
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}
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#endif
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#if defined(__HAVE_ATOMIC_CAS_64_UP) && !defined(__HAVE_ASM_ATOMIC_CAS_64_UP)
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static uint64_t
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_atomic_cas_64_up(volatile uint64_t *ptr, uint64_t old, uint64_t new)
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{
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uint64_t ret;
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RAS_START(_atomic_cas_64);
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ret = *ptr;
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if (__predict_false(ret != old)) {
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return ret;
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}
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*ptr = new;
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RAS_END(_atomic_cas_64);
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return ret;
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}
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#endif
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#ifndef __HAVE_ASM_ATOMIC_CAS_16_UP
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static uint16_t
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_atomic_cas_16_up(volatile uint16_t *ptr, uint16_t old, uint16_t new)
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@ -160,6 +189,25 @@ _atomic_cas_mp(volatile uint32_t *ptr, uint32_t old, uint32_t new)
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return ret;
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}
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#ifdef __HAVE_ATOMIC_CAS_64_UP
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static uint64_t
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_atomic_cas_64_mp(volatile uint64_t *ptr, uint64_t old, uint64_t new)
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{
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__cpu_simple_lock_t *lock;
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uint64_t ret;
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lock = &atomic_locks[HASH(ptr)];
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__cpu_simple_lock(lock);
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ret = *ptr;
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if (__predict_true(ret == old)) {
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*ptr = new;
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}
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__cpu_simple_unlock(lock);
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return ret;
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}
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#endif
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static uint16_t
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_atomic_cas_16_mp(volatile uint16_t *ptr, uint16_t old, uint16_t new)
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{
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@ -201,7 +249,16 @@ _atomic_cas_32(volatile uint32_t *ptr, uint32_t old, uint32_t new)
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return (*_atomic_cas_fn)(ptr, old, new);
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}
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uint16_t _atomic_cas_16(volatile uint16_t *, uint16_t, uint16_t);
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#ifdef __HAVE_ATOMIC_CAS_64_UP
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uint64_t _atomic_cas_64(volatile uint64_t *, uint64_t, uint64_t);
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uint64_t
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_atomic_cas_64(volatile uint64_t *ptr, uint64_t old, uint64_t new)
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{
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return (*_atomic_cas_64_fn)(ptr, old, new);
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}
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#endif
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uint16_t
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_atomic_cas_16(volatile uint16_t *ptr, uint16_t old, uint16_t new)
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@ -226,6 +283,9 @@ __libc_atomic_init(void)
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size_t len;
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_atomic_cas_fn = _atomic_cas_mp;
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#ifdef __HAVE_ATOMIC_CAS_64_UP
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_atomic_cas_64_fn = _atomic_cas_64_mp;
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#endif
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_atomic_cas_16_fn = _atomic_cas_16_mp;
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_atomic_cas_8_fn = _atomic_cas_8_mp;
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@ -242,6 +302,14 @@ __libc_atomic_init(void)
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return;
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}
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#ifdef __HAVE_ATOMIC_CAS_64_UP
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if (rasctl(RAS_ADDR(_atomic_cas_64), RAS_SIZE(_atomic_cas_64),
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RAS_INSTALL) == 0) {
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_atomic_cas_64_fn = _atomic_cas_64_up;
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return;
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}
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#endif
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if (rasctl(RAS_ADDR(_atomic_cas_16), RAS_SIZE(_atomic_cas_16),
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RAS_INSTALL) == 0) {
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_atomic_cas_16_fn = _atomic_cas_16_up;
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@ -281,6 +349,14 @@ __strong_alias(_atomic_cas_ulong_ni,_atomic_cas_32)
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atomic_op_alias(atomic_cas_ptr_ni,_atomic_cas_32)
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__strong_alias(_atomic_cas_ptr_ni,_atomic_cas_32)
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//atomic_op_alias(atomic_cas_16,_atomic_cas_16)
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//atomic_op_alias(atomic_cas_16_ni,_atomic_cas_16)
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//atomic_op_alias(atomic_cas_8,_atomic_cas_8)
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//atomic_op_alias(atomic_cas_8_ni,_atomic_cas_8)
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#ifdef __HAVE_ATOMIC_CAS_64_UP
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//atomic_op_alias(atomic_cas_64_ni,_atomic_cas_64)
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crt_alias(__sync_val_compare_and_swap_8,_atomic_cas_64)
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#endif
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crt_alias(__sync_val_compare_and_swap_4,_atomic_cas_32)
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crt_alias(__sync_val_compare_and_swap_2,_atomic_cas_16)
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crt_alias(__sync_val_compare_and_swap_1,_atomic_cas_8)
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