try to do a better job of figuring out the EEPROM size; the old code
didn't work on (some?) 557-based cards
This commit is contained in:
joda
parent
a15ba40c30
commit
d7496546b5
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@ -1,4 +1,4 @@
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/* $NetBSD: i82557.c,v 1.12 1999/11/12 18:14:18 thorpej Exp $ */
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/* $NetBSD: i82557.c,v 1.13 1999/11/19 15:19:14 joda Exp $ */
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/*-
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* Copyright (c) 1997, 1998, 1999 The NetBSD Foundation, Inc.
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@ -181,6 +181,7 @@ int fxp_add_rfabuf __P((struct fxp_softc *, bus_dmamap_t, int));
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int fxp_mdi_read __P((struct device *, int, int));
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void fxp_statchg __P((struct device *));
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void fxp_mdi_write __P((struct device *, int, int, int));
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void fxp_autosize_eeprom __P((struct fxp_softc*));
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void fxp_read_eeprom __P((struct fxp_softc *, u_int16_t *, int, int));
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void fxp_get_info __P((struct fxp_softc *, u_int8_t *));
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void fxp_tick __P((void *));
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@ -484,30 +485,14 @@ fxp_get_info(sc, enaddr)
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CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
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DELAY(10);
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/*
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* Figure out EEPROM size.
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*
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* Cards can have either 64-word or 256-word EEPROMs, with
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* addresses fed in using a bit-at-a-time protocol, MSB first.
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*
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* XXX this is probably not the best way to do this; the linux
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* driver does a checksum of the eeprom, but there is
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* (AFAIK) no on-line documentation on what this checksum
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* should look like (you could just steal the code from
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* linux, but that's cheating); for now we just use the fact
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* that the upper two bits of word 10 should be 01
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*/
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for(sc->sc_eeprom_size = 6;
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sc->sc_eeprom_size <= 8;
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sc->sc_eeprom_size += 2) {
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fxp_read_eeprom(sc, &data, 10, 1);
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if((data & 0xc000) == 0x4000)
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break;
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sc->sc_eeprom_size = 0;
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fxp_autosize_eeprom(sc);
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if(sc->sc_eeprom_size == 0) {
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printf("%s: failed to detect EEPROM size", sc->sc_dev.dv_xname);
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sc->sc_eeprom_size = 6; /* XXX panic here? */
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}
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if(sc->sc_eeprom_size > 8)
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panic("%s: failed to get EEPROM size", sc->sc_dev.dv_xname);
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#ifdef DEBUG
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printf("%s: assuming %d word EEPROM\n",
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printf("%s: detected %d word EEPROM\n",
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sc->sc_dev.dv_xname,
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1 << sc->sc_eeprom_size);
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#endif
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@ -527,6 +512,83 @@ fxp_get_info(sc, enaddr)
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bcopy(myea, enaddr, ETHER_ADDR_LEN);
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}
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/*
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* Figure out EEPROM size.
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*
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* 559's can have either 64-word or 256-word EEPROMs, the 558
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* datasheet only talks about 64-word EEPROMs, and the 557 datasheet
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* talks about the existance of 16 to 256 word EEPROMs.
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*
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* The only known sizes are 64 and 256, where the 256 version is used
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* by CardBus cards to store CIS information.
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*
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* The address is shifted in msb-to-lsb, and after the last
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* address-bit the EEPROM is supposed to output a `dummy zero' bit,
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* after which follows the actual data. We try to detect this zero, by
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* probing the data-out bit in the EEPROM control register just after
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* having shifted in a bit. If the bit is zero, we assume we've
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* shifted enough address bits. The data-out should be tri-state,
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* before this, which should translate to a logical one.
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*
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* Other ways to do this would be to try to read a register with known
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* contents with a varying number of address bits, but no such
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* register seem to be available. The high bits of register 10 are 01
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* on the 558 and 559, but apparently not on the 557.
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*
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* The Linux driver computes a checksum on the EEPROM data, but the
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* value of this checksum is not very well documented.
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*/
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void
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fxp_autosize_eeprom(sc)
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struct fxp_softc *sc;
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{
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u_int16_t reg;
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int x;
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CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
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/*
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* Shift in read opcode.
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*/
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for (x = 3; x > 0; x--) {
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if (FXP_EEPROM_OPC_READ & (1 << (x - 1))) {
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reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
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} else {
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reg = FXP_EEPROM_EECS;
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}
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CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
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CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
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reg | FXP_EEPROM_EESK);
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DELAY(1);
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CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
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DELAY(1);
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}
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/*
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* Shift in address, wait for the dummy zero following a correct
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* address shift.
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*/
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for (x = 1; x <= 8; x++) {
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CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
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CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
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FXP_EEPROM_EECS | FXP_EEPROM_EESK);
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DELAY(1);
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if((CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) &
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FXP_EEPROM_EEDO) == 0)
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break;
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CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
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DELAY(1);
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}
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CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
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DELAY(1);
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if(x != 6 && x != 8) {
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#ifdef DEBUG
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printf("%s: strange EEPROM size (%d)\n",
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sc->sc_dev.dv_xname, 1 << x);
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#endif
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} else
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sc->sc_eeprom_size = x;
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}
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/*
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* Read from the serial EEPROM. Basically, you manually shift in
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* the read opcode (one bit at a time) and then shift in the address,
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@ -567,13 +629,13 @@ fxp_read_eeprom(sc, data, offset, words)
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*/
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for (x = sc->sc_eeprom_size; x > 0; x--) {
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if ((i + offset) & (1 << (x - 1))) {
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reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
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reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
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} else {
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reg = FXP_EEPROM_EECS;
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reg = FXP_EEPROM_EECS;
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}
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CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
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CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
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reg | FXP_EEPROM_EESK);
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reg | FXP_EEPROM_EESK);
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DELAY(1);
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CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
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DELAY(1);
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