From d6e37f352eaefe43d1d25113aa5dac3b7a1d58ff Mon Sep 17 00:00:00 2001
From: briggs <briggs@NetBSD.org>
Date: Thu, 3 Feb 2005 14:47:09 +0000
Subject: [PATCH] Keep track of the CPU's current speed (in kHz) in the cpu
 info structure, if we can get it.  May want to expand this in the future to
 include min and max speeds for systems where we can adjust the speed.

---
 sys/arch/powerpc/include/cpu.h  |  3 ++-
 sys/arch/powerpc/oea/cpu_subr.c | 16 ++++++++++------
 2 files changed, 12 insertions(+), 7 deletions(-)

diff --git a/sys/arch/powerpc/include/cpu.h b/sys/arch/powerpc/include/cpu.h
index 8fd8b91d2d70..c69d11b5228c 100644
--- a/sys/arch/powerpc/include/cpu.h
+++ b/sys/arch/powerpc/include/cpu.h
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpu.h,v 1.43 2005/01/19 22:22:56 matt Exp $	*/
+/*	$NetBSD: cpu.h,v 1.44 2005/02/03 14:47:09 briggs Exp $	*/
 
 /*
  * Copyright (C) 1999 Wolfgang Solfrank.
@@ -94,6 +94,7 @@ struct cpu_info {
 	struct cache_info ci_ci;		
 	void *ci_sysmon_cookie;
 	void (*ci_idlespin)(void);
+	uint32_t ci_khz;
 	struct evcnt ci_ev_clock;	/* clock intrs */
 	struct evcnt ci_ev_softclock;	/* softclock intrs */
 	struct evcnt ci_ev_softnet;	/* softnet intrs */
diff --git a/sys/arch/powerpc/oea/cpu_subr.c b/sys/arch/powerpc/oea/cpu_subr.c
index dbde6d2b7fda..68976e63cb59 100644
--- a/sys/arch/powerpc/oea/cpu_subr.c
+++ b/sys/arch/powerpc/oea/cpu_subr.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpu_subr.c,v 1.22 2005/01/21 00:58:34 matt Exp $	*/
+/*	$NetBSD: cpu_subr.c,v 1.23 2005/02/03 14:47:09 briggs Exp $	*/
 
 /*-
  * Copyright (c) 2001 Matt Thomas.
@@ -34,7 +34,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.22 2005/01/21 00:58:34 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.23 2005/02/03 14:47:09 briggs Exp $");
 
 #include "opt_ppcparam.h"
 #include "opt_multiprocessor.h"
@@ -58,7 +58,7 @@ static void cpu_enable_l2cr(register_t);
 static void cpu_enable_l3cr(register_t);
 static void cpu_config_l2cr(int);
 static void cpu_config_l3cr(int);
-static void cpu_print_speed(void);
+static void cpu_probe_speed(struct cpu_info *);
 static void cpu_idlespin(void);
 #if NSYSMON_ENVSYS > 0
 static void cpu_tau_setup(struct cpu_info *);
@@ -479,6 +479,8 @@ cpu_setup(self, ci)
 	bitmask_snprintf(hid0, bitmask, hidbuf, sizeof hidbuf);
 	aprint_normal("%s: HID0 %s\n", self->dv_xname, hidbuf);
 
+	ci->ci_khz = 0;
+
 	/*
 	 * Display speed and cache configuration.
 	 */
@@ -496,7 +498,9 @@ cpu_setup(self, ci)
 	case MPC7455:
 	case MPC7457:
 		aprint_normal("%s: ", self->dv_xname);
-		cpu_print_speed();
+		cpu_probe_speed(ci);
+		aprint_normal("%u.%02u MHz",
+			      ci->ci_khz / 1000, (ci->ci_khz / 10) % 100);
 
 		if (vers == IBM750FX || vers == MPC750 ||
 		    vers == MPC7400  || vers == MPC7410 || MPC745X_P(vers)) {
@@ -822,7 +826,7 @@ cpu_config_l3cr(int vers)
 }
 
 void
-cpu_print_speed(void)
+cpu_probe_speed(struct cpu_info *ci)
 {
 	uint64_t cps;
 
@@ -834,7 +838,7 @@ cpu_print_speed(void)
 
 	mtspr(SPR_MMCR0, MMCR0_FC);
 
-	aprint_normal("%lld.%02lld MHz", cps / 1000000, (cps / 10000) % 100);
+	ci->ci_khz = cps / 1000;
 }
 
 #if NSYSMON_ENVSYS > 0