Add driver for Broadcom 802.11a/b/g/n/ac SDIO wireless devices, based on
the OpenBSD bwfm(4) driver. I could not test this on any hardware yet, as it does not attach as-is on my Raspberry PI 3.
This commit is contained in:
khorben
parent
cd1c6201df
commit
d6735baf16
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@ -1,4 +1,4 @@
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# $NetBSD: files.sdmmc,v 1.4 2014/10/02 21:49:22 jmcneill Exp $
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# $NetBSD: files.sdmmc,v 1.5 2017/11/07 16:30:32 khorben Exp $
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# $OpenBSD: files.sdmmc,v 1.2 2006/06/01 21:53:41 uwe Exp $
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#
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# Config file and device description for machine-independent SD/MMC code.
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@ -21,3 +21,7 @@ file dev/sdmmc/ld_sdmmc.c ld_sdmmc
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device sbt: btbus, bluetooth
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attach sbt at sdmmc
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file dev/sdmmc/sbt.c sbt
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# Broadcom FullMAC SDIO wireless adapter
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attach bwfm at sdmmc with bwfm_sdio
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file dev/sdmmc/if_bwfm_sdio.c bwfm_sdio
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@ -0,0 +1,444 @@
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/* $NetBSD: if_bwfm_sdio.c,v 1.1 2017/11/07 16:30:32 khorben Exp $ */
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/* $OpenBSD: if_bwfm_sdio.c,v 1.1 2017/10/11 17:19:50 patrick Exp $ */
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/*
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* Copyright (c) 2010-2016 Broadcom Corporation
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* Copyright (c) 2016,2017 Patrick Wildt <patrick@blueri.se>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/buf.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/device.h>
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#include <sys/queue.h>
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#include <sys/socket.h>
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#include <sys/mutex.h>
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#include <sys/workqueue.h>
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#include <sys/pcq.h>
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#include <net/bpf.h>
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#include <net/if.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/if_ether.h>
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#include <netinet/in.h>
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#include <net80211/ieee80211_var.h>
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#include <dev/sdmmc/sdmmcvar.h>
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#include <dev/ic/bwfmvar.h>
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#include <dev/ic/bwfmreg.h>
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#define BWFM_SDIO_CCCR_BRCM_CARDCAP 0xf0
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#define BWFM_SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT 0x02
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#define BWFM_SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT 0x04
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#define BWFM_SDIO_CCCR_BRCM_CARDCAP_CMD_NODEC 0x08
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#define BWFM_SDIO_CCCR_BRCM_CARDCTRL 0xf1
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#define BWFM_SDIO_CCCR_BRCM_CARDCTRL_WLANRESET 0x02
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#define BWFM_SDIO_CCCR_BRCM_SEPINT 0xf2
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#ifdef BWFM_DEBUG
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#define DPRINTF(x) do { if (bwfm_debug > 0) printf x; } while (0)
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#define DPRINTFN(n, x) do { if (bwfm_debug >= (n)) printf x; } while (0)
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static int bwfm_debug = 2;
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#else
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#define DPRINTF(x) do { ; } while (0)
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#define DPRINTFN(n, x) do { ; } while (0)
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#endif
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#define DEVNAME(sc) device_xname((sc)->sc_sc.sc_dev)
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struct bwfm_sdio_softc {
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struct bwfm_softc sc_sc;
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struct sdmmc_function **sc_sf;
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uint32_t sc_bar0;
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};
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int bwfm_sdio_match(device_t, cfdata_t, void *);
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void bwfm_sdio_attach(device_t, struct device *, void *);
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int bwfm_sdio_detach(device_t, int);
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uint8_t bwfm_sdio_read_1(struct bwfm_sdio_softc *, uint32_t);
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uint32_t bwfm_sdio_read_4(struct bwfm_sdio_softc *, uint32_t);
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void bwfm_sdio_write_1(struct bwfm_sdio_softc *, uint32_t,
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uint8_t);
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void bwfm_sdio_write_4(struct bwfm_sdio_softc *, uint32_t,
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uint32_t);
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uint32_t bwfm_sdio_buscore_read(struct bwfm_softc *, uint32_t);
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void bwfm_sdio_buscore_write(struct bwfm_softc *, uint32_t,
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uint32_t);
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int bwfm_sdio_buscore_prepare(struct bwfm_softc *);
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void bwfm_sdio_buscore_activate(struct bwfm_softc *, uint32_t);
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int bwfm_sdio_txdata(struct bwfm_softc *, struct mbuf *);
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int bwfm_sdio_txctl(struct bwfm_softc *, char *, size_t);
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int bwfm_sdio_rxctl(struct bwfm_softc *, char *, size_t *);
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struct bwfm_bus_ops bwfm_sdio_bus_ops = {
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.bs_init = NULL,
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.bs_stop = NULL,
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.bs_txdata = bwfm_sdio_txdata,
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.bs_txctl = bwfm_sdio_txctl,
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.bs_rxctl = bwfm_sdio_rxctl,
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};
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struct bwfm_buscore_ops bwfm_sdio_buscore_ops = {
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.bc_read = bwfm_sdio_buscore_read,
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.bc_write = bwfm_sdio_buscore_write,
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.bc_prepare = bwfm_sdio_buscore_prepare,
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.bc_reset = NULL,
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.bc_setup = NULL,
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.bc_activate = bwfm_sdio_buscore_activate,
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};
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CFATTACH_DECL_NEW(bwfm_sdio, sizeof(struct bwfm_sdio_softc),
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bwfm_sdio_match, bwfm_sdio_attach, bwfm_sdio_detach, NULL);
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int
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bwfm_sdio_match(device_t parent, cfdata_t match, void *aux)
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{
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struct sdmmc_attach_args *saa = aux;
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struct sdmmc_function *sf = saa->sf;
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struct sdmmc_cis *cis;
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/* Not SDIO. */
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if (sf == NULL)
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return 0;
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/* Look for Broadcom 433[04]. */
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cis = &sf->sc->sc_fn0->cis;
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if (cis->manufacturer != 0x02d0 || (cis->product != 0x4330 &&
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cis->product != 0x4334))
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return 0;
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/* We need both functions, but ... */
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if (sf->sc->sc_function_count <= 1)
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return 0;
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/* ... only attach for one. */
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if (sf->number != 1)
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return 0;
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return 1;
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}
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void
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bwfm_sdio_attach(device_t parent, device_t self, void *aux)
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{
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struct bwfm_sdio_softc *sc = device_private(self);
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struct sdmmc_attach_args *saa = aux;
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struct sdmmc_function *sf = saa->sf;
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struct bwfm_core *core;
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aprint_naive("\n");
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sc->sc_sf = malloc((sf->sc->sc_function_count + 1) *
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sizeof(struct sdmmc_function *), M_DEVBUF, M_WAITOK);
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/* Copy all function pointers. */
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SIMPLEQ_FOREACH(sf, &saa->sf->sc->sf_head, sf_list) {
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sc->sc_sf[sf->number] = sf;
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}
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sf = saa->sf;
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/*
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* TODO: set block size to 64 for func 1, 512 for func 2.
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* We might need to work on the SDMMC stack to be able to set
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* a block size per function. Currently the IO code uses the
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* SDHC controller's maximum block length.
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*/
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/* Enable Function 1. */
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if (sdmmc_io_function_enable(sc->sc_sf[1]) != 0) {
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aprint_error_dev(self, "cannot enable function 1\n");
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goto err;
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}
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DPRINTFN(2, ("%s: F1 signature read @0x18000000=%x\n", DEVNAME(sc),
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bwfm_sdio_read_4(sc, 0x18000000)));
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/* Force PLL off */
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bwfm_sdio_write_1(sc, BWFM_SDIO_FUNC1_CHIPCLKCSR,
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BWFM_SDIO_FUNC1_CHIPCLKCSR_FORCE_HW_CLKREQ_OFF |
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BWFM_SDIO_FUNC1_CHIPCLKCSR_ALP_AVAIL_REQ);
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sc->sc_sc.sc_buscore_ops = &bwfm_sdio_buscore_ops;
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if (bwfm_chip_attach(&sc->sc_sc) != 0) {
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aprint_error_dev(self, "cannot attach chip\n");
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goto err;
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}
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/* TODO: drive strength */
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bwfm_sdio_write_1(sc, BWFM_SDIO_CCCR_BRCM_CARDCTRL,
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bwfm_sdio_read_1(sc, BWFM_SDIO_CCCR_BRCM_CARDCTRL) |
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BWFM_SDIO_CCCR_BRCM_CARDCTRL_WLANRESET);
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core = bwfm_chip_get_pmu(&sc->sc_sc);
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bwfm_sdio_write_4(sc, core->co_base + BWFM_CHIP_REG_PMUCONTROL,
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bwfm_sdio_read_4(sc, core->co_base + BWFM_CHIP_REG_PMUCONTROL) |
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(BWFM_CHIP_REG_PMUCONTROL_RES_RELOAD <<
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BWFM_CHIP_REG_PMUCONTROL_RES_SHIFT));
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sc->sc_sc.sc_bus_ops = &bwfm_sdio_bus_ops;
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sc->sc_sc.sc_proto_ops = &bwfm_proto_bcdc_ops;
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bwfm_attach(&sc->sc_sc);
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return;
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err:
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free(sc->sc_sf, M_DEVBUF);
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}
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int
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bwfm_sdio_detach(struct device *self, int flags)
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{
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struct bwfm_sdio_softc *sc = (struct bwfm_sdio_softc *)self;
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bwfm_detach(&sc->sc_sc, flags);
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free(sc->sc_sf, M_DEVBUF);
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return 0;
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}
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uint8_t
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bwfm_sdio_read_1(struct bwfm_sdio_softc *sc, uint32_t addr)
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{
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struct sdmmc_function *sf;
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uint8_t rv;
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/*
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* figure out how to read the register based on address range
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* 0x00 ~ 0x7FF: function 0 CCCR and FBR
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* 0x10000 ~ 0x1FFFF: function 1 miscellaneous registers
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* The rest: function 1 silicon backplane core registers
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*/
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if ((addr & ~0x7ff) == 0)
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sf = sc->sc_sf[0];
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else
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sf = sc->sc_sf[1];
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rv = sdmmc_io_read_1(sf, addr);
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return rv;
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}
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uint32_t
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bwfm_sdio_read_4(struct bwfm_sdio_softc *sc, uint32_t addr)
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{
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struct sdmmc_function *sf;
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uint32_t bar0 = addr & ~BWFM_SDIO_SB_OFT_ADDR_MASK;
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uint32_t rv;
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if (sc->sc_bar0 != bar0) {
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bwfm_sdio_write_1(sc, BWFM_SDIO_FUNC1_SBADDRLOW,
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(bar0 >> 8) & 0x80);
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bwfm_sdio_write_1(sc, BWFM_SDIO_FUNC1_SBADDRMID,
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(bar0 >> 16) & 0xff);
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bwfm_sdio_write_1(sc, BWFM_SDIO_FUNC1_SBADDRHIGH,
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(bar0 >> 24) & 0xff);
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sc->sc_bar0 = bar0;
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}
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addr &= BWFM_SDIO_SB_OFT_ADDR_MASK;
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addr |= BWFM_SDIO_SB_ACCESS_2_4B_FLAG;
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/*
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* figure out how to read the register based on address range
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* 0x00 ~ 0x7FF: function 0 CCCR and FBR
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* 0x10000 ~ 0x1FFFF: function 1 miscellaneous registers
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* The rest: function 1 silicon backplane core registers
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*/
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if ((addr & ~0x7ff) == 0)
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sf = sc->sc_sf[0];
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else
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sf = sc->sc_sf[1];
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rv = sdmmc_io_read_4(sf, addr);
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return rv;
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}
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void
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bwfm_sdio_write_1(struct bwfm_sdio_softc *sc, uint32_t addr, uint8_t data)
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{
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struct sdmmc_function *sf;
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/*
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* figure out how to read the register based on address range
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* 0x00 ~ 0x7FF: function 0 CCCR and FBR
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* 0x10000 ~ 0x1FFFF: function 1 miscellaneous registers
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* The rest: function 1 silicon backplane core registers
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*/
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if ((addr & ~0x7ff) == 0)
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sf = sc->sc_sf[0];
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else
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sf = sc->sc_sf[1];
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sdmmc_io_write_1(sf, addr, data);
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}
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void
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bwfm_sdio_write_4(struct bwfm_sdio_softc *sc, uint32_t addr, uint32_t data)
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{
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struct sdmmc_function *sf;
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uint32_t bar0 = addr & ~BWFM_SDIO_SB_OFT_ADDR_MASK;
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if (sc->sc_bar0 != bar0) {
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bwfm_sdio_write_1(sc, BWFM_SDIO_FUNC1_SBADDRLOW,
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(bar0 >> 8) & 0x80);
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bwfm_sdio_write_1(sc, BWFM_SDIO_FUNC1_SBADDRMID,
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(bar0 >> 16) & 0xff);
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bwfm_sdio_write_1(sc, BWFM_SDIO_FUNC1_SBADDRHIGH,
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(bar0 >> 24) & 0xff);
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sc->sc_bar0 = bar0;
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}
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addr &= BWFM_SDIO_SB_OFT_ADDR_MASK;
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addr |= BWFM_SDIO_SB_ACCESS_2_4B_FLAG;
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/*
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* figure out how to read the register based on address range
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* 0x00 ~ 0x7FF: function 0 CCCR and FBR
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* 0x10000 ~ 0x1FFFF: function 1 miscellaneous registers
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* The rest: function 1 silicon backplane core registers
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*/
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if ((addr & ~0x7ff) == 0)
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sf = sc->sc_sf[0];
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else
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sf = sc->sc_sf[1];
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sdmmc_io_write_4(sf, addr, data);
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}
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uint32_t
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bwfm_sdio_buscore_read(struct bwfm_softc *bwfm, uint32_t reg)
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{
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struct bwfm_sdio_softc *sc = (void *)bwfm;
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uint32_t val;
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val = bwfm_sdio_read_4(sc, reg);
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/* TODO: Workaround for 4335/4339 */
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return val;
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}
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void
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bwfm_sdio_buscore_write(struct bwfm_softc *bwfm, uint32_t reg, uint32_t val)
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{
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struct bwfm_sdio_softc *sc = (void *)bwfm;
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bwfm_sdio_write_4(sc, reg, val);
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}
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int
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bwfm_sdio_buscore_prepare(struct bwfm_softc *bwfm)
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{
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struct bwfm_sdio_softc *sc = (void *)bwfm;
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uint8_t clkval, clkset, clkmask;
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int i;
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clkset = BWFM_SDIO_FUNC1_CHIPCLKCSR_ALP_AVAIL_REQ |
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BWFM_SDIO_FUNC1_CHIPCLKCSR_FORCE_HW_CLKREQ_OFF;
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bwfm_sdio_write_1(sc, BWFM_SDIO_FUNC1_CHIPCLKCSR, clkset);
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clkmask = BWFM_SDIO_FUNC1_CHIPCLKCSR_ALP_AVAIL |
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BWFM_SDIO_FUNC1_CHIPCLKCSR_HT_AVAIL;
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clkval = bwfm_sdio_read_1(sc, BWFM_SDIO_FUNC1_CHIPCLKCSR);
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if ((clkval & ~clkmask) != clkset) {
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printf("%s: wrote 0x%02x read 0x%02x\n", DEVNAME(sc),
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clkset, clkval);
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return 1;
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}
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for (i = 1000; i > 0; i--) {
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clkval = bwfm_sdio_read_1(sc,
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BWFM_SDIO_FUNC1_CHIPCLKCSR);
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if (clkval & clkmask)
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break;
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}
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if (i == 0) {
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printf("%s: timeout on ALPAV wait, clkval 0x%02x\n",
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DEVNAME(sc), clkval);
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return 1;
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}
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clkset = BWFM_SDIO_FUNC1_CHIPCLKCSR_FORCE_HW_CLKREQ_OFF |
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BWFM_SDIO_FUNC1_CHIPCLKCSR_FORCE_ALP;
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bwfm_sdio_write_1(sc, BWFM_SDIO_FUNC1_CHIPCLKCSR, clkset);
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delay(65);
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bwfm_sdio_write_1(sc, BWFM_SDIO_FUNC1_SDIOPULLUP, 0);
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return 0;
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}
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void
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bwfm_sdio_buscore_activate(struct bwfm_softc *bwfm, uint32_t rstvec)
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{
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struct bwfm_sdio_softc *sc = (void *)bwfm;
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struct bwfm_core *core;
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core = bwfm_chip_get_core(&sc->sc_sc, BWFM_AGENT_CORE_SDIO_DEV);
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bwfm_sdio_buscore_write(&sc->sc_sc,
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core->co_base + BWFM_SDPCMD_INTSTATUS, 0xFFFFFFFF);
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#if notyet
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if (rstvec)
|
||||
bwfm_sdio_ram_write(&sc->sc_sc, 0, &rstvec, sizeof(rstvec));
|
||||
#endif
|
||||
}
|
||||
|
||||
int
|
||||
bwfm_sdio_txdata(struct bwfm_softc *bwfm, struct mbuf *m)
|
||||
{
|
||||
#ifdef BWFM_DEBUG
|
||||
struct bwfm_sdio_softc *sc = (void *)bwfm;
|
||||
#endif
|
||||
int ret = 1;
|
||||
|
||||
DPRINTFN(2, ("%s: %s\n", DEVNAME(sc), __func__));
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int
|
||||
bwfm_sdio_txctl(struct bwfm_softc *bwfm, char *buf, size_t len)
|
||||
{
|
||||
#ifdef BWFM_DEBUG
|
||||
struct bwfm_sdio_softc *sc = (void *)bwfm;
|
||||
#endif
|
||||
int ret = 1;
|
||||
|
||||
DPRINTFN(2, ("%s: %s\n", DEVNAME(sc), __func__));
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int
|
||||
bwfm_sdio_rxctl(struct bwfm_softc *bwfm, char *buf, size_t *len)
|
||||
{
|
||||
#ifdef BWFM_DEBUG
|
||||
struct bwfm_sdio_softc *sc = (void *)bwfm;
|
||||
#endif
|
||||
int ret = 1;
|
||||
|
||||
DPRINTFN(2, ("%s: %s\n", DEVNAME(sc), __func__));
|
||||
|
||||
return ret;
|
||||
}
|
||||
Loading…
Reference in New Issue