Use <dev/ic/mc146818.h>. Change systemclock settings. Usable values for
HZ are now 48/64/96. This reduces the interrupt overhead, because we don't need the extra division by 4 in the interrupt handler.
This commit is contained in:
leo
parent
04246ac4f8
commit
d66ffa3fe1
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@ -1,4 +1,4 @@
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/* $NetBSD: clock.c,v 1.2 1995/05/05 16:31:46 leo Exp $ */
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/* $NetBSD: clock.c,v 1.3 1995/05/28 19:38:49 leo Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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@ -105,18 +105,17 @@ struct device *pdp, *dp;
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void *auxp;
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{
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/*
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* Initialize Timer-A in the ST-MFP. An exact reduce to HZ is not
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* possible by hardware. We use a divisor of 64 and reduce by software
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* with a factor of 4. The MFP clock runs at 2457600Hz. Therefore the
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* timer runs at an effective rate of: 2457600/(64*4) = 9600Hz. The
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* following expression works for all 'normal' values of hz.
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* Initialize Timer-A in the ST-MFP. We use a divisor of 200.
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* The MFP clock runs at 2457600Hz. Therefore the timer runs
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* at an effective rate of: 2457600/200 = 12288Hz. The
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* following expression works for 48, 64 or 96 hz.
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*/
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divisor = 9600/hz;
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divisor = 12288/hz;
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MFP->mf_tacr = 0; /* Stop timer */
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MFP->mf_iera &= ~IA_TIMA; /* Disable timer interrupts */
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MFP->mf_tadr = divisor; /* Set divisor */
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printf(": system hz %d timer-A divisor %d\n", hz, divisor);
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printf(": system hz %d timer-A divisor 200/%d\n", hz, divisor);
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/*
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* Initialize Timer-B in the ST-MFP. This timer is used by the 'delay'
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@ -132,7 +131,7 @@ void *auxp;
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void cpu_initclocks()
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{
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MFP->mf_tacr = T_Q064; /* Start timer */
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MFP->mf_tacr = T_Q200; /* Start timer */
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MFP->mf_ipra &= ~IA_TIMA; /* Clear pending interrupts */
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MFP->mf_iera |= IA_TIMA; /* Enable timer interrupts */
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MFP->mf_imra |= IA_TIMA; /* ..... */
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@ -149,12 +148,9 @@ setstatclockrate(hz)
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*/
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clkread()
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{
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extern short clk_div;
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u_int delta, elapsed;
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elapsed = (divisor - MFP->mf_tadr) + ((4 - clk_div) * divisor);
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delta = (elapsed * tick) / (divisor << 2);
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u_int delta;
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delta = ((divisor - MFP->mf_tadr) * tick) / divisor;
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/*
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* Account for pending clock interrupts
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*/
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@ -377,68 +373,41 @@ static char ldmsize[12] =
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31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
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};
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static __inline__ int rtc_getclkreg(regno)
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int regno;
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{
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RTC->rtc_regno = RTC_REGA;
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RTC->rtc_regno = regno;
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return(RTC->rtc_data & 0377);
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}
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static __inline__ void rtc_setclkreg(regno, value)
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int regno, value;
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{
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RTC->rtc_regno = regno;
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RTC->rtc_data = value;
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}
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static u_long
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gettod()
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{
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int i, year, mon, day, hour, min, sec;
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u_long new_time = 0;
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char *msize;
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int i, sps;
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u_long new_time = 0;
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char *msize;
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mc_todregs clkregs;
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/*
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* Hold clock
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*/
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rtc_setclkreg(RTC_REGB, rtc_getclkreg(RTC_REGB) | RTC_B_SET);
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sps = splhigh();
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MC146818_GETTOD(RTC, &clkregs);
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splx(sps);
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/*
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* Read clock
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*/
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sec = rtc_getclkreg(RTC_SEC);
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min = rtc_getclkreg(RTC_MIN);
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hour = rtc_getclkreg(RTC_HOUR);
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day = rtc_getclkreg(RTC_DAY) - 1;
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mon = rtc_getclkreg(RTC_MONTH) - 1;
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year = rtc_getclkreg(RTC_YEAR) + STARTOFTIME;
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/*
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* Let it run again..
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*/
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rtc_setclkreg(RTC_REGB, rtc_getclkreg(RTC_REGB) & ~RTC_B_SET);
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if(range_test(hour, 0, 23))
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if(range_test(clkregs[MC_HOUR], 0, 23))
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return(0);
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if(range_test(day, 0, 30))
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if(range_test(clkregs[MC_DOM], 1, 31))
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return(0);
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if (range_test(mon, 0, 11))
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if (range_test(clkregs[MC_MONTH], 1, 12))
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return(0);
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if(range_test(year, STARTOFTIME, 2000))
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if(range_test(clkregs[MC_YEAR], 0, 2000 - GEMSTARTOFTIME))
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return(0);
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clkregs[MC_YEAR] += GEMSTARTOFTIME;
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for(i = STARTOFTIME; i < year; i++) {
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for(i = BSDSTARTOFTIME; i < clkregs[MC_YEAR]; i++) {
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if(is_leap(i))
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new_time += 366;
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else new_time += 365;
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}
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msize = is_leap(year) ? ldmsize : dmsize;
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for(i = 0; i < mon; i++)
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msize = is_leap(clkregs[MC_YEAR]) ? ldmsize : dmsize;
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for(i = 0; i < (clkregs[MC_MONTH] - 1); i++)
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new_time += msize[i];
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new_time += day;
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return((new_time * SECS_DAY) + (hour * 3600) + (min * 60) + sec);
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new_time += clkregs[MC_DOM] - 1;
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new_time *= SECS_DAY;
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new_time += (clkregs[MC_HOUR] * 3600) + (clkregs[MC_MIN] * 60);
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return(new_time + clkregs[MC_SEC]);
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}
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static int
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@ -447,9 +416,10 @@ u_long newtime;
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{
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register long days, rem, year;
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register char *ml;
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int sec, min, hour, month;
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int sps, sec, min, hour, month;
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mc_todregs clkregs;
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/* Number of days since Jan. 1 1970 */
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/* Number of days since Jan. 1 'BSDSTARTOFTIME' */
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days = newtime / SECS_DAY;
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rem = newtime % SECS_DAY;
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@ -464,14 +434,10 @@ u_long newtime;
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/*
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* Figure out the year. Day in year is left in 'days'.
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*/
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year = STARTOFTIME;
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year = BSDSTARTOFTIME;
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while(days >= (rem = is_leap(year) ? 366 : 365)) {
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++year;
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days -= rem;
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}
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while(days < 0) {
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--year;
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days += is_leap(year) ? 366 : 365;
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++year;
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days -= rem;
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}
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/*
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@ -484,16 +450,18 @@ u_long newtime;
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/*
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* Now that everything is calculated, program the RTC
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*/
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rtc_setclkreg(RTC_REGB, RTC_B_SET);
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rtc_setclkreg(RTC_REGA, RTC_A_DV1|RTC_A_RS2|RTC_A_RS3);
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rtc_setclkreg(RTC_REGB, RTC_B_SET|RTC_B_SQWE|RTC_B_DM|RTC_B_24_12);
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rtc_setclkreg(RTC_SEC, sec);
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rtc_setclkreg(RTC_MIN, min);
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rtc_setclkreg(RTC_HOUR, hour);
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rtc_setclkreg(RTC_DAY, days+1);
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rtc_setclkreg(RTC_MONTH, month+1);
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rtc_setclkreg(RTC_YEAR, year-1970);
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rtc_setclkreg(RTC_REGB, RTC_B_SQWE|RTC_B_DM|RTC_B_24_12);
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mc146818_write(RTC, MC_REGA, MC_BASE_32_KHz);
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mc146818_write(RTC, MC_REGB, MC_REGB_24HR | MC_REGB_BINARY);
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sps = splhigh();
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MC146818_GETTOD(RTC, &clkregs);
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clkregs[MC_SEC] = sec;
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clkregs[MC_MIN] = min;
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clkregs[MC_HOUR] = hour;
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clkregs[MC_DOM] = days+1;
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clkregs[MC_MONTH] = month+1;
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clkregs[MC_YEAR] = year - GEMSTARTOFTIME;
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MC146818_PUTTOD(RTC, &clkregs);
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splx(sps);
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return(1);
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: clockreg.h,v 1.1.1.1 1995/03/26 07:12:15 leo Exp $ */
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/* $NetBSD: clockreg.h,v 1.2 1995/05/28 19:38:51 leo Exp $ */
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/*
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* Copyright (c) 1995 Leo Weppelman.
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@ -47,61 +47,25 @@ struct rtc {
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#define rtc_data rtc_dat[3] /* data register */
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/*
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* Register number definitions
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* Pull in general mc146818 definitions
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*/
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#define RTC_SEC 0
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#define RTC_ASEC 1
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#define RTC_MIN 2
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#define RTC_A_MIN 3
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#define RTC_HOUR 4
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#define RTC_A_HOUR 5
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#define RTC_WDAY 6
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#define RTC_DAY 7
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#define RTC_MONTH 8
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#define RTC_YEAR 9
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#define RTC_REGA 10
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#define RTC_REGB 11
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#define RTC_REGC 12
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#define RTC_REGD 13
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#define RTC_RAMBOT 14 /* Reg. offset of nv-RAM */
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#define RTC_RAMSIZ 50 /* #bytes of nv-RAM available */
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#include <dev/ic/mc146818.h>
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/*
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* Define fields for register A
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*/
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#define RTC_A_UIP 0x80 /* Update In Progress */
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#define RTC_A_DV2 0x40 /* Divider select */
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#define RTC_A_DV1 0x20 /* Divider select */
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#define RTC_A_DV0 0x10 /* Divider select */
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#define RTC_A_RS3 0x08 /* Rate Select */
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#define RTC_A_RS2 0x04 /* Rate Select */
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#define RTC_A_RS1 0x02 /* Rate Select */
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#define RTC_A_RS0 0x01 /* Rate Select */
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__inline__ u_int mc146818_read(rtc, regno)
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void *rtc;
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u_int regno;
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{
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((struct rtc *)rtc)->rtc_regno = regno;
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return(((struct rtc *)rtc)->rtc_data & 0377);
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}
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/*
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* Define fields for register B
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*/
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#define RTC_B_SET 0x80 /* SET date/time */
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#define RTC_B_PIE 0x40 /* Periodic Int. Enable */
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#define RTC_B_AIE 0x20 /* Alarm Int. Enable */
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#define RTC_B_UIE 0x10 /* Update Ended Int. Enable */
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#define RTC_B_SQWE 0x08 /* Square Wave Output Enable */
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#define RTC_B_DM 0x04 /* Binary Data mode */
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#define RTC_B_24_12 0x02 /* 24 Hour mode */
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#define RTC_B_DSE 0x01 /* DST Enable */
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/*
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* Define fields for register C
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*/
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#define RTC_C_IRQF 0x80 /* IRQ flag */
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#define RTC_C_PF 0x40 /* Periodic Int. flag */
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#define RTC_C_AF 0x20 /* Alarm Int. flag */
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#define RTC_C_UF 0x10 /* Update Ended Int. flag */
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/*
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* Define fields for register D
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*/
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#define RTC_D_VRT 0x80 /* Valid Ram and Time */
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__inline__ void mc146818_write(rtc, regno, value)
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void *rtc;
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u_int regno, value;
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{
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((struct rtc *)rtc)->rtc_regno = regno;
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((struct rtc *)rtc)->rtc_data = value;
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}
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/*
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* Some useful constants/macros
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@ -110,5 +74,6 @@ struct rtc {
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#define range_test(n, l, h) ((n) < (l) || (n) > (h))
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#define SECS_DAY 86400L
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#define SECS_HOUR 3600L
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#define STARTOFTIME 1970
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#define GEMSTARTOFTIME ((machineid & ATARI_CLKBROKEN) ? 1970 : 1968)
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#define BSDSTARTOFTIME 1970
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#endif /* _CLOCKREG_H */
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