Pull up the following revisions, requested by msaitoh in ticket #1795:
sys/dev/pci/if_wm.c 1.764-1.767 via patch sys/dev/pci/if_wmreg.h 1.128 - Workaround for some hypervisor environments. The environments cannot stop e1000 interrupt immediately. - Rename nq_txdesc' member "nqrx_ctx" to "nqtx_ctx". No functional change. - Add comment. Modify comment. - KNF.
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e21097e50c
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d573b15002
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@ -1,4 +1,4 @@
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/* $NetBSD: if_wm.c,v 1.508.4.47 2022/09/08 10:29:36 martin Exp $ */
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/* $NetBSD: if_wm.c,v 1.508.4.48 2023/01/23 14:01:25 martin Exp $ */
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/*
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* Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
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@ -82,7 +82,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.508.4.47 2022/09/08 10:29:36 martin Exp $");
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__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.508.4.48 2023/01/23 14:01:25 martin Exp $");
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#ifdef _KERNEL_OPT
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#include "opt_net_mpsafe.h"
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@ -487,6 +487,7 @@ struct wm_queue {
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char sysctlname[32]; /* Name for sysctl */
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bool wmq_txrx_use_workqueue;
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bool wmq_wq_enqueued;
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struct work wmq_cookie;
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void *wmq_si;
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krndsource_t rnd_source; /* random source */
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@ -3794,9 +3795,9 @@ wm_tick(void *arg)
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crcerrs + algnerrc + symerrc + rxerrc + sec + cexterr + rlec;
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/*
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* WMREG_RNBC is incremented when there are no available buffers in host
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* memory. It does not mean the number of dropped packets, because an
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* Ethernet controller can receive packets in such case if there is
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* WMREG_RNBC is incremented when there are no available buffers in
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* host memory. It does not mean the number of dropped packets, because
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* an Ethernet controller can receive packets in such case if there is
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* space in the phy's FIFO.
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*
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* If you want to know the nubmer of WMREG_RMBC, you should use such as
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@ -4750,7 +4751,8 @@ wm_init_lcd_from_nvm(struct wm_softc *sc)
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* LCD Write Enable bits are set in the NVM. When both NVM bits
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* are cleared, SW will configure them instead.
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*/
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DPRINTF(sc, WM_DEBUG_INIT, ("%s: %s: Configure SMBus and LED\n",
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DPRINTF(sc, WM_DEBUG_INIT,
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("%s: %s: Configure SMBus and LED\n",
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device_xname(sc->sc_dev), __func__));
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wm_write_smbus_addr(sc);
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@ -5056,15 +5058,15 @@ wm_initialize_hardware_bits(struct wm_softc *sc)
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CSR_WRITE(sc, WMREG_TARC0, tarc0);
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switch (sc->sc_type) {
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/*
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* 8257[12] Errata No.52, 82573 Errata No.43 and some others.
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* Avoid RSS Hash Value bug.
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*/
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case WM_T_82571:
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case WM_T_82572:
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case WM_T_82573:
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case WM_T_80003:
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case WM_T_ICH8:
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/*
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* 8257[12] Errata No.52, 82573 Errata No.43 and some
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* others to avoid RSS Hash Value bug.
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*/
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reg = CSR_READ(sc, WMREG_RFCTL);
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reg |= WMREG_RFCTL_NEWIPV6EXDIS |WMREG_RFCTL_IPV6EXDIS;
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CSR_WRITE(sc, WMREG_RFCTL, reg);
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@ -5468,6 +5470,11 @@ wm_reset(struct wm_softc *sc)
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CSR_WRITE(sc, WMREG_CTRL, reg);
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/* Don't insert a completion barrier when reset */
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delay(20*1000);
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/*
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* The EXTCNFCTR_MDIO_SW_OWNERSHIP bit is cleared by the reset,
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* so don't use sc->phy.release(sc). Release sc_ich_phymtx
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* only. See also wm_get_swflag_ich8lan().
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*/
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mutex_exit(sc->sc_ich_phymtx);
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break;
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case WM_T_82580:
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@ -6168,7 +6175,8 @@ wm_itrs_writereg(struct wm_softc *sc, struct wm_queue *wmq)
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* So, overwrite counter field by software.
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*/
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if (sc->sc_type == WM_T_82575)
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eitr |= __SHIFTIN(wmq->wmq_itr, EITR_COUNTER_MASK_82575);
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eitr |= __SHIFTIN(wmq->wmq_itr,
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EITR_COUNTER_MASK_82575);
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else
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eitr |= EITR_CNT_INGR;
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@ -6269,7 +6277,8 @@ wm_init_sysctls(struct wm_softc *sc)
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goto err;
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rv = sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
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CTLTYPE_BOOL, "txrx_workqueue", SYSCTL_DESCR("Use workqueue for packet processing"),
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CTLTYPE_BOOL, "txrx_workqueue",
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SYSCTL_DESCR("Use workqueue for packet processing"),
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NULL, 0, &sc->sc_txrx_use_workqueue, 0, CTL_CREATE, CTL_EOL);
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if (rv != 0)
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goto teardown;
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@ -8806,12 +8815,12 @@ wm_nq_tx_offload(struct wm_softc *sc, struct wm_txqueue *txq,
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* however it does not cause problems.
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*/
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/* Fill in the context descriptor. */
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txq->txq_nq_descs[txq->txq_next].nqrx_ctx.nqtxc_vl_len =
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txq->txq_nq_descs[txq->txq_next].nqtx_ctx.nqtxc_vl_len =
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htole32(vl_len);
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txq->txq_nq_descs[txq->txq_next].nqrx_ctx.nqtxc_sn = 0;
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txq->txq_nq_descs[txq->txq_next].nqrx_ctx.nqtxc_cmd =
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txq->txq_nq_descs[txq->txq_next].nqtx_ctx.nqtxc_sn = 0;
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txq->txq_nq_descs[txq->txq_next].nqtx_ctx.nqtxc_cmd =
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htole32(cmdc);
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txq->txq_nq_descs[txq->txq_next].nqrx_ctx.nqtxc_mssidx =
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txq->txq_nq_descs[txq->txq_next].nqtx_ctx.nqtxc_mssidx =
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htole32(mssidx);
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wm_cdtxsync(txq, txq->txq_next, 1, BUS_DMASYNC_PREWRITE);
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DPRINTF(sc, WM_DEBUG_TX,
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@ -10075,9 +10084,13 @@ static inline void
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wm_sched_handle_queue(struct wm_softc *sc, struct wm_queue *wmq)
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{
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if (wmq->wmq_txrx_use_workqueue)
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workqueue_enqueue(sc->sc_queue_wq, &wmq->wmq_cookie, curcpu());
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else
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if (wmq->wmq_txrx_use_workqueue) {
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if (!wmq->wmq_wq_enqueued) {
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wmq->wmq_wq_enqueued = true;
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workqueue_enqueue(sc->sc_queue_wq, &wmq->wmq_cookie,
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curcpu());
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}
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} else
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softint_schedule(wmq->wmq_si);
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}
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struct wm_queue *wmq = container_of(wk, struct wm_queue, wmq_cookie);
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/*
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* "enqueued flag" is not required here.
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* Some qemu environment workaround. They don't stop interrupt
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* immediately.
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*/
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wmq->wmq_wq_enqueued = false;
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wm_handle_queue(wmq);
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}
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@ -12191,8 +12206,8 @@ wm_gmii_statchg(struct ifnet *ifp)
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CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
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CSR_WRITE(sc, WMREG_TCTL, sc->sc_tctl);
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CSR_WRITE(sc, (sc->sc_type < WM_T_82543) ? WMREG_OLD_FCRTL
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: WMREG_FCRTL, sc->sc_fcrtl);
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CSR_WRITE(sc, (sc->sc_type < WM_T_82543) ?
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WMREG_OLD_FCRTL : WMREG_FCRTL, sc->sc_fcrtl);
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if (sc->sc_type == WM_T_80003) {
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switch (IFM_SUBTYPE(mii->mii_media_active)) {
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case IFM_1000_T:
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/* Acquire PHY semaphore */
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rv = sc->phy.acquire(sc);
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if (rv != 0) {
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DPRINTF(sc, WM_DEBUG_INIT, ("%s: %s: failed\n",
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device_xname(sc->sc_dev), __func__));
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DPRINTF(sc, WM_DEBUG_INIT,
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("%s: %s: failed\n", device_xname(sc->sc_dev), __func__));
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return rv;
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}
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@ -15468,8 +15483,8 @@ wm_ulp_disable(struct wm_softc *sc)
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/* Acquire semaphore */
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rv = sc->phy.acquire(sc);
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if (rv != 0) {
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DPRINTF(sc, WM_DEBUG_INIT, ("%s: %s: failed\n",
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device_xname(sc->sc_dev), __func__));
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DPRINTF(sc, WM_DEBUG_INIT,
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("%s: %s: failed\n", device_xname(sc->sc_dev), __func__));
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return rv;
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: if_wmreg.h,v 1.98.6.15 2022/09/07 10:09:20 martin Exp $ */
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/* $NetBSD: if_wmreg.h,v 1.98.6.16 2023/01/23 14:01:26 martin Exp $ */
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/*
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* Copyright (c) 2001 Wasabi Systems, Inc.
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@ -1703,7 +1703,7 @@ typedef union nq_txdesc {
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uint32_t nqtxc_sn;
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uint32_t nqtxc_cmd;
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uint32_t nqtxc_mssidx;
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} nqrx_ctx;
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} nqtx_ctx;
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} __packed nq_txdesc_t;
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