Pull up the following revisions, requested by msaitoh in ticket #1795:
sys/dev/pci/if_wm.c 1.764-1.767 via patch sys/dev/pci/if_wmreg.h 1.128 - Workaround for some hypervisor environments. The environments cannot stop e1000 interrupt immediately. - Rename nq_txdesc' member "nqrx_ctx" to "nqtx_ctx". No functional change. - Add comment. Modify comment. - KNF.
This commit is contained in:
parent
e21097e50c
commit
d573b15002
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@ -1,4 +1,4 @@
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/* $NetBSD: if_wm.c,v 1.508.4.47 2022/09/08 10:29:36 martin Exp $ */
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/* $NetBSD: if_wm.c,v 1.508.4.48 2023/01/23 14:01:25 martin Exp $ */
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/*
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/*
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* Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
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* Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
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@ -82,7 +82,7 @@
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*/
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*/
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#include <sys/cdefs.h>
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.508.4.47 2022/09/08 10:29:36 martin Exp $");
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__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.508.4.48 2023/01/23 14:01:25 martin Exp $");
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#ifdef _KERNEL_OPT
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#ifdef _KERNEL_OPT
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#include "opt_net_mpsafe.h"
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#include "opt_net_mpsafe.h"
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@ -487,6 +487,7 @@ struct wm_queue {
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char sysctlname[32]; /* Name for sysctl */
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char sysctlname[32]; /* Name for sysctl */
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bool wmq_txrx_use_workqueue;
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bool wmq_txrx_use_workqueue;
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bool wmq_wq_enqueued;
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struct work wmq_cookie;
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struct work wmq_cookie;
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void *wmq_si;
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void *wmq_si;
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krndsource_t rnd_source; /* random source */
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krndsource_t rnd_source; /* random source */
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@ -2263,7 +2264,7 @@ alloc_retry:
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aprint_error_dev(sc->sc_dev,
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aprint_error_dev(sc->sc_dev,
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"unable to find PCIX capability\n");
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"unable to find PCIX capability\n");
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else if (sc->sc_type != WM_T_82545_3 &&
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else if (sc->sc_type != WM_T_82545_3 &&
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sc->sc_type != WM_T_82546_3) {
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sc->sc_type != WM_T_82546_3) {
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/*
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/*
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* Work around a problem caused by the BIOS
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* Work around a problem caused by the BIOS
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* setting the max memory read byte count
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* setting the max memory read byte count
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@ -3633,7 +3634,7 @@ wm_watchdog_txq_locked(struct ifnet *ifp, struct wm_txqueue *txq,
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ifp->if_oerrors++;
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ifp->if_oerrors++;
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#ifdef WM_DEBUG
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#ifdef WM_DEBUG
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for (i = txq->txq_sdirty; i != txq->txq_snext;
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for (i = txq->txq_sdirty; i != txq->txq_snext;
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i = WM_NEXTTXS(txq, i)) {
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i = WM_NEXTTXS(txq, i)) {
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txs = &txq->txq_soft[i];
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txs = &txq->txq_soft[i];
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printf("txs %d tx %d -> %d\n",
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printf("txs %d tx %d -> %d\n",
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i, txs->txs_firstdesc, txs->txs_lastdesc);
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i, txs->txs_firstdesc, txs->txs_lastdesc);
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@ -3794,9 +3795,9 @@ wm_tick(void *arg)
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crcerrs + algnerrc + symerrc + rxerrc + sec + cexterr + rlec;
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crcerrs + algnerrc + symerrc + rxerrc + sec + cexterr + rlec;
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/*
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/*
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* WMREG_RNBC is incremented when there are no available buffers in host
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* WMREG_RNBC is incremented when there are no available buffers in
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* memory. It does not mean the number of dropped packets, because an
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* host memory. It does not mean the number of dropped packets, because
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* Ethernet controller can receive packets in such case if there is
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* an Ethernet controller can receive packets in such case if there is
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* space in the phy's FIFO.
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* space in the phy's FIFO.
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*
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*
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* If you want to know the nubmer of WMREG_RMBC, you should use such as
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* If you want to know the nubmer of WMREG_RMBC, you should use such as
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@ -4093,7 +4094,7 @@ wm_read_mac_addr(struct wm_softc *sc, uint8_t *enaddr)
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return 0;
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return 0;
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bad:
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bad:
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return -1;
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return -1;
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}
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}
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@ -4378,11 +4379,11 @@ wm_set_filter(struct wm_softc *sc)
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ifp->if_flags &= ~IFF_ALLMULTI;
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ifp->if_flags &= ~IFF_ALLMULTI;
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goto setit;
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goto setit;
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allmulti:
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allmulti:
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ifp->if_flags |= IFF_ALLMULTI;
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ifp->if_flags |= IFF_ALLMULTI;
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sc->sc_rctl |= RCTL_MPE;
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sc->sc_rctl |= RCTL_MPE;
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setit:
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setit:
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CSR_WRITE(sc, WMREG_RCTL, sc->sc_rctl);
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CSR_WRITE(sc, WMREG_RCTL, sc->sc_rctl);
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}
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}
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@ -4750,7 +4751,8 @@ wm_init_lcd_from_nvm(struct wm_softc *sc)
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* LCD Write Enable bits are set in the NVM. When both NVM bits
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* LCD Write Enable bits are set in the NVM. When both NVM bits
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* are cleared, SW will configure them instead.
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* are cleared, SW will configure them instead.
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*/
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*/
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DPRINTF(sc, WM_DEBUG_INIT, ("%s: %s: Configure SMBus and LED\n",
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DPRINTF(sc, WM_DEBUG_INIT,
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("%s: %s: Configure SMBus and LED\n",
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device_xname(sc->sc_dev), __func__));
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device_xname(sc->sc_dev), __func__));
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wm_write_smbus_addr(sc);
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wm_write_smbus_addr(sc);
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@ -5056,15 +5058,15 @@ wm_initialize_hardware_bits(struct wm_softc *sc)
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CSR_WRITE(sc, WMREG_TARC0, tarc0);
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CSR_WRITE(sc, WMREG_TARC0, tarc0);
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switch (sc->sc_type) {
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switch (sc->sc_type) {
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/*
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* 8257[12] Errata No.52, 82573 Errata No.43 and some others.
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* Avoid RSS Hash Value bug.
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*/
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case WM_T_82571:
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case WM_T_82571:
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case WM_T_82572:
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case WM_T_82572:
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case WM_T_82573:
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case WM_T_82573:
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case WM_T_80003:
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case WM_T_80003:
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case WM_T_ICH8:
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case WM_T_ICH8:
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/*
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* 8257[12] Errata No.52, 82573 Errata No.43 and some
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* others to avoid RSS Hash Value bug.
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*/
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reg = CSR_READ(sc, WMREG_RFCTL);
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reg = CSR_READ(sc, WMREG_RFCTL);
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reg |= WMREG_RFCTL_NEWIPV6EXDIS |WMREG_RFCTL_IPV6EXDIS;
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reg |= WMREG_RFCTL_NEWIPV6EXDIS |WMREG_RFCTL_IPV6EXDIS;
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CSR_WRITE(sc, WMREG_RFCTL, reg);
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CSR_WRITE(sc, WMREG_RFCTL, reg);
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CSR_WRITE(sc, WMREG_CTRL, reg);
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CSR_WRITE(sc, WMREG_CTRL, reg);
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/* Don't insert a completion barrier when reset */
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/* Don't insert a completion barrier when reset */
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delay(20*1000);
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delay(20*1000);
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/*
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* The EXTCNFCTR_MDIO_SW_OWNERSHIP bit is cleared by the reset,
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* so don't use sc->phy.release(sc). Release sc_ich_phymtx
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* only. See also wm_get_swflag_ich8lan().
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*/
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mutex_exit(sc->sc_ich_phymtx);
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mutex_exit(sc->sc_ich_phymtx);
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break;
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break;
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case WM_T_82580:
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case WM_T_82580:
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@ -6091,7 +6098,7 @@ wm_setup_msix(struct wm_softc *sc)
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kcpuset_destroy(affinity);
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kcpuset_destroy(affinity);
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return 0;
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return 0;
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fail:
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fail:
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for (qidx = 0; qidx < txrx_established; qidx++) {
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for (qidx = 0; qidx < txrx_established; qidx++) {
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struct wm_queue *wmq = &sc->sc_queue[qidx];
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struct wm_queue *wmq = &sc->sc_queue[qidx];
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pci_intr_disestablish(sc->sc_pc,sc->sc_ihs[wmq->wmq_intr_idx]);
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pci_intr_disestablish(sc->sc_pc,sc->sc_ihs[wmq->wmq_intr_idx]);
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@ -6168,7 +6175,8 @@ wm_itrs_writereg(struct wm_softc *sc, struct wm_queue *wmq)
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* So, overwrite counter field by software.
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* So, overwrite counter field by software.
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*/
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*/
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if (sc->sc_type == WM_T_82575)
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if (sc->sc_type == WM_T_82575)
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eitr |= __SHIFTIN(wmq->wmq_itr, EITR_COUNTER_MASK_82575);
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eitr |= __SHIFTIN(wmq->wmq_itr,
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EITR_COUNTER_MASK_82575);
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else
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else
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eitr |= EITR_CNT_INGR;
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eitr |= EITR_CNT_INGR;
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goto err;
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goto err;
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rv = sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
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rv = sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
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CTLTYPE_BOOL, "txrx_workqueue", SYSCTL_DESCR("Use workqueue for packet processing"),
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CTLTYPE_BOOL, "txrx_workqueue",
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SYSCTL_DESCR("Use workqueue for packet processing"),
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NULL, 0, &sc->sc_txrx_use_workqueue, 0, CTL_CREATE, CTL_EOL);
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NULL, 0, &sc->sc_txrx_use_workqueue, 0, CTL_CREATE, CTL_EOL);
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if (rv != 0)
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if (rv != 0)
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goto teardown;
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goto teardown;
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ifp->if_flags |= IFF_RUNNING;
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ifp->if_flags |= IFF_RUNNING;
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ifp->if_flags &= ~IFF_OACTIVE;
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ifp->if_flags &= ~IFF_OACTIVE;
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out:
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out:
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sc->sc_if_flags = ifp->if_flags;
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sc->sc_if_flags = ifp->if_flags;
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if (error)
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if (error)
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log(LOG_ERR, "%s: interface not running\n",
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log(LOG_ERR, "%s: interface not running\n",
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return 1;
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return 1;
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}
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}
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send_packet:
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send_packet:
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txq->txq_fifo_head += len;
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txq->txq_fifo_head += len;
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if (txq->txq_fifo_head >= txq->txq_fifo_size)
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if (txq->txq_fifo_head >= txq->txq_fifo_size)
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txq->txq_fifo_head -= txq->txq_fifo_size;
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txq->txq_fifo_head -= txq->txq_fifo_size;
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@ -7263,14 +7272,14 @@ wm_alloc_tx_descs(struct wm_softc *sc, struct wm_txqueue *txq)
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return 0;
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return 0;
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fail_3:
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fail_3:
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bus_dmamap_destroy(sc->sc_dmat, txq->txq_desc_dmamap);
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bus_dmamap_destroy(sc->sc_dmat, txq->txq_desc_dmamap);
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fail_2:
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fail_2:
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bus_dmamem_unmap(sc->sc_dmat, (void *)txq->txq_descs_u,
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bus_dmamem_unmap(sc->sc_dmat, (void *)txq->txq_descs_u,
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WM_TXDESCS_SIZE(txq));
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WM_TXDESCS_SIZE(txq));
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fail_1:
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fail_1:
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bus_dmamem_free(sc->sc_dmat, &txq->txq_desc_seg, txq->txq_desc_rseg);
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bus_dmamem_free(sc->sc_dmat, &txq->txq_desc_seg, txq->txq_desc_rseg);
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fail_0:
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fail_0:
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return error;
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return error;
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}
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}
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@ -7388,7 +7397,7 @@ wm_alloc_tx_buffer(struct wm_softc *sc, struct wm_txqueue *txq)
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return 0;
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return 0;
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fail:
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fail:
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for (i = 0; i < WM_TXQUEUELEN(txq); i++) {
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for (i = 0; i < WM_TXQUEUELEN(txq); i++) {
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if (txq->txq_soft[i].txs_dmamap != NULL)
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if (txq->txq_soft[i].txs_dmamap != NULL)
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bus_dmamap_destroy(sc->sc_dmat,
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bus_dmamap_destroy(sc->sc_dmat,
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@ -7579,7 +7588,7 @@ wm_alloc_txrx_queues(struct wm_softc *sc)
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return 0;
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return 0;
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fail_2:
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fail_2:
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for (i = 0; i < rx_done; i++) {
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for (i = 0; i < rx_done; i++) {
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struct wm_rxqueue *rxq = &sc->sc_queue[i].wmq_rxq;
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struct wm_rxqueue *rxq = &sc->sc_queue[i].wmq_rxq;
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wm_free_rx_buffer(sc, rxq);
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wm_free_rx_buffer(sc, rxq);
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@ -7587,7 +7596,7 @@ wm_alloc_txrx_queues(struct wm_softc *sc)
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if (rxq->rxq_lock)
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if (rxq->rxq_lock)
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mutex_obj_free(rxq->rxq_lock);
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mutex_obj_free(rxq->rxq_lock);
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}
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}
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fail_1:
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fail_1:
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for (i = 0; i < tx_done; i++) {
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for (i = 0; i < tx_done; i++) {
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struct wm_txqueue *txq = &sc->sc_queue[i].wmq_txq;
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struct wm_txqueue *txq = &sc->sc_queue[i].wmq_txq;
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pcq_destroy(txq->txq_interq);
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pcq_destroy(txq->txq_interq);
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@ -7599,7 +7608,7 @@ wm_alloc_txrx_queues(struct wm_softc *sc)
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kmem_free(sc->sc_queue,
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kmem_free(sc->sc_queue,
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sizeof(struct wm_queue) * sc->sc_nqueues);
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sizeof(struct wm_queue) * sc->sc_nqueues);
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fail_0:
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fail_0:
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return error;
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return error;
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}
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}
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@ -8806,12 +8815,12 @@ wm_nq_tx_offload(struct wm_softc *sc, struct wm_txqueue *txq,
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* however it does not cause problems.
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* however it does not cause problems.
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*/
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*/
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/* Fill in the context descriptor. */
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/* Fill in the context descriptor. */
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txq->txq_nq_descs[txq->txq_next].nqrx_ctx.nqtxc_vl_len =
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txq->txq_nq_descs[txq->txq_next].nqtx_ctx.nqtxc_vl_len =
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htole32(vl_len);
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htole32(vl_len);
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txq->txq_nq_descs[txq->txq_next].nqrx_ctx.nqtxc_sn = 0;
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txq->txq_nq_descs[txq->txq_next].nqtx_ctx.nqtxc_sn = 0;
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txq->txq_nq_descs[txq->txq_next].nqrx_ctx.nqtxc_cmd =
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txq->txq_nq_descs[txq->txq_next].nqtx_ctx.nqtxc_cmd =
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htole32(cmdc);
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htole32(cmdc);
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txq->txq_nq_descs[txq->txq_next].nqrx_ctx.nqtxc_mssidx =
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txq->txq_nq_descs[txq->txq_next].nqtx_ctx.nqtxc_mssidx =
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htole32(mssidx);
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htole32(mssidx);
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wm_cdtxsync(txq, txq->txq_next, 1, BUS_DMASYNC_PREWRITE);
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wm_cdtxsync(txq, txq->txq_next, 1, BUS_DMASYNC_PREWRITE);
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DPRINTF(sc, WM_DEBUG_TX,
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DPRINTF(sc, WM_DEBUG_TX,
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@ -8974,7 +8983,7 @@ wm_nq_send_common_locked(struct ifnet *ifp, struct wm_txqueue *txq,
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DPRINTF(sc, WM_DEBUG_TX,
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DPRINTF(sc, WM_DEBUG_TX,
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("%s: TX: have packet to transmit: %p\n",
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("%s: TX: have packet to transmit: %p\n",
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device_xname(sc->sc_dev), m0));
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device_xname(sc->sc_dev), m0));
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txs = &txq->txq_soft[txq->txq_snext];
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txs = &txq->txq_soft[txq->txq_snext];
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dmamap = txs->txs_dmamap;
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dmamap = txs->txs_dmamap;
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@ -10075,9 +10084,13 @@ static inline void
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wm_sched_handle_queue(struct wm_softc *sc, struct wm_queue *wmq)
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wm_sched_handle_queue(struct wm_softc *sc, struct wm_queue *wmq)
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{
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{
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if (wmq->wmq_txrx_use_workqueue)
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if (wmq->wmq_txrx_use_workqueue) {
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workqueue_enqueue(sc->sc_queue_wq, &wmq->wmq_cookie, curcpu());
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if (!wmq->wmq_wq_enqueued) {
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else
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wmq->wmq_wq_enqueued = true;
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workqueue_enqueue(sc->sc_queue_wq, &wmq->wmq_cookie,
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curcpu());
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}
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} else
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softint_schedule(wmq->wmq_si);
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softint_schedule(wmq->wmq_si);
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}
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}
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||||||
|
@ -10376,8 +10389,10 @@ wm_handle_queue_work(struct work *wk, void *context)
|
||||||
struct wm_queue *wmq = container_of(wk, struct wm_queue, wmq_cookie);
|
struct wm_queue *wmq = container_of(wk, struct wm_queue, wmq_cookie);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* "enqueued flag" is not required here.
|
* Some qemu environment workaround. They don't stop interrupt
|
||||||
|
* immediately.
|
||||||
*/
|
*/
|
||||||
|
wmq->wmq_wq_enqueued = false;
|
||||||
wm_handle_queue(wmq);
|
wm_handle_queue(wmq);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -11824,7 +11839,7 @@ wm_disable_phy_wakeup_reg_access_bm(device_t dev, uint16_t *phy_regp)
|
||||||
*/
|
*/
|
||||||
static int
|
static int
|
||||||
wm_access_phy_wakeup_reg_bm(device_t dev, int offset, int16_t *val, int rd,
|
wm_access_phy_wakeup_reg_bm(device_t dev, int offset, int16_t *val, int rd,
|
||||||
bool page_set)
|
bool page_set)
|
||||||
{
|
{
|
||||||
struct wm_softc *sc = device_private(dev);
|
struct wm_softc *sc = device_private(dev);
|
||||||
uint16_t regnum = BM_PHY_REG_NUM(offset);
|
uint16_t regnum = BM_PHY_REG_NUM(offset);
|
||||||
|
@ -12191,8 +12206,8 @@ wm_gmii_statchg(struct ifnet *ifp)
|
||||||
|
|
||||||
CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
|
CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
|
||||||
CSR_WRITE(sc, WMREG_TCTL, sc->sc_tctl);
|
CSR_WRITE(sc, WMREG_TCTL, sc->sc_tctl);
|
||||||
CSR_WRITE(sc, (sc->sc_type < WM_T_82543) ? WMREG_OLD_FCRTL
|
CSR_WRITE(sc, (sc->sc_type < WM_T_82543) ?
|
||||||
: WMREG_FCRTL, sc->sc_fcrtl);
|
WMREG_OLD_FCRTL : WMREG_FCRTL, sc->sc_fcrtl);
|
||||||
if (sc->sc_type == WM_T_80003) {
|
if (sc->sc_type == WM_T_80003) {
|
||||||
switch (IFM_SUBTYPE(mii->mii_media_active)) {
|
switch (IFM_SUBTYPE(mii->mii_media_active)) {
|
||||||
case IFM_1000_T:
|
case IFM_1000_T:
|
||||||
|
@ -14234,7 +14249,7 @@ wm_nvm_validate_checksum(struct wm_softc *sc)
|
||||||
DPRINTF(sc, WM_DEBUG_NVM,
|
DPRINTF(sc, WM_DEBUG_NVM,
|
||||||
("%s: NVM need to be updated (%04x != %04x)\n",
|
("%s: NVM need to be updated (%04x != %04x)\n",
|
||||||
device_xname(sc->sc_dev), eeprom_data,
|
device_xname(sc->sc_dev), eeprom_data,
|
||||||
valid_checksum));
|
valid_checksum));
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((sc->sc_debug & WM_DEBUG_NVM) != 0) {
|
if ((sc->sc_debug & WM_DEBUG_NVM) != 0) {
|
||||||
|
@ -15221,8 +15236,8 @@ wm_init_phy_workarounds_pchlan(struct wm_softc *sc)
|
||||||
/* Acquire PHY semaphore */
|
/* Acquire PHY semaphore */
|
||||||
rv = sc->phy.acquire(sc);
|
rv = sc->phy.acquire(sc);
|
||||||
if (rv != 0) {
|
if (rv != 0) {
|
||||||
DPRINTF(sc, WM_DEBUG_INIT, ("%s: %s: failed\n",
|
DPRINTF(sc, WM_DEBUG_INIT,
|
||||||
device_xname(sc->sc_dev), __func__));
|
("%s: %s: failed\n", device_xname(sc->sc_dev), __func__));
|
||||||
return rv;
|
return rv;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -15468,8 +15483,8 @@ wm_ulp_disable(struct wm_softc *sc)
|
||||||
/* Acquire semaphore */
|
/* Acquire semaphore */
|
||||||
rv = sc->phy.acquire(sc);
|
rv = sc->phy.acquire(sc);
|
||||||
if (rv != 0) {
|
if (rv != 0) {
|
||||||
DPRINTF(sc, WM_DEBUG_INIT, ("%s: %s: failed\n",
|
DPRINTF(sc, WM_DEBUG_INIT,
|
||||||
device_xname(sc->sc_dev), __func__));
|
("%s: %s: failed\n", device_xname(sc->sc_dev), __func__));
|
||||||
return rv;
|
return rv;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -15482,7 +15497,7 @@ wm_ulp_disable(struct wm_softc *sc)
|
||||||
uint32_t reg2;
|
uint32_t reg2;
|
||||||
|
|
||||||
aprint_debug_dev(sc->sc_dev, "%s: Force SMBus first.\n",
|
aprint_debug_dev(sc->sc_dev, "%s: Force SMBus first.\n",
|
||||||
__func__);
|
__func__);
|
||||||
reg2 = CSR_READ(sc, WMREG_CTRL_EXT);
|
reg2 = CSR_READ(sc, WMREG_CTRL_EXT);
|
||||||
reg2 |= CTRL_EXT_FORCE_SMBUS;
|
reg2 |= CTRL_EXT_FORCE_SMBUS;
|
||||||
CSR_WRITE(sc, WMREG_CTRL_EXT, reg2);
|
CSR_WRITE(sc, WMREG_CTRL_EXT, reg2);
|
||||||
|
@ -15508,7 +15523,7 @@ wm_ulp_disable(struct wm_softc *sc)
|
||||||
wm_gmii_hv_writereg_locked(sc->sc_dev, 2, HV_PM_CTRL, phyreg);
|
wm_gmii_hv_writereg_locked(sc->sc_dev, 2, HV_PM_CTRL, phyreg);
|
||||||
|
|
||||||
rv = wm_gmii_hv_readreg_locked(sc->sc_dev, 2, I218_ULP_CONFIG1,
|
rv = wm_gmii_hv_readreg_locked(sc->sc_dev, 2, I218_ULP_CONFIG1,
|
||||||
&phyreg);
|
&phyreg);
|
||||||
if (rv != 0)
|
if (rv != 0)
|
||||||
goto release;
|
goto release;
|
||||||
phyreg &= ~(I218_ULP_CONFIG1_IND
|
phyreg &= ~(I218_ULP_CONFIG1_IND
|
||||||
|
|
|
@ -1,4 +1,4 @@
|
||||||
/* $NetBSD: if_wmreg.h,v 1.98.6.15 2022/09/07 10:09:20 martin Exp $ */
|
/* $NetBSD: if_wmreg.h,v 1.98.6.16 2023/01/23 14:01:26 martin Exp $ */
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2001 Wasabi Systems, Inc.
|
* Copyright (c) 2001 Wasabi Systems, Inc.
|
||||||
|
@ -1703,7 +1703,7 @@ typedef union nq_txdesc {
|
||||||
uint32_t nqtxc_sn;
|
uint32_t nqtxc_sn;
|
||||||
uint32_t nqtxc_cmd;
|
uint32_t nqtxc_cmd;
|
||||||
uint32_t nqtxc_mssidx;
|
uint32_t nqtxc_mssidx;
|
||||||
} nqrx_ctx;
|
} nqtx_ctx;
|
||||||
} __packed nq_txdesc_t;
|
} __packed nq_txdesc_t;
|
||||||
|
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue