Get rid of eslreh.h and use ../isa/essreg.h.
Minor whitespace fixes.
This commit is contained in:
augustss
parent
d09eea2ace
commit
d535feb911
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@ -1,4 +1,4 @@
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/* $NetBSD: esl.c,v 1.2 2001/09/29 19:06:32 augustss Exp $ */
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/* $NetBSD: esl.c,v 1.3 2001/09/29 19:30:29 augustss Exp $ */
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/*
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* Copyright (c) 2001 Jared D. McNeill <jmcneill@invisible.yi.org>
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@ -54,8 +54,8 @@
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#include <dev/pcmcia/pcmciavar.h>
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#include <dev/isa/essreg.h>
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#include <dev/pcmcia/eslvar.h>
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#include <dev/pcmcia/eslreg.h>
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int esl_open(void *, int);
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void esl_close(void *);
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@ -147,15 +147,15 @@ esl_open(void *hdl, int flags)
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int i;
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if (sc->sc_esl.sc_open != 0)
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return(EBUSY);
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return (EBUSY);
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if ((*sc->sc_enable)(sc))
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return(ENXIO);
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return (ENXIO);
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if (esl_reset(sc) != 0) {
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printf("%s: esl_open: esl_reset failed\n",
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sc->sc_esl.sc_dev.dv_xname);
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return(ENXIO);
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return (ENXIO);
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}
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/* because we did a reset */
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@ -170,7 +170,7 @@ esl_open(void *hdl, int flags)
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/* XXX: Delay a bit */
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delay(10000);
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return(0);
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return (0);
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}
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@ -261,14 +261,14 @@ esl_set_params(void *hdl, int setmode, int usemode,
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if ((setmode & AUMODE_PLAY) == 0) {
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printf("%s: esl_set_params: only AUMODE_PLAY is supported\n",
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sc->sc_esl.sc_dev.dv_xname);
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return(EINVAL);
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return (EINVAL);
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}
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if (play->sample_rate < ESS_MINRATE ||
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play->sample_rate > ESS_MAXRATE ||
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(play->precision != 8 && play->precision != 16) ||
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(play->channels != 1 && play->channels != 2))
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return(EINVAL);
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return (EINVAL);
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play->factor = 1;
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play->sw_code = NULL;
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@ -290,7 +290,7 @@ esl_set_params(void *hdl, int setmode, int usemode,
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play->sw_code = alaw_to_ulinear16_le;
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break;
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default:
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return(EINVAL);
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return (EINVAL);
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}
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rate = play->sample_rate;
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@ -298,14 +298,14 @@ esl_set_params(void *hdl, int setmode, int usemode,
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esl_write_x_reg(sc, ESS_XCMD_SAMPLE_RATE, esl_srtotc(rate));
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esl_write_x_reg(sc, ESS_XCMD_FILTER_CLOCK, esl_srtofc(rate));
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return(0);
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return (0);
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}
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int
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esl_round_blocksize(void *hdl, int bs)
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{
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return((bs / 128) * 128);
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return ((bs / 128) * 128);
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}
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@ -320,21 +320,21 @@ esl_halt_output(void *hdl)
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sc->sc_esl.active = 0;
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}
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return(0);
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return (0);
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}
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int
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esl_halt_input(void *hdl)
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{
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return(0);
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return (0);
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}
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int
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esl_speaker_ctl(void *hdl, int on)
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{
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return(0);
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return (0);
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}
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int
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@ -342,7 +342,7 @@ esl_getdev(void *hdl, struct audio_device *ret)
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{
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*ret = esl_device;
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return(0);
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return (0);
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}
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int
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@ -356,7 +356,7 @@ esl_set_port(void *hdl, mixer_ctrl_t *mc)
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case ESS_DAC_PLAY_VOL:
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case ESS_SYNTH_PLAY_VOL:
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if (mc->type != AUDIO_MIXER_VALUE)
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return(EINVAL);
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return (EINVAL);
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switch(mc->un.value.num_channels) {
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case 1:
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@ -370,18 +370,18 @@ esl_set_port(void *hdl, mixer_ctrl_t *mc)
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mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]);
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break;
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default:
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return(EINVAL);
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return (EINVAL);
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}
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sc->sc_esl.gain[mc->dev][ESS_LEFT] = lgain;
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sc->sc_esl.gain[mc->dev][ESS_RIGHT] = rgain;
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esl_set_gain(sc, mc->dev, 1);
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return(0);
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return (0);
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break;
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default:
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/* FALLTHROUGH */
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}
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return(EINVAL);
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return (EINVAL);
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}
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int
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@ -405,14 +405,14 @@ esl_get_port(void *hdl, mixer_ctrl_t *mc)
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sc->sc_esl.gain[mc->dev][ESS_RIGHT];
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break;
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default:
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return(EINVAL);
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return (EINVAL);
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}
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return(0);
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return (0);
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default:
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/* FALLTHROUGH */
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}
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return(EINVAL);
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return (EINVAL);
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}
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int
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@ -427,7 +427,7 @@ esl_query_devinfo(void *hdl, mixer_devinfo_t *di)
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di->type = AUDIO_MIXER_VALUE;
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di->un.v.num_channels = 2;
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strcpy(di->un.v.units.name, AudioNvolume);
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return(0);
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return (0);
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case ESS_SYNTH_PLAY_VOL:
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di->mixer_class = ESS_INPUT_CLASS;
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di->next = di->prev = AUDIO_MIXER_LAST;
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@ -435,13 +435,13 @@ esl_query_devinfo(void *hdl, mixer_devinfo_t *di)
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di->type = AUDIO_MIXER_VALUE;
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di->un.v.num_channels = 2;
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strcpy(di->un.v.units.name, AudioNvolume);
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return(0);
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return (0);
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case ESS_INPUT_CLASS:
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di->mixer_class = ESS_INPUT_CLASS;
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di->next = di->prev = AUDIO_MIXER_LAST;
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strcpy(di->label.name, AudioCinputs);
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di->type = AUDIO_MIXER_CLASS;
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return(0);
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return (0);
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case ESS_MASTER_VOL:
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di->mixer_class = ESS_OUTPUT_CLASS;
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di->next = di->prev = AUDIO_MIXER_LAST;
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@ -449,25 +449,25 @@ esl_query_devinfo(void *hdl, mixer_devinfo_t *di)
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di->type = AUDIO_MIXER_VALUE;
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di->un.v.num_channels = 2;
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strcpy(di->un.v.units.name, AudioNvolume);
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return(0);
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return (0);
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case ESS_OUTPUT_CLASS:
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di->mixer_class = ESS_OUTPUT_CLASS;
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di->next = di->prev = AUDIO_MIXER_LAST;
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strcpy(di->label.name, AudioCoutputs);
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di->type = AUDIO_MIXER_CLASS;
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return(0);
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return (0);
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default:
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/* FALLTHROUGH */
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}
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return(ENXIO);
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return (ENXIO);
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}
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int
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esl_get_props(void *hdl)
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{
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return(AUDIO_PROP_MMAP);
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return (AUDIO_PROP_MMAP);
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}
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int
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@ -485,7 +485,7 @@ esl_trigger_output(void *hdl, void *start, void *end, int blksize,
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if (sc->sc_esl.active) {
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printf("%s: esl_trigger_output: already running\n",
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sc->sc_esl.sc_dev.dv_xname);
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return(1);
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return (1);
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}
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sc->sc_esl.active = 1;
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@ -548,7 +548,7 @@ esl_trigger_output(void *hdl, void *start, void *end, int blksize,
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sc->sc_esl.sc_dmaaddr += ESS_FIFO_SIZE;
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sc->sc_esl.sc_blkpos += ESS_FIFO_SIZE;
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return(0);
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return (0);
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}
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/* Additional subroutines used by the above (NOT required by audio(9)) */
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@ -572,17 +572,17 @@ esl_init(struct esl_pcmcia_softc *sc)
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if (esl_reset(sc)) {
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printf("%s: esl_init: esl_reset failed\n",
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sc->sc_esl.sc_dev.dv_xname);
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return(1);
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return (1);
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}
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if (esl_identify(sc)) {
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printf("%s: esl_init: esl_identify failed\n",
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sc->sc_esl.sc_dev.dv_xname);
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return(1);
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return (1);
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}
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if (!sc->sc_esl.sc_version)
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return(1); /* Probably a Sound Blaster */
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return (1); /* Probably a Sound Blaster */
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model = ESS_UNSUPPORTED;
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@ -599,7 +599,7 @@ esl_init(struct esl_pcmcia_softc *sc)
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if (model == ESS_UNSUPPORTED) {
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printf("%s: unknown model 0x%04x\n",
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sc->sc_esl.sc_dev.dv_xname, sc->sc_esl.sc_version);
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return(1);
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return (1);
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}
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printf("%s: ESS AudioDrive %s [version 0x%04x]\n",
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@ -628,7 +628,7 @@ esl_init(struct esl_pcmcia_softc *sc)
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sc->sc_esl.sc_open = 0;
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return(0);
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return (0);
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}
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int
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@ -660,7 +660,7 @@ esl_intr(void *hdl)
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sc->sc_esl.sc_dmaaddr = pos;
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}
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return(1);
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return (1);
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}
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int
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@ -673,12 +673,12 @@ esl_reset(struct esl_pcmcia_softc *sc)
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delay(10000); /* XXX: Ugly, but ess.c does this too */
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bus_space_write_1(iot, ioh, ESS_DSP_RESET, 0);
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if (esl_rdsp(sc) != ESS_MAGIC)
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return(1);
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return (1);
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/* Enable access to the extended command set */
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esl_wdsp(sc, ESS_ACMD_ENABLE_EXT);
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return(0);
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return (0);
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}
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void
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@ -773,7 +773,7 @@ esl_identify(struct esl_pcmcia_softc *sc)
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sc->sc_esl.sc_version = (reg1 << 8) + reg2;
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return(0);
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return (0);
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}
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/* Read a byte from the DSP */
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@ -787,13 +787,13 @@ esl_rdsp(struct esl_pcmcia_softc *sc)
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for (i = ESS_READ_TIMEOUT; i > 0; --i) {
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if (esl_dsp_read_ready(sc)) {
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i = bus_space_read_1(iot, ioh, ESS_DSP_READ);
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return(i);
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return (i);
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} else
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delay(10);
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}
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printf("esl_rdsp: timed out\n");
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return(-1);
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return (-1);
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}
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/* Write a byte to the DSP */
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@ -807,13 +807,13 @@ esl_wdsp(struct esl_pcmcia_softc *sc, u_char v)
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for (i = ESS_WRITE_TIMEOUT; i > 0; --i) {
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if (esl_dsp_write_ready(sc)) {
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bus_space_write_1(iot, ioh, ESS_DSP_WRITE, v);
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return(0);
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return (0);
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} else
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delay(10);
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}
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printf("esl_wdsp(0x%02x): timed out\n", v);
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return(-1);
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return (-1);
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}
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/* Get the read status of the DSP: 1 == Ready, 0 == Not Ready */
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@ -821,7 +821,7 @@ u_char
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esl_dsp_read_ready(struct esl_pcmcia_softc *sc)
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{
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return((esl_get_dsp_status(sc) & ESS_DSP_READ_READY) ? 1 : 0);
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return ((esl_get_dsp_status(sc) & ESS_DSP_READ_READY) ? 1 : 0);
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}
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/* Get the write status of the DSP: 1 == Ready, 0 == Not Ready */
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@ -829,7 +829,7 @@ u_char
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esl_dsp_write_ready(struct esl_pcmcia_softc *sc)
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{
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return((esl_get_dsp_status(sc) & ESS_DSP_WRITE_BUSY) ? 0 : 1);
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return ((esl_get_dsp_status(sc) & ESS_DSP_WRITE_BUSY) ? 0 : 1);
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}
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/* Return the status of the DSP */
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@ -837,7 +837,7 @@ u_char
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esl_get_dsp_status(struct esl_pcmcia_softc *sc)
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{
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return(bus_space_read_1(sc->sc_pcioh.iot, sc->sc_pcioh.ioh,
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return (bus_space_read_1(sc->sc_pcioh.iot, sc->sc_pcioh.ioh,
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ESS_DSP_RW_STATUS));
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}
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@ -851,7 +851,7 @@ esl_read_x_reg(struct esl_pcmcia_softc *sc, u_char reg)
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error = esl_wdsp(sc, reg);
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if (error)
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printf("esl_read_x_reg: error reading 0x%02x\n", reg);
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return(esl_rdsp(sc));
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return (esl_rdsp(sc));
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}
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/* Write a value to one of the extended registers */
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@ -863,7 +863,7 @@ esl_write_x_reg(struct esl_pcmcia_softc *sc, u_char reg, u_char val)
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if ((error = esl_wdsp(sc, reg)) == 0)
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error = esl_wdsp(sc, val);
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return(error);
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return (error);
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}
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void
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@ -901,7 +901,7 @@ esl_read_mix_reg(struct esl_pcmcia_softc *sc, u_char reg)
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splx(s);
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#endif
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return(val);
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return (val);
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}
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void
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@ -977,7 +977,7 @@ esl_srtotc(u_int rate)
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else
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tc = 256 - 795500L / rate;
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return(tc);
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return (tc);
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}
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/* Calculate the filter constant for the requested sampling rate */
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@ -986,5 +986,5 @@ esl_srtofc(u_int rate)
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{
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/* From dev/isa/ess.c:ess_srtofc() rev 1.53 */
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return(256 - 200279L / rate);
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return (256 - 200279L / rate);
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: esl_pcmcia.c,v 1.2 2001/09/29 19:06:32 augustss Exp $ */
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/* $NetBSD: esl_pcmcia.c,v 1.3 2001/09/29 19:30:29 augustss Exp $ */
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/*
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* Copyright (c) 2000 Jared D. McNeill <jmcneill@invisible.yi.org>
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@ -48,7 +48,7 @@
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#include <dev/pcmcia/pcmciavar.h>
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#include <dev/pcmcia/pcmciadevs.h>
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#include <dev/pcmcia/eslreg.h>
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#include <dev/isa/essreg.h>
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#include <dev/pcmcia/eslvar.h>
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static const struct esl_pcmcia_product {
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@ -99,7 +99,7 @@ esl_pcmcia_match(struct device *parent, struct cfdata *match, void *aux)
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for (i = 0; i < ESL_NDEVS; i++)
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if (esl_pcmcia_product_lookup(pa->card, pa->pf->number, i))
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return(2);
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return (2);
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return (0);
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}
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@ -196,14 +196,14 @@ esl_pcmcia_detach(struct device *self, int flags)
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if (esc->sc_io_window == -1)
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/* Nothing to detach */
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return(0);
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return (0);
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if (esc->sc_opldev != NULL)
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config_detach(esc->sc_opldev, flags);
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if (esc->sc_audiodev != NULL)
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rv = config_detach(esc->sc_audiodev, flags);
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if (rv)
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return(rv);
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return (rv);
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/* unmap i/o window and i/o space */
|
||||
pcmcia_io_unmap(esc->sc_pf, esc->sc_io_window);
|
||||
|
|
@ -228,12 +228,12 @@ esl_pcmcia_enable(struct esl_pcmcia_softc *sc)
|
|||
if (pcmcia_function_enable(sc->sc_pf))
|
||||
goto fail_2;
|
||||
|
||||
return(0);
|
||||
return (0);
|
||||
|
||||
fail_2:
|
||||
pcmcia_intr_disestablish(sc->sc_pf, sc->sc_ih);
|
||||
fail_1:
|
||||
return(1);
|
||||
return (1);
|
||||
}
|
||||
|
||||
void
|
||||
|
|
|
|||
|
|
@ -1,308 +0,0 @@
|
|||
/* $NetBSD: eslreg.h,v 1.1 2001/09/29 14:00:57 augustss Exp $ */
|
||||
/*
|
||||
* Copyright 1997
|
||||
* Digital Equipment Corporation. All rights reserved.
|
||||
*
|
||||
* This software is furnished under license and may be used and
|
||||
* copied only in accordance with the following terms and conditions.
|
||||
* Subject to these conditions, you may download, copy, install,
|
||||
* use, modify and distribute this software in source and/or binary
|
||||
* form. No title or ownership is transferred hereby.
|
||||
*
|
||||
* 1) Any source code used, modified or distributed must reproduce
|
||||
* and retain this copyright notice and list of conditions as
|
||||
* they appear in the source file.
|
||||
*
|
||||
* 2) No right is granted to use any trade name, trademark, or logo of
|
||||
* Digital Equipment Corporation. Neither the "Digital Equipment
|
||||
* Corporation" name nor any trademark or logo of Digital Equipment
|
||||
* Corporation may be used to endorse or promote products derived
|
||||
* from this software without the prior written permission of
|
||||
* Digital Equipment Corporation.
|
||||
*
|
||||
* 3) This software is provided "AS-IS" and any express or implied
|
||||
* warranties, including but not limited to, any implied warranties
|
||||
* of merchantability, fitness for a particular purpose, or
|
||||
* non-infringement are disclaimed. In no event shall DIGITAL be
|
||||
* liable for any damages whatsoever, and in particular, DIGITAL
|
||||
* shall not be liable for special, indirect, consequential, or
|
||||
* incidental damages or damages for lost profits, loss of
|
||||
* revenue or loss of use, whether such damages arise in contract,
|
||||
* negligence, tort, under statute, in equity, at law or otherwise,
|
||||
* even if advised of the possibility of such damage.
|
||||
*/
|
||||
|
||||
/*
|
||||
** @(#) $RCSfile: eslreg.h,v $ $Revision: 1.1 $ (SHARK) $Date: 2001/09/29 14:00:57 $
|
||||
**
|
||||
**++
|
||||
**
|
||||
** essreg.h
|
||||
**
|
||||
** FACILITY:
|
||||
**
|
||||
** DIGITAL Network Appliance Reference Design (DNARD)
|
||||
**
|
||||
** MODULE DESCRIPTION:
|
||||
**
|
||||
** This module contains the constant definitions for the device
|
||||
** registers on the ESS Technologies 1888/1887/888 sound chip.
|
||||
**
|
||||
** AUTHORS:
|
||||
**
|
||||
** Blair Fidler Software Engineering Australia
|
||||
** Gold Coast, Australia.
|
||||
**
|
||||
** CREATION DATE:
|
||||
**
|
||||
** March 10, 1997.
|
||||
**
|
||||
** MODIFICATION HISTORY:
|
||||
**
|
||||
**--
|
||||
*/
|
||||
|
||||
/*
|
||||
* DSP commands. This unit handles MIDI and audio capabilities.
|
||||
* The DSP can be reset, data/commands can be read or written to it,
|
||||
* and it can generate interrupts. Interrupts are generated for MIDI
|
||||
* input or DMA completion. They seem to have neglected the fact
|
||||
* that it would be nice to have a MIDI transmission complete interrupt.
|
||||
* Worse, the DMA engine is half-duplex. This means you need to do
|
||||
* (timed) programmed I/O to be able to record and play simulataneously.
|
||||
*/
|
||||
#define ESS_ACMD_DAC8WRITE 0x10 /* direct-mode 8-bit DAC write */
|
||||
#define ESS_ACMD_DAC16WRITE 0x11 /* direct-mode 16-bit DAC write */
|
||||
#define ESS_ACMD_DMA8OUT 0x14 /* 8-bit linear DMA output */
|
||||
#define ESS_ACMD_DMA16OUT 0x15 /* 16-bit linear DMA output */
|
||||
#define ESS_ACMD_AUTODMA8OUT 0x1C /* auto-init 8-bit linear DMA output */
|
||||
#define ESS_ACMD_AUTODMA16OUT 0x1D /* auto-init 16-bit linear DMA output */
|
||||
#define ESS_ACMD_ADC8READ 0x20 /* direct-mode 8-bit ADC read */
|
||||
#define ESS_ACMD_ADC16READ 0x21 /* direct-mode 16-bit ADC read */
|
||||
#define ESS_ACMD_DMA8IN 0x24 /* 8-bit linear DMA input */
|
||||
#define ESS_ACMD_DMA16IN 0x25 /* 16-bit linear DMA input */
|
||||
#define ESS_ACMD_AUTODMA8IN 0x2C /* auto-init 8-bit linear DMA input */
|
||||
#define ESS_ACMD_AUTODMA16IN 0x2D /* auto-init 16-bit linear DMA input */
|
||||
#define ESS_ACMD_SETTIMECONST1 0x40 /* set time constant (1MHz base) */
|
||||
#define ESS_ACMD_SETTIMECONST15 0x41 /* set time constant (1.5MHz base) */
|
||||
#define ESS_ACMD_SETFILTER 0x42 /* set filter clock independently */
|
||||
#define ESS_ACMD_BLOCKSIZE 0x48 /* set blk size for high speed xfer */
|
||||
|
||||
#define ESS_ACMD_DMA4OUT 0x74 /* 4-bit ADPCM DMA output */
|
||||
#define ESS_ACMD_DMA4OUTREF 0x75 /* 4-bit ADPCM DMA output with ref */
|
||||
#define ESS_ACMD_DMA2_6OUT 0x76 /* 2.6-bit ADPCM DMA output */
|
||||
#define ESS_ACMD_DMA2_6OUTREF 0x77 /* 2.6-bit ADPCM DMA output with ref */
|
||||
#define ESS_ACMD_DMA2OUT 0x7A /* 2-bit ADPCM DMA output */
|
||||
#define ESS_ACMD_DMA2OUTREF 0x7B /* 2-bit ADPCM DMA output with ref */
|
||||
#define ESS_ACMD_SILENCEOUT 0x80 /* output a block of silence */
|
||||
#define ESS_ACMD_START_AUTO_OUT 0x90 /* start auto-init 8-bit DMA output */
|
||||
#define ESS_ACMD_START_OUT 0x91 /* start 8-bit DMA output */
|
||||
#define ESS_ACMD_START_AUTO_IN 0x98 /* start auto-init 8-bit DMA input */
|
||||
#define ESS_ACMD_START_IN 0x99 /* start 8-bit DMA input */
|
||||
|
||||
#define ESS_XCMD_SAMPLE_RATE 0xA1 /* sample rate for Audio1 channel */
|
||||
#define ESS_XCMD_FILTER_CLOCK 0xA2 /* filter clock for Audio1 channel*/
|
||||
#define ESS_XCMD_XFER_COUNTLO 0xA4 /* */
|
||||
#define ESS_XCMD_XFER_COUNTHI 0xA5 /* */
|
||||
#define ESS_XCMD_AUDIO_CTRL 0xA8 /* */
|
||||
#define ESS_AUDIO_CTRL_MONITOR 0x08 /* 0=disable/1=enable */
|
||||
#define ESS_AUDIO_CTRL_MONO 0x02 /* 0=disable/1=enable */
|
||||
#define ESS_AUDIO_CTRL_STEREO 0x01 /* 0=disable/1=enable */
|
||||
#define ESS_XCMD_PREAMP_CTRL 0xA9 /* */
|
||||
#define ESS_PREAMP_CTRL_ENABLE 0x04
|
||||
|
||||
#define ESS_XCMD_IRQ_CTRL 0xB1 /* legacy audio interrupt control */
|
||||
#define ESS_IRQ_CTRL_INTRA 0x00
|
||||
#define ESS_IRQ_CTRL_INTRB 0x04
|
||||
#define ESS_IRQ_CTRL_INTRC 0x08
|
||||
#define ESS_IRQ_CTRL_INTRD 0x0C
|
||||
#define ESS_IRQ_CTRL_MASK 0x10
|
||||
#define ESS_IRQ_CTRL_EXT 0x40
|
||||
#define ESS_XCMD_DRQ_CTRL 0xB2 /* audio DRQ control */
|
||||
#define ESS_DRQ_CTRL_DRQA 0x04
|
||||
#define ESS_DRQ_CTRL_DRQB 0x08
|
||||
#define ESS_DRQ_CTRL_DRQC 0x0C
|
||||
#define ESS_DRQ_CTRL_PU 0x10
|
||||
#define ESS_DRQ_CTRL_EXT 0x40
|
||||
#define ESS_XCMD_VOLIN_CTRL 0xB4 /* stereo input volume control */
|
||||
#define ESS_1788_XCMD_AUDIO_CTRL0 0xB6
|
||||
#define ESS_CTRL0_SIGNED 0x00
|
||||
#define ESS_CTRL0_UNSIGNED 0x80
|
||||
#define ESS_XCMD_AUDIO1_CTRL1 0xB7 /* */
|
||||
#define ESS_AUDIO1_CTRL1_FIFO_CONNECT 0x80 /* 1=connected */
|
||||
#define ESS_AUDIO1_CTRL1_FIFO_MONO 0x40 /* 0=stereo/1=mono */
|
||||
#define ESS_AUDIO1_CTRL1_FIFO_SIGNED 0x20 /* 0=unsigned/1=signed */
|
||||
#define ESS_AUDIO1_CTRL1_FIFO_STEREO 0x08 /* 0=mono/1=stereo */
|
||||
#define ESS_AUDIO1_CTRL1_FIFO_SIZE 0x04 /* 0=8-bit/1=16-bit */
|
||||
#define ESS_XCMD_AUDIO1_CTRL2 0xB8 /* */
|
||||
#define ESS_AUDIO1_CTRL2_FIFO_ENABLE 0x01 /* 0=disable/1=enable */
|
||||
#define ESS_AUDIO1_CTRL2_DMA_READ 0x02 /* 0=DMA write/1=DMA read */
|
||||
#define ESS_AUDIO1_CTRL2_AUTO_INIT 0x04
|
||||
#define ESS_AUDIO1_CTRL2_ADC_ENABLE 0x08 /* 0=DAC mode/1=ADC mode */
|
||||
#define ESS_XCMD_DEMAND_CTRL 0xB9 /* */
|
||||
#define ESS_DEMAND_CTRL_SINGLE 0x00 /* 1-byte transfers */
|
||||
#define ESS_DEMAND_CTRL_DEMAND_2 0x01 /* 2-byte transfers */
|
||||
#define ESS_DEMAND_CTRL_DEMAND_4 0x02 /* 4-byte transfers */
|
||||
|
||||
#define ESS_ACMD_ENABLE_EXT 0xC6 /* enable ESS extension commands */
|
||||
#define ESS_ACMD_DISABLE_EXT 0xC7 /* enable ESS extension commands */
|
||||
|
||||
#define ESS_ACMD_PAUSE_DMA 0xD0 /* pause DMA */
|
||||
#define ESS_ACMD_ENABLE_SPKR 0xD1 /* enable Audio1 DAC input to mixer */
|
||||
#define ESS_ACMD_DISABLE_SPKR 0xD3 /* disable Audio1 DAC input to mixer */
|
||||
#define ESS_ACMD_CONT_DMA 0xD4 /* continue paused DMA */
|
||||
#define ESS_ACMD_SPKR_STATUS 0xD8 /* return Audio1 DAC status: */
|
||||
#define ESS_SPKR_OFF 0x00
|
||||
#define ESS_SPKR_ON 0xFF
|
||||
#define ESS_ACMD_VERSION 0xE1 /* get version number */
|
||||
#define ESS_ACMD_LEGACY_ID 0xE7 /* get legacy ES688/ES1688 ID bytes */
|
||||
|
||||
#define ESS_MINRATE 4000
|
||||
#define ESS_MAXRATE 44100
|
||||
|
||||
/*
|
||||
* Macros to detect valid hardware configuration data.
|
||||
*/
|
||||
#define ESS_BASE_VALID(base) ((base) == 0x220 || (base) == 0x230 || (base) == 0x240 || (base) == 0x250)
|
||||
|
||||
#define ESS_IRQ1_VALID(irq) ((irq) == 5 || (irq) == 7 || (irq) == 9 || (irq) == 10)
|
||||
|
||||
#define ESS_IRQ2_VALID(irq) ((irq) == 15)
|
||||
|
||||
#define ESS_IRQ12_VALID(irq) ((irq) == 5 || (irq) == 7 || (irq) == 9 || (irq) == 10 || (irq) == 15)
|
||||
|
||||
#define ESS_DRQ1_VALID(chan) ((chan) == 0 || (chan) == 1 || (chan) == 3)
|
||||
|
||||
#define ESS_DRQ2_VALID(chan) ((chan) == 0 || (chan) == 1 || (chan) == 3 || (chan) == 5)
|
||||
|
||||
#define ESS_USE_AUDIO1(model) (((model) == ESS_1788) || ((model) == ESS_1868) || ((model) == ESS_1878) || ((model) == ESS_1869) || ((model) == ESS_1879))
|
||||
|
||||
/*
|
||||
* Macros to manipulate gain values
|
||||
*/
|
||||
#define ESS_4BIT_GAIN(x) ((x) & 0xf0)
|
||||
#define ESS_3BIT_GAIN(x) (((x) & 0xe0) >> 1)
|
||||
#define ESS_STEREO_GAIN(l, r) ((l) | ((r) >> 4))
|
||||
#define ESS_MONO_GAIN(x) ((x) >> 4)
|
||||
|
||||
#ifdef ESS_AMODE_LOW
|
||||
/*
|
||||
* Registers used to configure ESS chip via Read Key Sequence
|
||||
*/
|
||||
#define ESS_CONFIG_KEY_BASE 0x229
|
||||
#define ESS_CONFIG_KEY_PORTS 3
|
||||
#else
|
||||
/*
|
||||
* Registers used to configure ESS chip via System Control Register (SCR)
|
||||
*/
|
||||
#define ESS_SCR_ACCESS_BASE 0xF9
|
||||
#define ESS_SCR_ACCESS_PORTS 3
|
||||
#define ESS_SCR_LOCK 0
|
||||
#define ESS_SCR_UNLOCK 2
|
||||
|
||||
#define ESS_SCR_BASE 0xE0
|
||||
#define ESS_SCR_PORTS 2
|
||||
#define ESS_SCR_INDEX 0
|
||||
#define ESS_SCR_DATA 1
|
||||
|
||||
/*
|
||||
* Bit definitions for SCR
|
||||
*/
|
||||
#define ESS_SCR_AUDIO_ENABLE 0x04
|
||||
#define ESS_SCR_AUDIO_220 0x00
|
||||
#define ESS_SCR_AUDIO_230 0x01
|
||||
#define ESS_SCR_AUDIO_240 0x02
|
||||
#define ESS_SCR_AUDIO_250 0x03
|
||||
#endif
|
||||
|
||||
/*****************************************************************************/
|
||||
/* DSP Timeout Definitions */
|
||||
/*****************************************************************************/
|
||||
#define ESS_READ_TIMEOUT 5000 /* number of times to try a read, 5ms*/
|
||||
#define ESS_WRITE_TIMEOUT 5000 /* number of times to try a write, 5ms */
|
||||
|
||||
|
||||
#define ESS_NPORT 16
|
||||
#define ESS_DSP_RESET 0x06
|
||||
#define ESS_RESET_EXT 0x03 /* reset and use second DMA */
|
||||
#define ESS_MAGIC 0xAA /* response to successful reset */
|
||||
|
||||
#define ESS_DSP_READ 0x0A
|
||||
#define ESS_DSP_WRITE 0x0C
|
||||
|
||||
#define ESS_CLEAR_INTR 0x0E
|
||||
|
||||
#define ESS_FIFO_WRITE 0x0F
|
||||
|
||||
#define ESS_DSP_RW_STATUS 0x0C
|
||||
#define ESS_DSP_WRITE_BUSY 0x80
|
||||
#define ESS_DSP_READ_READY 0x40
|
||||
#define ESS_DSP_READ_FULL 0x20 /* FIFO full */
|
||||
#define ESS_DSP_READ_EMPTY 0x10 /* FIFO empty */
|
||||
#define ESS_DSP_READ_HALF 0x08 /* FIFO half-empty */
|
||||
#define ESS_DSP_READ_IRQ 0x04 /* IRQ generated */
|
||||
#define ESS_DSP_READ_HALF_IRQ 0x02 /* " from half-empty flag change */
|
||||
#define ESS_DSP_READ_OFLOW 0x01 /* " from DMA counter overflow */
|
||||
#define ESS_DSP_READ_ANYIRQ (ESS_DSP_READ_IRQ | \
|
||||
ESS_DSP_READ_HALF_IRQ | \
|
||||
ESS_DSP_READ_OFLOW)
|
||||
|
||||
#define ESS_MIX_REG_SELECT 0x04
|
||||
#define ESS_MIX_REG_DATA 0x05
|
||||
#define ESS_MIX_RESET 0x00 /* mixer reset port and value */
|
||||
|
||||
|
||||
/*
|
||||
* ESS Mixer registers
|
||||
*/
|
||||
#define ESS_MREG_VOLUME_VOICE 0x14
|
||||
#define ESS_MREG_VOLUME_MIC 0x1A
|
||||
#define ESS_MREG_ADC_SOURCE 0x1C
|
||||
#define ESS_SOURCE_MIC 0x00
|
||||
#define ESS_SOURCE_CD 0x02
|
||||
#define ESS_SOURCE_LINE 0x06
|
||||
#define ESS_SOURCE_MIXER 0x07
|
||||
#define ESS_MREG_VOLUME_MASTER 0x32
|
||||
#define ESS_MREG_VOLUME_SYNTH 0x36
|
||||
#define ESS_MREG_VOLUME_CD 0x38
|
||||
#define ESS_MREG_VOLUME_AUXB 0x3A
|
||||
#define ESS_MREG_VOLUME_PCSPKR 0x3C
|
||||
#define ESS_MREG_VOLUME_LINE 0x3E
|
||||
#define ESS_MREG_VOLUME_LEFT 0x60
|
||||
#define ESS_MREG_VOLUME_RIGHT 0x62
|
||||
#define ESS_VOLUME_MUTE 0x40
|
||||
#define ESS_MREG_VOLUME_CTRL 0x64
|
||||
#define ESS_MREG_SAMPLE_RATE 0x70 /* sample rate for Audio2 channel */
|
||||
#define ESS_MREG_FILTER_CLOCK 0x72 /* filter clock for Audio2 channel */
|
||||
#define ESS_MREG_XFER_COUNTLO 0x74 /* low-byte of DMA transfer size */
|
||||
#define ESS_MREG_XFER_COUNTHI 0x76 /* high-byte of DMA transfer size */
|
||||
#define ESS_MREG_AUDIO2_CTRL1 0x78 /* control register 1 for Audio2: */
|
||||
#define ESS_AUDIO2_CTRL1_SINGLE 0x00
|
||||
#define ESS_AUDIO2_CTRL1_DEMAND_2 0x40
|
||||
#define ESS_AUDIO2_CTRL1_DEMAND_4 0x80
|
||||
#define ESS_AUDIO2_CTRL1_DEMAND_8 0xC0
|
||||
#define ESS_AUDIO2_CTRL1_XFER_SIZE 0x20 /* 0=8-bit/1=16-bit */
|
||||
#define ESS_AUDIO2_CTRL1_AUTO_INIT 0x10
|
||||
#define ESS_AUDIO2_CTRL1_FIFO_ENABLE 0x02 /* 0=disable/1=enable */
|
||||
#define ESS_AUDIO2_CTRL1_DAC_ENABLE 0x01 /* 0=disable/1=enable */
|
||||
#define ESS_MREG_AUDIO2_CTRL2 0x7A /* control register 2 for Audio2: */
|
||||
#define ESS_AUDIO2_CTRL2_FIFO_SIZE 0x01 /* 0=8-bit/1=16-bit */
|
||||
#define ESS_AUDIO2_CTRL2_CHANNELS 0x02 /* 0=mono/1=stereo */
|
||||
#define ESS_AUDIO2_CTRL2_FIFO_SIGNED 0x04 /* 0=unsigned/1=signed */
|
||||
#define ESS_AUDIO2_CTRL2_DMA_ENABLE 0x20 /* 0=disable/1=enable */
|
||||
#define ESS_AUDIO2_CTRL2_IRQ2_ENABLE 0x40
|
||||
#define ESS_AUDIO2_CTRL2_IRQ_LATCH 0x80
|
||||
#define ESS_MREG_AUDIO2_CTRL3 0x7D
|
||||
#define ESS_AUDIO2_CTRL3_DRQA 0x00
|
||||
#define ESS_AUDIO2_CTRL3_DRQB 0x01
|
||||
#define ESS_AUDIO2_CTRL3_DRQC 0x02
|
||||
#define ESS_AUDIO2_CTRL3_DRQD 0x03
|
||||
#define ESS_AUDIO2_CTRL3_DRQ_PD 0x04
|
||||
#define ESS_MREG_INTR_ST 0x7F
|
||||
#define ESS_IS_SELECT_IRQ 0x01
|
||||
#define ESS_IS_ES1888 0x00
|
||||
#define ESS_IS_INTRA 0x02
|
||||
#define ESS_IS_INTRB 0x04
|
||||
#define ESS_IS_INTRC 0x06
|
||||
#define ESS_IS_INTRD 0x08
|
||||
#define ESS_IS_INTRE 0x0A
|
||||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: eslvar.h,v 1.1 2001/09/29 14:00:57 augustss Exp $ */
|
||||
/* $NetBSD: eslvar.h,v 1.2 2001/09/29 19:30:29 augustss Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001 Jared D. McNeill <jmcneill@invisible.yi.org>
|
||||
|
|
@ -61,7 +61,7 @@ struct esl_softc
|
|||
#define ESS_RIGHT 1
|
||||
|
||||
u_long nintr; /* number of interrupts */
|
||||
void (*intr)__P((void *)); /* ISR for FIFO Half-Empty */
|
||||
void (*intr)(void *); /* ISR for FIFO Half-Empty */
|
||||
void *arg; /* argument for intr() */
|
||||
|
||||
/* Pseudo-DMA state vars */
|
||||
|
|
@ -84,9 +84,9 @@ struct esl_pcmcia_softc {
|
|||
struct device *sc_audiodev;
|
||||
struct device *sc_opldev;
|
||||
|
||||
int (*sc_enable) __P((struct esl_pcmcia_softc *));
|
||||
void (*sc_disable) __P((struct esl_pcmcia_softc *));
|
||||
int (*sc_enable)(struct esl_pcmcia_softc *);
|
||||
void (*sc_disable)(struct esl_pcmcia_softc *);
|
||||
};
|
||||
|
||||
int esl_init __P((struct esl_pcmcia_softc *sc));
|
||||
int esl_intr __P((void *));
|
||||
int esl_init(struct esl_pcmcia_softc *sc);
|
||||
int esl_intr(void *);
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: opl_esl.c,v 1.2 2001/09/29 19:06:33 augustss Exp $ */
|
||||
/* $NetBSD: opl_esl.c,v 1.3 2001/09/29 19:30:29 augustss Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001 Jared D. McNeill <jmcneill@invisible.yi.org>
|
||||
|
|
@ -73,12 +73,12 @@ opl_esl_match(struct device *parent, struct cfdata *match, void *aux)
|
|||
struct opl_softc sc;
|
||||
|
||||
if (aa->type != AUDIODEV_TYPE_OPL)
|
||||
return(0);
|
||||
return (0);
|
||||
memset(&sc, 0, sizeof(sc));
|
||||
sc.iot = ssc->sc_pcioh.iot;
|
||||
sc.ioh = ssc->sc_pcioh.ioh;
|
||||
|
||||
return(opl_find(&sc));
|
||||
return (opl_find(&sc));
|
||||
}
|
||||
|
||||
void
|
||||
|
|
@ -103,5 +103,5 @@ opl_esl_detach(struct device *self, int flags)
|
|||
|
||||
rv = opl_detach(sc, flags);
|
||||
|
||||
return(rv);
|
||||
return (rv);
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue