Use shared armv7_generic_space
This commit is contained in:
parent
c154fb0a46
commit
d52192759c
@ -1,4 +1,4 @@
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/* $NetBSD: amlogic_board.c,v 1.9 2015/03/08 12:44:55 jmcneill Exp $ */
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/* $NetBSD: amlogic_board.c,v 1.10 2015/03/29 22:49:44 jmcneill Exp $ */
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/*-
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* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
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@ -29,7 +29,7 @@
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#include "opt_amlogic.h"
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: amlogic_board.c,v 1.9 2015/03/08 12:44:55 jmcneill Exp $");
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__KERNEL_RCSID(0, "$NetBSD: amlogic_board.c,v 1.10 2015/03/29 22:49:44 jmcneill Exp $");
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#define _ARM32_BUS_DMA_PRIVATE
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#include <sys/param.h>
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@ -55,14 +55,14 @@ struct arm32_bus_dma_tag amlogic_dma_tag = {
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};
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#define CBUS_READ(x) \
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bus_space_read_4(&amlogic_bs_tag, amlogic_core_bsh, \
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bus_space_read_4(&armv7_generic_bs_tag, amlogic_core_bsh, \
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AMLOGIC_CBUS_OFFSET + (x))
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#define CBUS_WRITE(x, v) \
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bus_space_write_4(&amlogic_bs_tag, amlogic_core_bsh, \
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bus_space_write_4(&armv7_generic_bs_tag, amlogic_core_bsh, \
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AMLOGIC_CBUS_OFFSET + (x), (v))
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#define CBUS_SET_CLEAR(x, s, c) \
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amlogic_reg_set_clear(&amlogic_bs_tag, amlogic_core_bsh, \
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amlogic_reg_set_clear(&armv7_generic_bs_tag, amlogic_core_bsh, \
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AMLOGIC_CBUS_OFFSET + (x), (s), (c))
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void
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@ -70,7 +70,7 @@ amlogic_bootstrap(void)
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{
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int error;
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error = bus_space_map(&amlogic_bs_tag, AMLOGIC_CORE_BASE,
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error = bus_space_map(&armv7_generic_bs_tag, AMLOGIC_CORE_BASE,
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AMLOGIC_CORE_SIZE, 0, &amlogic_core_bsh);
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if (error)
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panic("%s: failed to map CORE registers: %d", __func__, error);
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@ -260,7 +260,7 @@ amlogic_usbphy_clkgate_enable(int port)
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void
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amlogic_usbphy_init(int port)
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{
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bus_space_tag_t bst = &amlogic_bs_tag;
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bus_space_tag_t bst = &armv7_generic_bs_tag;
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bus_space_handle_t bsh = amlogic_core_bsh;
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bus_size_t ctrl_reg, cfg_reg, adp_bc_reg, gpioao_reg;
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uint32_t ctrl, cfg, adp_bc, gpioao;
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@ -1,4 +1,4 @@
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/* $NetBSD: amlogic_cpufreq.c,v 1.2 2015/03/17 22:29:40 jmcneill Exp $ */
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/* $NetBSD: amlogic_cpufreq.c,v 1.3 2015/03/29 22:49:44 jmcneill Exp $ */
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/*-
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* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
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@ -31,7 +31,7 @@
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#include "opt_amlogic.h"
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: amlogic_cpufreq.c,v 1.2 2015/03/17 22:29:40 jmcneill Exp $");
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__KERNEL_RCSID(0, "$NetBSD: amlogic_cpufreq.c,v 1.3 2015/03/29 22:49:44 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/bus.h>
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@ -68,10 +68,10 @@ static u_int meson8b_cpu_get_rate(void);
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static size_t meson8b_cpu_get_available(u_int *, size_t);
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#define CBUS_READ(x) \
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bus_space_read_4(&amlogic_bs_tag, amlogic_core_bsh, \
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bus_space_read_4(&armv7_generic_bs_tag, amlogic_core_bsh, \
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AMLOGIC_CBUS_OFFSET + (x))
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#define CBUS_WRITE(x, v) \
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bus_space_write_4(&amlogic_bs_tag, amlogic_core_bsh, \
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bus_space_write_4(&armv7_generic_bs_tag, amlogic_core_bsh, \
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AMLOGIC_CBUS_OFFSET + (x), (v))
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void
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@ -1,4 +1,4 @@
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/* $NetBSD: amlogic_io.c,v 1.8 2015/03/22 17:28:22 jmcneill Exp $ */
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/* $NetBSD: amlogic_io.c,v 1.9 2015/03/29 22:49:44 jmcneill Exp $ */
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/*-
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* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
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@ -29,7 +29,7 @@
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#include "opt_amlogic.h"
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: amlogic_io.c,v 1.8 2015/03/22 17:28:22 jmcneill Exp $");
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__KERNEL_RCSID(0, "$NetBSD: amlogic_io.c,v 1.9 2015/03/29 22:49:44 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -107,8 +107,8 @@ amlogicio_attach(device_t parent, device_t self, void *aux)
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loc++) {
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struct amlogicio_attach_args aio = {
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.aio_loc = *loc,
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.aio_core_bst = &amlogic_bs_tag,
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.aio_core_a4x_bst = &amlogic_a4x_bs_tag,
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.aio_core_bst = &armv7_generic_bs_tag,
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.aio_core_a4x_bst = &armv7_generic_a4x_bs_tag,
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.aio_bsh = amlogic_core_bsh,
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.aio_dmat = &amlogic_dma_tag,
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};
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@ -1,416 +0,0 @@
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/* $NetBSD: amlogic_space.c,v 1.2 2015/02/25 13:52:42 joerg Exp $ */
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/*-
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* Copyright (c) 2012 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Nick Hudson
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: amlogic_space.c,v 1.2 2015/02/25 13:52:42 joerg Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <uvm/uvm_extern.h>
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#include <sys/bus.h>
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/* Prototypes for all the bus_space structure functions */
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bs_protos(amlogic);
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bs_protos(amlogic_a4x);
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bs_protos(a4x);
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bs_protos(bs_notimpl);
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bs_protos(generic);
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bs_protos(generic_armv4);
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#if __ARMEB__
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#define NSWAP(n) n ## _swap
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#else
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#define NSWAP(n) n
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#endif
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struct bus_space amlogic_bs_tag = {
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/* cookie */
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(void *) 0,
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/* mapping/unmapping */
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amlogic_bs_map,
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amlogic_bs_unmap,
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amlogic_bs_subregion,
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/* allocation/deallocation */
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amlogic_bs_alloc, /* not implemented */
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amlogic_bs_free, /* not implemented */
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/* get kernel virtual address */
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amlogic_bs_vaddr,
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/* mmap */
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amlogic_bs_mmap,
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/* barrier */
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amlogic_bs_barrier,
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/* read (single) */
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generic_bs_r_1,
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NSWAP(generic_armv4_bs_r_2),
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NSWAP(generic_bs_r_4),
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bs_notimpl_bs_r_8,
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/* read multiple */
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generic_bs_rm_1,
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NSWAP(generic_armv4_bs_rm_2),
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NSWAP(generic_bs_rm_4),
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bs_notimpl_bs_rm_8,
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/* read region */
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generic_bs_rr_1,
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NSWAP(generic_armv4_bs_rr_2),
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NSWAP(generic_bs_rr_4),
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bs_notimpl_bs_rr_8,
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/* write (single) */
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generic_bs_w_1,
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NSWAP(generic_armv4_bs_w_2),
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NSWAP(generic_bs_w_4),
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bs_notimpl_bs_w_8,
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/* write multiple */
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generic_bs_wm_1,
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NSWAP(generic_armv4_bs_wm_2),
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NSWAP(generic_bs_wm_4),
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bs_notimpl_bs_wm_8,
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/* write region */
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generic_bs_wr_1,
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NSWAP(generic_armv4_bs_wr_2),
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NSWAP(generic_bs_wr_4),
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bs_notimpl_bs_wr_8,
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/* set multiple */
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bs_notimpl_bs_sm_1,
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bs_notimpl_bs_sm_2,
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bs_notimpl_bs_sm_4,
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bs_notimpl_bs_sm_8,
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/* set region */
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generic_bs_sr_1,
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NSWAP(generic_armv4_bs_sr_2),
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bs_notimpl_bs_sr_4,
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bs_notimpl_bs_sr_8,
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/* copy */
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bs_notimpl_bs_c_1,
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generic_armv4_bs_c_2,
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bs_notimpl_bs_c_4,
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bs_notimpl_bs_c_8,
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#ifdef __BUS_SPACE_HAS_STREAM_METHODS
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/* read (single) */
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generic_bs_r_1,
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NSWAP(generic_armv4_bs_r_2),
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NSWAP(generic_bs_r_4),
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bs_notimpl_bs_r_8,
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/* read multiple */
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generic_bs_rm_1,
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NSWAP(generic_armv4_bs_rm_2),
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NSWAP(generic_bs_rm_4),
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bs_notimpl_bs_rm_8,
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/* read region */
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generic_bs_rr_1,
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NSWAP(generic_armv4_bs_rr_2),
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NSWAP(generic_bs_rr_4),
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bs_notimpl_bs_rr_8,
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/* write (single) */
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generic_bs_w_1,
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NSWAP(generic_armv4_bs_w_2),
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NSWAP(generic_bs_w_4),
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bs_notimpl_bs_w_8,
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/* write multiple */
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generic_bs_wm_1,
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NSWAP(generic_armv4_bs_wm_2),
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NSWAP(generic_bs_wm_4),
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bs_notimpl_bs_wm_8,
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/* write region */
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generic_bs_wr_1,
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NSWAP(generic_armv4_bs_wr_2),
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NSWAP(generic_bs_wr_4),
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bs_notimpl_bs_wr_8,
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#endif
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};
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struct bus_space amlogic_a4x_bs_tag = {
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/* cookie */
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(void *) 0,
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/* mapping/unmapping */
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amlogic_bs_map,
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amlogic_bs_unmap,
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amlogic_a4x_bs_subregion,
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/* allocation/deallocation */
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amlogic_bs_alloc, /* not implemented */
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amlogic_bs_free, /* not implemented */
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/* get kernel virtual address */
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amlogic_bs_vaddr,
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/* mmap */
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amlogic_a4x_bs_mmap,
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/* barrier */
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amlogic_bs_barrier,
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/* read (single) */
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a4x_bs_r_1,
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NSWAP(a4x_bs_r_2),
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NSWAP(a4x_bs_r_4),
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bs_notimpl_bs_r_8,
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/* read multiple */
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a4x_bs_rm_1,
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NSWAP(a4x_bs_rm_2),
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NSWAP(a4x_bs_rm_4),
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bs_notimpl_bs_rm_8,
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/* read region */
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bs_notimpl_bs_rr_1,
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bs_notimpl_bs_rr_2,
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bs_notimpl_bs_rr_4,
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bs_notimpl_bs_rr_8,
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/* write (single) */
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a4x_bs_w_1,
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NSWAP(a4x_bs_w_2),
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NSWAP(a4x_bs_w_4),
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bs_notimpl_bs_w_8,
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/* write multiple */
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a4x_bs_wm_1,
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NSWAP(a4x_bs_wm_2),
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NSWAP(a4x_bs_wm_4),
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bs_notimpl_bs_wm_8,
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/* write region */
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bs_notimpl_bs_wr_1,
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bs_notimpl_bs_wr_2,
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bs_notimpl_bs_wr_4,
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bs_notimpl_bs_wr_8,
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/* set multiple */
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bs_notimpl_bs_sm_1,
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bs_notimpl_bs_sm_2,
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bs_notimpl_bs_sm_4,
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bs_notimpl_bs_sm_8,
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/* set region */
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bs_notimpl_bs_sr_1,
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bs_notimpl_bs_sr_2,
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bs_notimpl_bs_sr_4,
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bs_notimpl_bs_sr_8,
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/* copy */
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bs_notimpl_bs_c_1,
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bs_notimpl_bs_c_2,
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bs_notimpl_bs_c_4,
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bs_notimpl_bs_c_8,
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#ifdef __BUS_SPACE_HAS_STREAM_METHODS
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/* read (single) */
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a4x_bs_r_1,
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NSWAP(a4x_bs_r_2),
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NSWAP(a4x_bs_r_4),
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bs_notimpl_bs_r_8,
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/* read multiple */
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a4x_bs_rm_1,
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NSWAP(a4x_bs_rm_2),
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NSWAP(a4x_bs_rm_4),
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bs_notimpl_bs_rm_8,
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/* read region */
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a4x_bs_rr_1,
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NSWAP(a4x_bs_rr_2),
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NSWAP(a4x_bs_rr_4),
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bs_notimpl_bs_rr_8,
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/* write (single) */
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a4x_bs_w_1,
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NSWAP(a4x_bs_w_2),
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NSWAP(a4x_bs_w_4),
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bs_notimpl_bs_w_8,
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/* write multiple */
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a4x_bs_wm_1,
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NSWAP(a4x_bs_wm_2),
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NSWAP(a4x_bs_wm_4),
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bs_notimpl_bs_wm_8,
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/* write region */
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a4x_bs_wr_1,
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NSWAP(a4x_bs_wr_2),
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NSWAP(a4x_bs_wr_4),
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bs_notimpl_bs_wr_8,
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#endif
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};
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int
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amlogic_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flag,
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bus_space_handle_t *bshp)
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{
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u_long startpa, endpa, pa;
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const struct pmap_devmap *pd;
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vaddr_t va;
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if ((pd = pmap_devmap_find_pa(bpa, size)) != NULL) {
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/* Device was statically mapped. */
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*bshp = pd->pd_va + (bpa - pd->pd_pa);
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return 0;
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}
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startpa = trunc_page(bpa);
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endpa = round_page(bpa + size);
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/* XXX use extent manager to check duplicate mapping */
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va = uvm_km_alloc(kernel_map, endpa - startpa, 0,
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UVM_KMF_VAONLY | UVM_KMF_NOWAIT | UVM_KMF_COLORMATCH);
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if (!va)
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return ENOMEM;
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*bshp = (bus_space_handle_t)(va + (bpa - startpa));
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const int pmapflags =
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(flag & (BUS_SPACE_MAP_CACHEABLE|BUS_SPACE_MAP_PREFETCHABLE))
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? 0
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: PMAP_NOCACHE;
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for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
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pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, pmapflags);
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}
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pmap_update(pmap_kernel());
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return 0;
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}
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void
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amlogic_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
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{
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vaddr_t va;
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vsize_t sz;
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if (pmap_devmap_find_va(bsh, size) != NULL) {
|
||||
/* Device was statically mapped; nothing to do. */
|
||||
return;
|
||||
}
|
||||
|
||||
va = trunc_page(bsh);
|
||||
sz = round_page(bsh + size) - va;
|
||||
|
||||
pmap_kremove(va, sz);
|
||||
pmap_update(pmap_kernel());
|
||||
uvm_km_free(kernel_map, va, sz, UVM_KMF_VAONLY);
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
amlogic_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
|
||||
bus_size_t size, bus_space_handle_t *nbshp)
|
||||
{
|
||||
|
||||
*nbshp = bsh + offset;
|
||||
return (0);
|
||||
}
|
||||
|
||||
int
|
||||
amlogic_a4x_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
|
||||
bus_size_t size, bus_space_handle_t *nbshp)
|
||||
{
|
||||
|
||||
*nbshp = bsh + 4 * offset;
|
||||
return (0);
|
||||
}
|
||||
|
||||
void
|
||||
amlogic_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
|
||||
bus_size_t len, int flags)
|
||||
{
|
||||
flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
|
||||
|
||||
if (flags)
|
||||
arm_dsb();
|
||||
}
|
||||
|
||||
void *
|
||||
amlogic_bs_vaddr(void *t, bus_space_handle_t bsh)
|
||||
{
|
||||
|
||||
return (void *)bsh;
|
||||
}
|
||||
|
||||
paddr_t
|
||||
amlogic_bs_mmap(void *t, bus_addr_t bpa, off_t offset, int prot, int flags)
|
||||
{
|
||||
paddr_t bus_flags = 0;
|
||||
|
||||
if (flags & BUS_SPACE_MAP_PREFETCHABLE)
|
||||
bus_flags |= ARM32_MMAP_WRITECOMBINE;
|
||||
|
||||
return (arm_btop(bpa + offset) | bus_flags);
|
||||
}
|
||||
|
||||
paddr_t
|
||||
amlogic_a4x_bs_mmap(void *t, bus_addr_t bpa, off_t offset, int prot, int flags)
|
||||
{
|
||||
paddr_t bus_flags = 0;
|
||||
|
||||
if (flags & BUS_SPACE_MAP_PREFETCHABLE)
|
||||
bus_flags |= ARM32_MMAP_WRITECOMBINE;
|
||||
|
||||
return (arm_btop(bpa + 4 * offset) | bus_flags);
|
||||
}
|
||||
|
||||
int
|
||||
amlogic_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
|
||||
bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
|
||||
bus_addr_t *bpap, bus_space_handle_t *bshp)
|
||||
{
|
||||
|
||||
panic("%s(): not implemented\n", __func__);
|
||||
}
|
||||
|
||||
void
|
||||
amlogic_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
|
||||
{
|
||||
|
||||
panic("%s(): not implemented\n", __func__);
|
||||
}
|
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: amlogic_var.h,v 1.8 2015/03/21 01:17:00 jmcneill Exp $ */
|
||||
/* $NetBSD: amlogic_var.h,v 1.9 2015/03/29 22:49:44 jmcneill Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
|
||||
@ -49,8 +49,8 @@ struct amlogicio_attach_args {
|
||||
bus_dma_tag_t aio_dmat;
|
||||
};
|
||||
|
||||
extern struct bus_space amlogic_bs_tag;
|
||||
extern struct bus_space amlogic_a4x_bs_tag;
|
||||
extern struct bus_space armv7_generic_bs_tag;
|
||||
extern struct bus_space armv7_generic_a4x_bs_tag;
|
||||
extern bus_space_handle_t amlogic_core_bsh;
|
||||
extern struct arm32_bus_dma_tag amlogic_dma_tag;
|
||||
|
||||
|
@ -1,4 +1,4 @@
|
||||
# $NetBSD: files.amlogic,v 1.9 2015/03/22 17:28:22 jmcneill Exp $
|
||||
# $NetBSD: files.amlogic,v 1.10 2015/03/29 22:49:44 jmcneill Exp $
|
||||
#
|
||||
# Configuration info for Amlogic ARM Peripherals
|
||||
#
|
||||
@ -10,11 +10,11 @@ file arch/arm/arm32/arm32_boot.c
|
||||
file arch/arm/arm32/arm32_kvminit.c
|
||||
file arch/arm/arm32/arm32_reboot.c
|
||||
file arch/arm/arm32/irq_dispatch.S
|
||||
file arch/arm/arm32/armv7_generic_space.c
|
||||
file arch/arm/arm/bus_space_a4x.S
|
||||
|
||||
file arch/arm/amlogic/amlogic_board.c
|
||||
file arch/arm/amlogic/amlogic_cpufreq.c
|
||||
file arch/arm/amlogic/amlogic_space.c
|
||||
file arch/arm/arm/bus_space_a4x.S
|
||||
|
||||
# On-board I/O
|
||||
device amlogicio { [port=-1] } : bus_space_generic
|
||||
|
@ -1,4 +1,4 @@
|
||||
# $NetBSD: files.rockchip,v 1.10 2015/01/17 15:05:24 jmcneill Exp $
|
||||
# $NetBSD: files.rockchip,v 1.11 2015/03/29 22:56:23 jmcneill Exp $
|
||||
#
|
||||
# Configuration info for Rockchip ARM Peripherals
|
||||
#
|
||||
@ -10,13 +10,12 @@ file arch/arm/arm32/arm32_boot.c
|
||||
file arch/arm/arm32/arm32_kvminit.c
|
||||
file arch/arm/arm32/arm32_reboot.c
|
||||
file arch/arm/arm32/irq_dispatch.S
|
||||
file arch/arm/arm32/armv7_generic_space.c
|
||||
file arch/arm/arm/bus_space_a4x.S
|
||||
|
||||
file arch/arm/rockchip/rockchip_board.c
|
||||
file arch/arm/rockchip/rockchip_cpufreq.c
|
||||
file arch/arm/rockchip/rockchip_space.c obio
|
||||
#file arch/arm/rockchip/rockchip_a4x_space.c obio
|
||||
file arch/arm/rockchip/rockchip_dma.c
|
||||
file arch/arm/arm/bus_space_a4x.S obio
|
||||
|
||||
# On-board I/O
|
||||
device obio {[addr = -1], [size = -1], [width = -1], [intr = -1], [mult = 1], [port = -1], [crit = 0]}: bus_space_generic
|
||||
|
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: obio.c,v 1.17 2015/01/17 15:05:24 jmcneill Exp $ */
|
||||
/* $NetBSD: obio.c,v 1.18 2015/03/29 22:56:23 jmcneill Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
|
||||
@ -38,7 +38,7 @@
|
||||
#include "opt_rockchip.h"
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.17 2015/01/17 15:05:24 jmcneill Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.18 2015/03/29 22:56:23 jmcneill Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
@ -167,15 +167,15 @@ obio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
|
||||
obio.obio_port = cf->cf_loc[OBIOCF_PORT];
|
||||
obio.obio_dmat = &rockchip_bus_dma_tag;
|
||||
|
||||
bus_space_subregion(&rockchip_bs_tag, rockchip_core1_bsh,
|
||||
bus_space_subregion(&armv7_generic_bs_tag, rockchip_core1_bsh,
|
||||
ROCKCHIP_GRF_OFFSET, ROCKCHIP_GRF_SIZE, &obio.obio_grf_bsh);
|
||||
|
||||
switch (cf->cf_loc[OBIOCF_MULT]) {
|
||||
case 1:
|
||||
obio.obio_bst = &rockchip_bs_tag;
|
||||
obio.obio_bst = &armv7_generic_bs_tag;
|
||||
break;
|
||||
case 4:
|
||||
obio.obio_bst = &rockchip_a4x_bs_tag;
|
||||
obio.obio_bst = &armv7_generic_a4x_bs_tag;
|
||||
break;
|
||||
default:
|
||||
panic("Unsupported EMIFS multiplier.");
|
||||
@ -336,7 +336,7 @@ static void
|
||||
obio_grf_set(uint32_t offset, uint32_t value)
|
||||
{
|
||||
bus_space_handle_t bh;
|
||||
bus_space_tag_t bt = &rockchip_bs_tag;
|
||||
bus_space_tag_t bt = &armv7_generic_bs_tag;
|
||||
uint32_t old, new;
|
||||
|
||||
bus_space_subregion(bt, rockchip_core1_bsh, ROCKCHIP_GRF_OFFSET,
|
||||
@ -356,7 +356,7 @@ static int
|
||||
obio_gpio_set_out(u_int unit, u_int pin, u_int value)
|
||||
{
|
||||
bus_space_handle_t bh;
|
||||
bus_space_tag_t bt = &rockchip_bs_tag;
|
||||
bus_space_tag_t bt = &armv7_generic_bs_tag;
|
||||
uint32_t gpio_base = 0, gpio_size = 0;
|
||||
uint32_t old, new;
|
||||
|
||||
|
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: rockchip_board.c,v 1.13 2015/01/17 15:05:24 jmcneill Exp $ */
|
||||
/* $NetBSD: rockchip_board.c,v 1.14 2015/03/29 22:56:23 jmcneill Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2014 Jared D. McNeill <jmcneill@invisible.ca>
|
||||
@ -29,7 +29,7 @@
|
||||
#include "opt_rockchip.h"
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: rockchip_board.c,v 1.13 2015/01/17 15:05:24 jmcneill Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: rockchip_board.c,v 1.14 2015/03/29 22:56:23 jmcneill Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/bus.h>
|
||||
@ -51,12 +51,12 @@ rockchip_bootstrap(void)
|
||||
{
|
||||
int error;
|
||||
|
||||
error = bus_space_map(&rockchip_bs_tag, ROCKCHIP_CORE0_BASE,
|
||||
error = bus_space_map(&armv7_generic_bs_tag, ROCKCHIP_CORE0_BASE,
|
||||
ROCKCHIP_CORE0_SIZE, 0, &rockchip_core0_bsh);
|
||||
if (error)
|
||||
panic("%s: failed to map CORE0 registers: %d", __func__, error);
|
||||
|
||||
error = bus_space_map(&rockchip_bs_tag, ROCKCHIP_CORE1_BASE,
|
||||
error = bus_space_map(&armv7_generic_bs_tag, ROCKCHIP_CORE1_BASE,
|
||||
ROCKCHIP_CORE1_SIZE, 0, &rockchip_core1_bsh);
|
||||
if (error)
|
||||
panic("%s: failed to map CORE1 registers: %d", __func__, error);
|
||||
@ -100,14 +100,14 @@ rockchip_chip_name(void)
|
||||
static void
|
||||
rockchip_get_cru_bsh(bus_space_handle_t *pbsh)
|
||||
{
|
||||
bus_space_subregion(&rockchip_bs_tag, rockchip_core1_bsh,
|
||||
bus_space_subregion(&armv7_generic_bs_tag, rockchip_core1_bsh,
|
||||
ROCKCHIP_CRU_OFFSET, ROCKCHIP_CRU_SIZE, pbsh);
|
||||
}
|
||||
|
||||
static u_int
|
||||
rockchip_pll_get_rate(bus_size_t con0_reg, bus_size_t con1_reg)
|
||||
{
|
||||
bus_space_tag_t bst = &rockchip_bs_tag;
|
||||
bus_space_tag_t bst = &armv7_generic_bs_tag;
|
||||
bus_space_handle_t bsh;
|
||||
uint32_t pll_con0, pll_con1;
|
||||
uint32_t nr, nf, no;
|
||||
@ -169,7 +169,7 @@ rockchip_apll_get_rate(void)
|
||||
u_int
|
||||
rockchip_cpu_get_rate(void)
|
||||
{
|
||||
bus_space_tag_t bst = &rockchip_bs_tag;
|
||||
bus_space_tag_t bst = &armv7_generic_bs_tag;
|
||||
bus_space_handle_t bsh;
|
||||
uint32_t clksel_con0;
|
||||
u_int a9_core_div;
|
||||
@ -205,7 +205,7 @@ rockchip_cpu_get_rate(void)
|
||||
u_int
|
||||
rockchip_a9periph_get_rate(void)
|
||||
{
|
||||
bus_space_tag_t bst = &rockchip_bs_tag;
|
||||
bus_space_tag_t bst = &armv7_generic_bs_tag;
|
||||
bus_space_handle_t bsh;
|
||||
uint32_t clksel_con0;
|
||||
u_int core_peri_div;
|
||||
@ -222,7 +222,7 @@ rockchip_a9periph_get_rate(void)
|
||||
u_int
|
||||
rockchip_pclk_cpu_get_rate(void)
|
||||
{
|
||||
bus_space_tag_t bst = &rockchip_bs_tag;
|
||||
bus_space_tag_t bst = &armv7_generic_bs_tag;
|
||||
bus_space_handle_t bsh;
|
||||
uint32_t clksel_con1;
|
||||
u_int aclk_div, core_axi_div, pclk_div;
|
||||
@ -260,7 +260,7 @@ rockchip_pclk_cpu_get_rate(void)
|
||||
u_int
|
||||
rockchip_ahb_get_rate(void)
|
||||
{
|
||||
bus_space_tag_t bst = &rockchip_bs_tag;
|
||||
bus_space_tag_t bst = &armv7_generic_bs_tag;
|
||||
bus_space_handle_t bsh;
|
||||
uint32_t clksel_con10;
|
||||
uint32_t hclk_div, aclk_div;
|
||||
@ -302,7 +302,7 @@ rockchip_ahb_get_rate(void)
|
||||
u_int
|
||||
rockchip_apb_get_rate(void)
|
||||
{
|
||||
bus_space_tag_t bst = &rockchip_bs_tag;
|
||||
bus_space_tag_t bst = &armv7_generic_bs_tag;
|
||||
bus_space_handle_t bsh;
|
||||
uint32_t clksel_con10;
|
||||
uint32_t pclk_div, aclk_div;
|
||||
@ -342,7 +342,7 @@ rockchip_apb_get_rate(void)
|
||||
u_int
|
||||
rockchip_mmc0_get_rate(void)
|
||||
{
|
||||
bus_space_tag_t bst = &rockchip_bs_tag;
|
||||
bus_space_tag_t bst = &armv7_generic_bs_tag;
|
||||
bus_space_handle_t bsh;
|
||||
uint32_t clksel_con11;
|
||||
u_int mmc0_div;
|
||||
@ -360,7 +360,7 @@ rockchip_mmc0_get_rate(void)
|
||||
u_int
|
||||
rockchip_mmc0_set_div(u_int div)
|
||||
{
|
||||
bus_space_tag_t bst = &rockchip_bs_tag;
|
||||
bus_space_tag_t bst = &armv7_generic_bs_tag;
|
||||
bus_space_handle_t bsh;
|
||||
uint32_t clksel_con11;
|
||||
|
||||
@ -404,7 +404,7 @@ rockchip_i2c_get_rate(u_int port)
|
||||
u_int
|
||||
rockchip_mac_get_rate(void)
|
||||
{
|
||||
bus_space_tag_t bst = &rockchip_bs_tag;
|
||||
bus_space_tag_t bst = &armv7_generic_bs_tag;
|
||||
bus_space_handle_t bsh;
|
||||
uint32_t clksel_con21;
|
||||
u_int mac_div;
|
||||
@ -425,7 +425,7 @@ rockchip_mac_get_rate(void)
|
||||
u_int
|
||||
rockchip_mac_set_rate(u_int rate)
|
||||
{
|
||||
bus_space_tag_t bst = &rockchip_bs_tag;
|
||||
bus_space_tag_t bst = &armv7_generic_bs_tag;
|
||||
bus_space_handle_t bsh;
|
||||
uint32_t clksel_con21;
|
||||
u_int dpll_rate, gpll_rate;
|
||||
|
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: rockchip_cpufreq.c,v 1.2 2015/01/17 15:05:24 jmcneill Exp $ */
|
||||
/* $NetBSD: rockchip_cpufreq.c,v 1.3 2015/03/29 22:56:23 jmcneill Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
|
||||
@ -30,7 +30,7 @@
|
||||
#include "act8846pm.h"
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: rockchip_cpufreq.c,v 1.2 2015/01/17 15:05:24 jmcneill Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: rockchip_cpufreq.c,v 1.3 2015/03/29 22:56:23 jmcneill Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/bus.h>
|
||||
@ -51,7 +51,7 @@ __KERNEL_RCSID(0, "$NetBSD: rockchip_cpufreq.c,v 1.2 2015/01/17 15:05:24 jmcneil
|
||||
|
||||
#include <arm/cortex/a9tmr_var.h>
|
||||
|
||||
static bus_space_tag_t bst = &rockchip_bs_tag;
|
||||
static bus_space_tag_t bst = &armv7_generic_bs_tag;
|
||||
static bus_space_handle_t cru_bsh;
|
||||
static bus_space_handle_t grf_bsh;
|
||||
|
||||
|
@ -1,416 +0,0 @@
|
||||
/* $NetBSD: rockchip_space.c,v 1.2 2015/02/25 13:52:42 joerg Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2012 The NetBSD Foundation, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This code is derived from software contributed to The NetBSD Foundation
|
||||
* by Nick Hudson
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: rockchip_space.c,v 1.2 2015/02/25 13:52:42 joerg Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
||||
#include <uvm/uvm_extern.h>
|
||||
|
||||
#include <sys/bus.h>
|
||||
|
||||
/* Prototypes for all the bus_space structure functions */
|
||||
bs_protos(rockchip);
|
||||
bs_protos(rockchip_a4x);
|
||||
bs_protos(a4x);
|
||||
bs_protos(bs_notimpl);
|
||||
bs_protos(generic);
|
||||
bs_protos(generic_armv4);
|
||||
|
||||
#if __ARMEB__
|
||||
#define NSWAP(n) n ## _swap
|
||||
#else
|
||||
#define NSWAP(n) n
|
||||
#endif
|
||||
|
||||
struct bus_space rockchip_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
rockchip_bs_map,
|
||||
rockchip_bs_unmap,
|
||||
rockchip_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
rockchip_bs_alloc, /* not implemented */
|
||||
rockchip_bs_free, /* not implemented */
|
||||
|
||||
/* get kernel virtual address */
|
||||
rockchip_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
rockchip_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
rockchip_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
NSWAP(generic_armv4_bs_r_2),
|
||||
NSWAP(generic_bs_r_4),
|
||||
bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
NSWAP(generic_armv4_bs_rm_2),
|
||||
NSWAP(generic_bs_rm_4),
|
||||
bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
NSWAP(generic_armv4_bs_rr_2),
|
||||
NSWAP(generic_bs_rr_4),
|
||||
bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
NSWAP(generic_armv4_bs_w_2),
|
||||
NSWAP(generic_bs_w_4),
|
||||
bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
NSWAP(generic_armv4_bs_wm_2),
|
||||
NSWAP(generic_bs_wm_4),
|
||||
bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
NSWAP(generic_armv4_bs_wr_2),
|
||||
NSWAP(generic_bs_wr_4),
|
||||
bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
generic_bs_sr_1,
|
||||
NSWAP(generic_armv4_bs_sr_2),
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
NSWAP(generic_armv4_bs_r_2),
|
||||
NSWAP(generic_bs_r_4),
|
||||
bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
NSWAP(generic_armv4_bs_rm_2),
|
||||
NSWAP(generic_bs_rm_4),
|
||||
bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
NSWAP(generic_armv4_bs_rr_2),
|
||||
NSWAP(generic_bs_rr_4),
|
||||
bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
NSWAP(generic_armv4_bs_w_2),
|
||||
NSWAP(generic_bs_w_4),
|
||||
bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
NSWAP(generic_armv4_bs_wm_2),
|
||||
NSWAP(generic_bs_wm_4),
|
||||
bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
NSWAP(generic_armv4_bs_wr_2),
|
||||
NSWAP(generic_bs_wr_4),
|
||||
bs_notimpl_bs_wr_8,
|
||||
#endif
|
||||
};
|
||||
|
||||
struct bus_space rockchip_a4x_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
rockchip_bs_map,
|
||||
rockchip_bs_unmap,
|
||||
rockchip_a4x_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
rockchip_bs_alloc, /* not implemented */
|
||||
rockchip_bs_free, /* not implemented */
|
||||
|
||||
/* get kernel virtual address */
|
||||
rockchip_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
rockchip_a4x_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
rockchip_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
a4x_bs_r_1,
|
||||
NSWAP(a4x_bs_r_2),
|
||||
NSWAP(a4x_bs_r_4),
|
||||
bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
a4x_bs_rm_1,
|
||||
NSWAP(a4x_bs_rm_2),
|
||||
NSWAP(a4x_bs_rm_4),
|
||||
bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
a4x_bs_w_1,
|
||||
NSWAP(a4x_bs_w_2),
|
||||
NSWAP(a4x_bs_w_4),
|
||||
bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
a4x_bs_wm_1,
|
||||
NSWAP(a4x_bs_wm_2),
|
||||
NSWAP(a4x_bs_wm_4),
|
||||
bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
/* read (single) */
|
||||
a4x_bs_r_1,
|
||||
NSWAP(a4x_bs_r_2),
|
||||
NSWAP(a4x_bs_r_4),
|
||||
bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
a4x_bs_rm_1,
|
||||
NSWAP(a4x_bs_rm_2),
|
||||
NSWAP(a4x_bs_rm_4),
|
||||
bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
a4x_bs_rr_1,
|
||||
NSWAP(a4x_bs_rr_2),
|
||||
NSWAP(a4x_bs_rr_4),
|
||||
bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
a4x_bs_w_1,
|
||||
NSWAP(a4x_bs_w_2),
|
||||
NSWAP(a4x_bs_w_4),
|
||||
bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
a4x_bs_wm_1,
|
||||
NSWAP(a4x_bs_wm_2),
|
||||
NSWAP(a4x_bs_wm_4),
|
||||
bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
a4x_bs_wr_1,
|
||||
NSWAP(a4x_bs_wr_2),
|
||||
NSWAP(a4x_bs_wr_4),
|
||||
bs_notimpl_bs_wr_8,
|
||||
#endif
|
||||
};
|
||||
|
||||
int
|
||||
rockchip_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flag,
|
||||
bus_space_handle_t *bshp)
|
||||
{
|
||||
u_long startpa, endpa, pa;
|
||||
const struct pmap_devmap *pd;
|
||||
vaddr_t va;
|
||||
|
||||
if ((pd = pmap_devmap_find_pa(bpa, size)) != NULL) {
|
||||
/* Device was statically mapped. */
|
||||
*bshp = pd->pd_va + (bpa - pd->pd_pa);
|
||||
return 0;
|
||||
}
|
||||
|
||||
startpa = trunc_page(bpa);
|
||||
endpa = round_page(bpa + size);
|
||||
|
||||
/* XXX use extent manager to check duplicate mapping */
|
||||
|
||||
va = uvm_km_alloc(kernel_map, endpa - startpa, 0,
|
||||
UVM_KMF_VAONLY | UVM_KMF_NOWAIT | UVM_KMF_COLORMATCH);
|
||||
if (!va)
|
||||
return ENOMEM;
|
||||
|
||||
*bshp = (bus_space_handle_t)(va + (bpa - startpa));
|
||||
|
||||
const int pmapflags =
|
||||
(flag & (BUS_SPACE_MAP_CACHEABLE|BUS_SPACE_MAP_PREFETCHABLE))
|
||||
? 0
|
||||
: PMAP_NOCACHE;
|
||||
for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
|
||||
pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, pmapflags);
|
||||
}
|
||||
pmap_update(pmap_kernel());
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void
|
||||
rockchip_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
|
||||
{
|
||||
vaddr_t va;
|
||||
vsize_t sz;
|
||||
|
||||
if (pmap_devmap_find_va(bsh, size) != NULL) {
|
||||
/* Device was statically mapped; nothing to do. */
|
||||
return;
|
||||
}
|
||||
|
||||
va = trunc_page(bsh);
|
||||
sz = round_page(bsh + size) - va;
|
||||
|
||||
pmap_kremove(va, sz);
|
||||
pmap_update(pmap_kernel());
|
||||
uvm_km_free(kernel_map, va, sz, UVM_KMF_VAONLY);
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
rockchip_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
|
||||
bus_size_t size, bus_space_handle_t *nbshp)
|
||||
{
|
||||
|
||||
*nbshp = bsh + offset;
|
||||
return (0);
|
||||
}
|
||||
|
||||
int
|
||||
rockchip_a4x_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
|
||||
bus_size_t size, bus_space_handle_t *nbshp)
|
||||
{
|
||||
|
||||
*nbshp = bsh + 4 * offset;
|
||||
return (0);
|
||||
}
|
||||
|
||||
void
|
||||
rockchip_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
|
||||
bus_size_t len, int flags)
|
||||
{
|
||||
flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
|
||||
|
||||
if (flags)
|
||||
arm_dsb();
|
||||
}
|
||||
|
||||
void *
|
||||
rockchip_bs_vaddr(void *t, bus_space_handle_t bsh)
|
||||
{
|
||||
|
||||
return (void *)bsh;
|
||||
}
|
||||
|
||||
paddr_t
|
||||
rockchip_bs_mmap(void *t, bus_addr_t bpa, off_t offset, int prot, int flags)
|
||||
{
|
||||
paddr_t bus_flags = 0;
|
||||
|
||||
if (flags & BUS_SPACE_MAP_PREFETCHABLE)
|
||||
bus_flags |= ARM32_MMAP_WRITECOMBINE;
|
||||
|
||||
return (arm_btop(bpa + offset) | bus_flags);
|
||||
}
|
||||
|
||||
paddr_t
|
||||
rockchip_a4x_bs_mmap(void *t, bus_addr_t bpa, off_t offset, int prot, int flags)
|
||||
{
|
||||
paddr_t bus_flags = 0;
|
||||
|
||||
if (flags & BUS_SPACE_MAP_PREFETCHABLE)
|
||||
bus_flags |= ARM32_MMAP_WRITECOMBINE;
|
||||
|
||||
return (arm_btop(bpa + 4 * offset) | bus_flags);
|
||||
}
|
||||
|
||||
int
|
||||
rockchip_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
|
||||
bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
|
||||
bus_addr_t *bpap, bus_space_handle_t *bshp)
|
||||
{
|
||||
|
||||
panic("%s(): not implemented\n", __func__);
|
||||
}
|
||||
|
||||
void
|
||||
rockchip_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
|
||||
{
|
||||
|
||||
panic("%s(): not implemented\n", __func__);
|
||||
}
|
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: rockchip_var.h,v 1.12 2015/01/17 15:05:24 jmcneill Exp $ */
|
||||
/* $NetBSD: rockchip_var.h,v 1.13 2015/03/29 22:56:23 jmcneill Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2014 The NetBSD Foundation, Inc.
|
||||
@ -52,8 +52,8 @@ struct obio_attach_args {
|
||||
const char *obio_name;
|
||||
};
|
||||
|
||||
extern struct bus_space rockchip_bs_tag;
|
||||
extern struct bus_space rockchip_a4x_bs_tag;
|
||||
extern struct bus_space armv7_generic_bs_tag;
|
||||
extern struct bus_space armv7_generic_a4x_bs_tag;
|
||||
extern struct arm32_bus_dma_tag rockchip_bus_dma_tag;
|
||||
extern bus_space_handle_t rockchip_core0_bsh;
|
||||
extern bus_space_handle_t rockchip_core1_bsh;
|
||||
|
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: amlogic_machdep.c,v 1.18 2015/03/22 13:53:33 jmcneill Exp $ */
|
||||
/* $NetBSD: amlogic_machdep.c,v 1.19 2015/03/29 22:49:44 jmcneill Exp $ */
|
||||
|
||||
/*
|
||||
* Machine dependent functions for kernel setup for TI OSK5912 board.
|
||||
@ -125,7 +125,7 @@
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: amlogic_machdep.c,v 1.18 2015/03/22 13:53:33 jmcneill Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: amlogic_machdep.c,v 1.19 2015/03/29 22:49:44 jmcneill Exp $");
|
||||
|
||||
#include "opt_machdep.h"
|
||||
#include "opt_ddb.h"
|
||||
@ -300,7 +300,7 @@ amlogic_get_ram_size(void)
|
||||
{
|
||||
const bus_space_handle_t ao_bsh =
|
||||
AMLOGIC_CORE_VBASE + AMLOGIC_SRAM_OFFSET;
|
||||
return bus_space_read_4(&amlogic_bs_tag, ao_bsh, 0) << 20;
|
||||
return bus_space_read_4(&armv7_generic_bs_tag, ao_bsh, 0) << 20;
|
||||
}
|
||||
|
||||
/*
|
||||
@ -334,8 +334,8 @@ initarm(void *arg)
|
||||
if (cbar) {
|
||||
const bus_space_handle_t scu_bsh =
|
||||
cbar - AMLOGIC_CORE_BASE + AMLOGIC_CORE_VBASE;
|
||||
uint32_t scu_cfg = bus_space_read_4(&amlogic_bs_tag, scu_bsh,
|
||||
SCU_CFG);
|
||||
uint32_t scu_cfg = bus_space_read_4(&armv7_generic_bs_tag,
|
||||
scu_bsh, SCU_CFG);
|
||||
arm_cpu_max = (scu_cfg & SCU_CFG_CPUMAX) + 1;
|
||||
membar_producer();
|
||||
}
|
||||
@ -356,7 +356,7 @@ initarm(void *arg)
|
||||
DPRINTF(" l2cc");
|
||||
const bus_space_handle_t pl310_bh =
|
||||
AMLOGIC_CORE_VBASE + AMLOGIC_PL310_OFFSET;
|
||||
arml2cc_init(&amlogic_bs_tag, pl310_bh, 0);
|
||||
arml2cc_init(&armv7_generic_bs_tag, pl310_bh, 0);
|
||||
#endif
|
||||
|
||||
DPRINTF(" cbar=%#x", armreg_cbar_read());
|
||||
@ -473,7 +473,7 @@ consinit(void)
|
||||
#if NAMLOGIC_COM > 0
|
||||
const bus_space_handle_t bsh =
|
||||
AMLOGIC_CORE_VBASE + (consaddr - AMLOGIC_CORE_BASE);
|
||||
amlogic_com_cnattach(&amlogic_bs_tag, bsh, conspeed, conmode);
|
||||
amlogic_com_cnattach(&armv7_generic_bs_tag, bsh, conspeed, conmode);
|
||||
#else
|
||||
#error only UART console is supported
|
||||
#endif
|
||||
@ -482,7 +482,7 @@ consinit(void)
|
||||
void
|
||||
amlogic_reset(void)
|
||||
{
|
||||
bus_space_tag_t bst = &amlogic_bs_tag;
|
||||
bus_space_tag_t bst = &armv7_generic_bs_tag;
|
||||
bus_space_handle_t bsh = amlogic_core_bsh;
|
||||
bus_size_t off = AMLOGIC_CBUS_OFFSET;
|
||||
|
||||
@ -503,7 +503,7 @@ amlogic_device_register(device_t self, void *aux)
|
||||
if (device_is_a(self, "armperiph")
|
||||
&& device_is_a(device_parent(self), "mainbus")) {
|
||||
struct mainbus_attach_args * const mb = aux;
|
||||
mb->mb_iot = &amlogic_bs_tag;
|
||||
mb->mb_iot = &armv7_generic_bs_tag;
|
||||
return;
|
||||
}
|
||||
|
||||
@ -581,7 +581,7 @@ static void
|
||||
amlogic_mpinit_cpu(int cpu)
|
||||
{
|
||||
const bus_addr_t cbar = armreg_cbar_read();
|
||||
bus_space_tag_t bst = &amlogic_bs_tag;
|
||||
bus_space_tag_t bst = &armv7_generic_bs_tag;
|
||||
const bus_space_handle_t scu_bsh =
|
||||
cbar - AMLOGIC_CORE_BASE + AMLOGIC_CORE_VBASE;
|
||||
const bus_space_handle_t ao_bsh =
|
||||
@ -637,7 +637,7 @@ void
|
||||
amlogic_mpinit(uint32_t mpinit_vec)
|
||||
{
|
||||
const bus_addr_t cbar = armreg_cbar_read();
|
||||
bus_space_tag_t bst = &amlogic_bs_tag;
|
||||
bus_space_tag_t bst = &armv7_generic_bs_tag;
|
||||
volatile int i;
|
||||
uint32_t ctrl, hatched = 0;
|
||||
int cpu;
|
||||
|
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: rockchip_machdep.c,v 1.21 2015/01/17 17:30:26 jmcneill Exp $ */
|
||||
/* $NetBSD: rockchip_machdep.c,v 1.22 2015/03/29 22:56:23 jmcneill Exp $ */
|
||||
|
||||
/*
|
||||
* Machine dependent functions for kernel setup for TI OSK5912 board.
|
||||
@ -125,7 +125,7 @@
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: rockchip_machdep.c,v 1.21 2015/01/17 17:30:26 jmcneill Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: rockchip_machdep.c,v 1.22 2015/03/29 22:56:23 jmcneill Exp $");
|
||||
|
||||
#include "opt_machdep.h"
|
||||
#include "opt_ddb.h"
|
||||
@ -349,7 +349,7 @@ rockchip_putchar(char c)
|
||||
static uint32_t
|
||||
rockchip_get_memsize(void)
|
||||
{
|
||||
bus_space_tag_t bst = &rockchip_bs_tag;
|
||||
bus_space_tag_t bst = &armv7_generic_bs_tag;
|
||||
const bus_space_handle_t ddr_pctl_bsh =
|
||||
ROCKCHIP_CORE1_VBASE + ROCKCHIP_DDR_PCTL_OFFSET;
|
||||
const bus_space_handle_t ddr_publ_bsh =
|
||||
@ -479,7 +479,7 @@ initarm(void *arg)
|
||||
rockchip_bootstrap();
|
||||
|
||||
#ifdef MULTIPROCESSOR
|
||||
uint32_t scu_cfg = bus_space_read_4(&rockchip_bs_tag,
|
||||
uint32_t scu_cfg = bus_space_read_4(&armv7_generic_bs_tag,
|
||||
rockchip_core0_bsh, ROCKCHIP_SCU_OFFSET + SCU_CFG);
|
||||
arm_cpu_max = (scu_cfg & SCU_CFG_CPUMAX) + 1;
|
||||
membar_producer();
|
||||
@ -505,7 +505,7 @@ initarm(void *arg)
|
||||
printf("probe the PL310 L2CC\n");
|
||||
const bus_space_handle_t pl310_bh =
|
||||
ROCKCHIP_CORE0_VBASE + ROCKCHIP_PL310_OFFSET;
|
||||
arml2cc_init(&rockchip_bs_tag, pl310_bh, 0);
|
||||
arml2cc_init(&armv7_generic_bs_tag, pl310_bh, 0);
|
||||
rockchip_putchar('l');
|
||||
#endif
|
||||
|
||||
@ -645,14 +645,14 @@ consinit(void)
|
||||
rockchip_putchar('e');
|
||||
|
||||
#if NCOM > 0
|
||||
if (bus_space_map(&rockchip_a4x_bs_tag, consaddr, ROCKCHIP_UART_SIZE, 0, &bh))
|
||||
if (bus_space_map(&armv7_generic_a4x_bs_tag, consaddr, ROCKCHIP_UART_SIZE, 0, &bh))
|
||||
panic("Serial console can not be mapped.");
|
||||
|
||||
if (comcnattach(&rockchip_a4x_bs_tag, consaddr, conspeed,
|
||||
if (comcnattach(&armv7_generic_a4x_bs_tag, consaddr, conspeed,
|
||||
ROCKCHIP_UART_FREQ, COM_TYPE_NORMAL, conmode))
|
||||
panic("Serial console can not be initialized.");
|
||||
|
||||
bus_space_unmap(&rockchip_a4x_bs_tag, bh, ROCKCHIP_UART_SIZE);
|
||||
bus_space_unmap(&armv7_generic_a4x_bs_tag, bh, ROCKCHIP_UART_SIZE);
|
||||
#endif
|
||||
|
||||
|
||||
@ -667,7 +667,7 @@ consinit(void)
|
||||
void
|
||||
rockchip_reset(void)
|
||||
{
|
||||
bus_space_tag_t bst = &rockchip_bs_tag;
|
||||
bus_space_tag_t bst = &armv7_generic_bs_tag;
|
||||
bus_space_handle_t bsh;
|
||||
|
||||
bus_space_subregion(bst, rockchip_core1_bsh,
|
||||
@ -703,14 +703,14 @@ static kgdb_port_init(void)
|
||||
kgdbsinit_called = 1;
|
||||
|
||||
bus_space_handle_t bh;
|
||||
if (bus_space_map(&rockchip_a4x_bs_tag, comkgdbaddr, ROCKCHIP_COM_SIZE, 0, &bh))
|
||||
if (bus_space_map(&armv7_generic_a4x_bs_tag, comkgdbaddr, ROCKCHIP_COM_SIZE, 0, &bh))
|
||||
panic("kgdb port can not be mapped.");
|
||||
|
||||
if (com_kgdb_attach(&rockchip_a4x_bs_tag, comkgdbaddr, comkgdbspeed,
|
||||
if (com_kgdb_attach(&armv7_generic_a4x_bs_tag, comkgdbaddr, comkgdbspeed,
|
||||
ROCKCHIP_COM_FREQ, COM_TYPE_NORMAL, comkgdbmode))
|
||||
panic("KGDB uart can not be initialized.");
|
||||
|
||||
bus_space_unmap(&rockchip_a4x_bs_tag, bh, ROCKCHIP_COM_SIZE);
|
||||
bus_space_unmap(&armv7_generic_a4x_bs_tag, bh, ROCKCHIP_COM_SIZE);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -728,7 +728,7 @@ rockchip_device_register(device_t self, void *aux)
|
||||
* bus space used for the armcore regisers (which armperiph uses).
|
||||
*/
|
||||
struct mainbus_attach_args * const mb = aux;
|
||||
mb->mb_iot = &rockchip_bs_tag;
|
||||
mb->mb_iot = &armv7_generic_bs_tag;
|
||||
return;
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user