Add jmphy(4) from OpenBSD.
This commit is contained in:
msaitoh
parent
86d4d18016
commit
d4bacf091b
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@ -1,4 +1,4 @@
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# $NetBSD: mi,v 1.1660 2019/10/28 13:04:18 maxv Exp $
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# $NetBSD: mi,v 1.1661 2019/10/30 12:06:25 msaitoh Exp $
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#
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# Note: don't delete entries from here - mark them as "obsolete" instead.
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#
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@ -1379,6 +1379,7 @@
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./usr/share/man/cat4/iy.0 man-sys-catman .cat
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./usr/share/man/cat4/jme.0 man-sys-catman .cat
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./usr/share/man/cat4/jmide.0 man-sys-catman .cat
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./usr/share/man/cat4/jmphy.0 man-sys-catman .cat
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./usr/share/man/cat4/joy.0 man-sys-catman .cat
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./usr/share/man/cat4/kame_ipsec.0 man-obsolete obsolete
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./usr/share/man/cat4/kcov.0 man-sys-catman .cat
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@ -4522,6 +4523,7 @@
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./usr/share/man/html4/iy.html man-sys-htmlman html
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./usr/share/man/html4/jme.html man-sys-htmlman html
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./usr/share/man/html4/jmide.html man-sys-htmlman html
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./usr/share/man/html4/jmphy.html man-sys-htmlman html
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./usr/share/man/html4/joy.html man-sys-htmlman html
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./usr/share/man/html4/kame_ipsec.html man-obsolete obsolete
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./usr/share/man/html4/kcov.html man-sys-htmlman html
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@ -7505,6 +7507,7 @@
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./usr/share/man/man4/iy.4 man-sys-man .man
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./usr/share/man/man4/jme.4 man-sys-man .man
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./usr/share/man/man4/jmide.4 man-sys-man .man
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./usr/share/man/man4/jmphy.4 man-sys-man .man
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./usr/share/man/man4/joy.4 man-sys-man .man
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./usr/share/man/man4/kame_ipsec.4 man-obsolete obsolete
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./usr/share/man/man4/kcov.4 man-sys-man .man
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@ -1,4 +1,4 @@
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# $NetBSD: Makefile,v 1.686 2019/10/28 02:56:40 ozaki-r Exp $
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# $NetBSD: Makefile,v 1.687 2019/10/30 12:06:25 msaitoh Exp $
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# @(#)Makefile 8.1 (Berkeley) 6/18/93
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MAN= aac.4 ac97.4 acardide.4 aceride.4 acphy.4 \
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@ -35,7 +35,7 @@ MAN= aac.4 ac97.4 acardide.4 aceride.4 acphy.4 \
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ioasic.4 ioat.4 iop.4 iophy.4 iopsp.4 ip.4 ipgphy.4 ipmi.4 ipw.4 \
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irmce.4 isp.4 ismt.4 isv.4 itesio.4 iteide.4 iwi.4 iwm.4 iwn.4 ixg.4 \
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ixpide.4 ixv.4 \
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jme.4 jmide.4 joy.4 \
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jme.4 jmide.4 jmphy.4 joy.4 \
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kcov.4 kloader.4 kse.4 ksyms.4 kttcp.4 \
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l2tp.4 lc.4 ld.4 lii.4 lo.4 lua.4 lxtphy.4 \
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mainbus.4 makphy.4 malo.4 mbe.4 mca.4 mcclock.4 mcx.4 md.4 mfb.4 \
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@ -1,4 +1,4 @@
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.\" $NetBSD: jme.4,v 1.7 2017/07/03 21:30:58 wiz Exp $
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.\" $NetBSD: jme.4,v 1.8 2019/10/30 12:06:25 msaitoh Exp $
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.\"
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.\" Copyright (c) 2008 Manuel Bouyer
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.\" All rights reserved.
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@ -23,7 +23,7 @@
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.\" INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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.\"
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.Dd October 17, 2008
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.Dd October 30, 2019
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.Dt JME 4
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.Os
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.Sh NAME
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@ -69,6 +69,7 @@ jme transmit interrupt moderation packet counter (defaults to 128)
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.El
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.Sh SEE ALSO
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.Xr ifmedia 4 ,
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.Xr jmphy 4 ,
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.Xr mii 4 ,
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.Xr netintro 4 ,
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.Xr pci 4 ,
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@ -1,4 +1,4 @@
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.\" $NetBSD: mii.4,v 1.28 2019/10/07 11:53:40 msaitoh Exp $
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.\" $NetBSD: mii.4,v 1.29 2019/10/30 12:06:25 msaitoh Exp $
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.\"
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.\" Copyright (c) 1998, 2002 The NetBSD Foundation, Inc.
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.\" All rights reserved.
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@ -50,6 +50,7 @@
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.Cd "inphy* at mii? phy ? # Intel 82555 PHYs"
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.Cd "iophy* at mii? phy ? # Intel 82553 PHYs"
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.Cd "ipgphy* at mii? phy ? # IC PLUS IP1000A/IP1001 PHYs"
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.Cd "jmphy* at mii? phy ? # JMicron
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.Cd "lxtphy* at mii? phy ? # Level One LXT-970 PHYs"
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.Cd "makphy* at mii? phy ? # Marvel 88E1000 Gig-E PHYs"
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.Cd "micphy* at mii? phy ? # Micrel KSZ9021 Gig-E PHYs"
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@ -1,4 +1,4 @@
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# $NetBSD: ALL,v 1.126 2019/10/28 03:01:11 ozaki-r Exp $
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# $NetBSD: ALL,v 1.127 2019/10/30 12:06:25 msaitoh Exp $
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# From NetBSD: GENERIC,v 1.787 2006/10/01 18:37:54 bouyer Exp
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#
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# ALL machine description file
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@ -17,7 +17,7 @@ include "arch/amd64/conf/std.amd64"
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options INCLUDE_CONFIG_FILE # embed config file in kernel binary
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#ident "ALL-$Revision: 1.126 $"
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#ident "ALL-$Revision: 1.127 $"
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maxusers 64 # estimated number of users
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@ -1106,6 +1106,7 @@ ikphy* at mii? phy ? # Intel 82563 PHYs
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inphy* at mii? phy ? # Intel 82555 PHYs
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iophy* at mii? phy ? # Intel 82553 PHYs
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ipgphy* at mii? phy ? # IC PLUS IP1000A/IP1001 PHYs
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jmphy* at mii? phy ? # Jmicron JMP202/211 PHYs
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lxtphy* at mii? phy ? # Level One LXT-970 PHYs
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makphy* at mii? phy ? # Marvell Semiconductor 88E1000 PHYs
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nsphy* at mii? phy ? # NS83840 PHYs
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@ -1,4 +1,4 @@
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# $NetBSD: GENERIC,v 1.542 2019/10/28 03:01:11 ozaki-r Exp $
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# $NetBSD: GENERIC,v 1.543 2019/10/30 12:06:25 msaitoh Exp $
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#
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# GENERIC machine description file
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#
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@ -22,7 +22,7 @@ include "arch/amd64/conf/std.amd64"
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options INCLUDE_CONFIG_FILE # embed config file in kernel binary
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#ident "GENERIC-$Revision: 1.542 $"
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#ident "GENERIC-$Revision: 1.543 $"
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maxusers 64 # estimated number of users
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@ -877,6 +877,7 @@ ikphy* at mii? phy ? # Intel 82563 PHYs
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inphy* at mii? phy ? # Intel 82555 PHYs
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iophy* at mii? phy ? # Intel 82553 PHYs
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ipgphy* at mii? phy ? # IC PLUS IP1000A/IP1001 PHYs
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jmphy* at mii? phy ? # Jmicron JMP202/211 PHYs
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lxtphy* at mii? phy ? # Level One LXT-970 PHYs
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makphy* at mii? phy ? # Marvell Semiconductor 88E1000 PHYs
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nsphy* at mii? phy ? # NS83840 PHYs
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@ -1,4 +1,4 @@
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# $NetBSD: ALL,v 1.472 2019/10/08 18:50:44 maxv Exp $
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# $NetBSD: ALL,v 1.473 2019/10/30 12:06:25 msaitoh Exp $
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# From NetBSD: GENERIC,v 1.787 2006/10/01 18:37:54 bouyer Exp
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#
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# ALL machine description file
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@ -17,7 +17,7 @@ include "arch/i386/conf/std.i386"
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options INCLUDE_CONFIG_FILE # embed config file in kernel binary
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#ident "ALL-$Revision: 1.472 $"
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#ident "ALL-$Revision: 1.473 $"
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maxusers 64 # estimated number of users
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@ -1210,6 +1210,7 @@ ikphy* at mii? phy ? # Intel 82563 PHYs
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inphy* at mii? phy ? # Intel 82555 PHYs
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iophy* at mii? phy ? # Intel 82553 PHYs
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ipgphy* at mii? phy ? # IC PLUS IP1000A/IP1001 PHYs
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jmphy* at mii? phy ? # Jmicron JMP202/211 PHYs
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lxtphy* at mii? phy ? # Level One LXT-970 PHYs
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makphy* at mii? phy ? # Marvell Semiconductor 88E1000 PHYs
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nsphy* at mii? phy ? # NS83840 PHYs
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@ -1,4 +1,4 @@
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# $NetBSD: GENERIC,v 1.1213 2019/10/25 17:39:57 martin Exp $
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# $NetBSD: GENERIC,v 1.1214 2019/10/30 12:06:25 msaitoh Exp $
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#
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# GENERIC machine description file
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#
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@ -22,7 +22,7 @@ include "arch/i386/conf/std.i386"
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options INCLUDE_CONFIG_FILE # embed config file in kernel binary
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#ident "GENERIC-$Revision: 1.1213 $"
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#ident "GENERIC-$Revision: 1.1214 $"
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maxusers 64 # estimated number of users
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@ -1124,6 +1124,7 @@ ikphy* at mii? phy ? # Intel 82563 PHYs
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inphy* at mii? phy ? # Intel 82555 PHYs
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iophy* at mii? phy ? # Intel 82553 PHYs
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ipgphy* at mii? phy ? # IC PLUS IP1000A/IP1001 PHYs
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jmphy* at mii? phy ? # Jmicron JMP202/211 PHYs
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lxtphy* at mii? phy ? # Level One LXT-970 PHYs
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makphy* at mii? phy ? # Marvell Semiconductor 88E1000 PHYs
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nsphy* at mii? phy ? # NS83840 PHYs
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@ -1,4 +1,4 @@
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# $NetBSD: DEVNAMES,v 1.323 2019/10/25 17:39:56 martin Exp $
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# $NetBSD: DEVNAMES,v 1.324 2019/10/30 12:06:26 msaitoh Exp $
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#
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# This file contains all used device names and defined attributes in
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# alphabetical order. New devices added to the system somewhere should first
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@ -708,6 +708,7 @@ j720pwr hpcarm
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j720ssp hpcarm
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j720tp hpcarm
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jme MI
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jmphy MI
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joy arc
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joy bebox
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joy cats
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@ -1,4 +1,4 @@
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# $NetBSD: files.mii,v 1.51 2019/10/07 11:53:40 msaitoh Exp $
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# $NetBSD: files.mii,v 1.52 2019/10/30 12:06:26 msaitoh Exp $
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defflag opt_mii.h MIIVERBOSE
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@ -103,6 +103,10 @@ device ipgphy: mii_phy
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attach ipgphy at mii
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file dev/mii/ipgphy.c ipgphy
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device jmphy: mii_phy
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attach jmphy at mii
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file dev/mii/jmphy.c jmphy
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device sqphy: mii_phy
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attach sqphy at mii
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file dev/mii/sqphy.c sqphy
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@ -0,0 +1,358 @@
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/* $NetBSD: jmphy.c,v 1.1 2019/10/30 12:06:26 msaitoh Exp $ */
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/* $OpenBSD: jmphy.c,v 1.6 2015/03/14 03:38:48 jsg Exp $ */
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/*-
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* Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD: src/sys/dev/mii/jmphy.c,v 1.1 2008/05/27 01:16:40 yongari Exp $
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* $DragonFly: src/sys/dev/netif/mii_layer/jmphy.c,v 1.1 2008/07/22 11:28:49 sephe Exp $
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*/
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/*
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* Driver for the JMicron JMP211 10/100/1000, JMP202 10/100 PHY.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/socket.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/mii/miidevs.h>
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#include <dev/mii/jmphyreg.h>
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static int jmphy_service(struct mii_softc *, struct mii_data *, int);
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static void jmphy_status(struct mii_softc *);
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static int jmphy_match(device_t, cfdata_t, void *);
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static void jmphy_attach(device_t, device_t, void *);
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static void jmphy_reset(struct mii_softc *);
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static uint16_t jmphy_anar(struct ifmedia_entry *);
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static int jmphy_auto(struct mii_softc *, struct ifmedia_entry *);
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static const struct mii_phy_funcs jmphy_funcs = {
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jmphy_service, jmphy_status, jmphy_reset,
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};
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CFATTACH_DECL_NEW(jmphy, sizeof (struct mii_softc),
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jmphy_match, jmphy_attach, mii_phy_detach, mii_phy_activate);
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static const struct mii_phydesc jmphys[] = {
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MII_PHY_DESC(JMICRON, JMP202),
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MII_PHY_DESC(JMICRON, JMP211),
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MII_PHY_END,
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};
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static int
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jmphy_match(device_t parent, cfdata_t match, void *aux)
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{
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struct mii_attach_args *ma = aux;
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if (mii_phy_match(ma, jmphys) != NULL)
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return 10;
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return 0;
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}
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static void
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jmphy_attach(device_t parent, device_t self, void *aux)
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{
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struct mii_softc *sc = device_private(self);
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struct mii_attach_args *ma = aux;
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struct mii_data *mii = ma->mii_data;
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const struct mii_phydesc *mpd;
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mpd = mii_phy_match(ma, jmphys);
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aprint_naive(": Media interface\n");
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aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
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sc->mii_dev = self;
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sc->mii_inst = mii->mii_instance;
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sc->mii_phy = ma->mii_phyno;
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sc->mii_funcs = &jmphy_funcs;
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sc->mii_mpd_oui = MII_OUI(ma->mii_id1, ma->mii_id2);
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sc->mii_mpd_model = MII_MODEL(ma->mii_id2);
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sc->mii_mpd_rev = MII_REV(ma->mii_id2);
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sc->mii_pdata = mii;
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sc->mii_flags = ma->mii_flags;
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sc->mii_flags |= MIIF_NOISOLATE | MIIF_NOLOOP;
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PHY_RESET(sc);
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PHY_READ(sc, MII_BMSR, &sc->mii_capabilities);
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sc->mii_capabilities &= ma->mii_capmask;
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if (sc->mii_capabilities & BMSR_EXTSTAT)
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PHY_READ(sc, MII_EXTSR, &sc->mii_extcapabilities);
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aprint_normal_dev(self, "");
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if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 &&
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(sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0)
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aprint_error("no media present");
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else
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mii_phy_add_media(sc);
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aprint_normal("\n");
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}
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static int
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jmphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
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{
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struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
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uint16_t bmcr, ssr;
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switch (cmd) {
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case MII_POLLSTAT:
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/*
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* If we're not polling our PHY instance, just return.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst)
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return 0;
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break;
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case MII_MEDIACHG:
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/*
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* If the media indicates a different PHY instance,
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* isolate ourselves.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
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PHY_READ(sc, MII_BMCR, &bmcr);
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PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
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return 0;
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}
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/*
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* If the interface is not up, don't do anything.
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*/
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if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
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break;
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if (jmphy_auto(sc, ife) != EJUSTRETURN)
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return EINVAL;
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break;
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case MII_TICK:
|
||||
/*
|
||||
* If we're not currently selected, just return.
|
||||
*/
|
||||
if (IFM_INST(ife->ifm_media) != sc->mii_inst)
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* Is the interface even up?
|
||||
*/
|
||||
if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* Only used for autonegotiation.
|
||||
*/
|
||||
if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
|
||||
break;
|
||||
|
||||
/* Check for link. */
|
||||
PHY_READ(sc, JMPHY_SSR, &ssr);
|
||||
if (ssr & JMPHY_SSR_LINK_UP) {
|
||||
sc->mii_ticks = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Announce link loss right after it happens. */
|
||||
if (sc->mii_ticks++ == 0)
|
||||
break;
|
||||
if (sc->mii_ticks <= sc->mii_anegticks)
|
||||
return 0;
|
||||
|
||||
sc->mii_ticks = 0;
|
||||
jmphy_auto(sc, ife);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Update the media status. */
|
||||
jmphy_status(sc);
|
||||
|
||||
/* Callback if something changed. */
|
||||
mii_phy_update(sc, cmd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
jmphy_status(struct mii_softc *sc)
|
||||
{
|
||||
struct mii_data *mii = sc->mii_pdata;
|
||||
uint16_t bmcr, ssr, gtsr;
|
||||
|
||||
mii->mii_media_status = IFM_AVALID;
|
||||
mii->mii_media_active = IFM_ETHER;
|
||||
|
||||
PHY_READ(sc, JMPHY_SSR, &ssr);
|
||||
if ((ssr & JMPHY_SSR_LINK_UP) != 0)
|
||||
mii->mii_media_status |= IFM_ACTIVE;
|
||||
|
||||
PHY_READ(sc, MII_BMCR, &bmcr);
|
||||
if ((bmcr & BMCR_ISO) != 0) {
|
||||
mii->mii_media_active |= IFM_NONE;
|
||||
mii->mii_media_status = 0;
|
||||
return;
|
||||
}
|
||||
|
||||
if ((bmcr & BMCR_LOOP) != 0)
|
||||
mii->mii_media_active |= IFM_LOOP;
|
||||
|
||||
if ((ssr & JMPHY_SSR_SPD_DPLX_RESOLVED) == 0) {
|
||||
/* Erg, still trying, I guess... */
|
||||
mii->mii_media_active |= IFM_NONE;
|
||||
return;
|
||||
}
|
||||
|
||||
switch ((ssr & JMPHY_SSR_SPEED_MASK)) {
|
||||
case JMPHY_SSR_SPEED_1000:
|
||||
mii->mii_media_active |= IFM_1000_T;
|
||||
/*
|
||||
* jmphy(4) got a valid link so reset mii_ticks.
|
||||
* Resetting mii_ticks is needed in order to
|
||||
* detect link loss after auto-negotiation.
|
||||
*/
|
||||
sc->mii_ticks = 0;
|
||||
break;
|
||||
case JMPHY_SSR_SPEED_100:
|
||||
mii->mii_media_active |= IFM_100_TX;
|
||||
sc->mii_ticks = 0;
|
||||
break;
|
||||
case JMPHY_SSR_SPEED_10:
|
||||
mii->mii_media_active |= IFM_10_T;
|
||||
sc->mii_ticks = 0;
|
||||
break;
|
||||
default:
|
||||
mii->mii_media_active |= IFM_NONE;
|
||||
return;
|
||||
}
|
||||
|
||||
if ((ssr & JMPHY_SSR_DUPLEX) != 0)
|
||||
mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
|
||||
else
|
||||
mii->mii_media_active |= IFM_HDX;
|
||||
|
||||
if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) {
|
||||
PHY_READ(sc, MII_GTSR, >sr);
|
||||
if ((gtsr & GTSR_MS_RES) != 0)
|
||||
mii->mii_media_active |= IFM_ETH_MASTER;
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
jmphy_reset(struct mii_softc *sc)
|
||||
{
|
||||
int i;
|
||||
uint16_t val;
|
||||
|
||||
/* Disable sleep mode. */
|
||||
PHY_READ(sc, JMPHY_TMCTL, &val);
|
||||
PHY_WRITE(sc, JMPHY_TMCTL, val & ~JMPHY_TMCTL_SLEEP_ENB);
|
||||
|
||||
PHY_READ(sc, MII_BMCR, &val);
|
||||
PHY_WRITE(sc, MII_BMCR, val | BMCR_RESET);
|
||||
|
||||
for (i = 0; i < 1000; i++) {
|
||||
DELAY(1);
|
||||
PHY_READ(sc, MII_BMCR, &val);
|
||||
if ((val & BMCR_RESET) == 0)
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static uint16_t
|
||||
jmphy_anar(struct ifmedia_entry *ife)
|
||||
{
|
||||
uint16_t anar;
|
||||
|
||||
anar = 0;
|
||||
switch (IFM_SUBTYPE(ife->ifm_media)) {
|
||||
case IFM_AUTO:
|
||||
anar |= ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10;
|
||||
break;
|
||||
case IFM_1000_T:
|
||||
break;
|
||||
case IFM_100_TX:
|
||||
anar |= ANAR_TX | ANAR_TX_FD;
|
||||
break;
|
||||
case IFM_10_T:
|
||||
anar |= ANAR_10 | ANAR_10_FD;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return anar;
|
||||
}
|
||||
|
||||
static int
|
||||
jmphy_auto(struct mii_softc *sc, struct ifmedia_entry *ife)
|
||||
{
|
||||
uint16_t anar, bmcr, gig;
|
||||
|
||||
gig = 0;
|
||||
PHY_READ(sc, MII_BMCR, &bmcr);
|
||||
switch (IFM_SUBTYPE(ife->ifm_media)) {
|
||||
case IFM_AUTO:
|
||||
gig |= GTCR_ADV_1000TFDX | GTCR_ADV_1000THDX;
|
||||
break;
|
||||
case IFM_1000_T:
|
||||
gig |= GTCR_ADV_1000TFDX | GTCR_ADV_1000THDX;
|
||||
break;
|
||||
case IFM_100_TX:
|
||||
case IFM_10_T:
|
||||
break;
|
||||
case IFM_NONE:
|
||||
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO | BMCR_PDOWN);
|
||||
return EJUSTRETURN;
|
||||
default:
|
||||
return EINVAL;
|
||||
}
|
||||
|
||||
if ((ife->ifm_media & IFM_LOOP) != 0)
|
||||
bmcr |= BMCR_LOOP;
|
||||
|
||||
anar = jmphy_anar(ife);
|
||||
if (sc->mii_flags & MIIF_DOPAUSE)
|
||||
anar |= ANAR_PAUSE_TOWARDS;
|
||||
|
||||
if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) {
|
||||
#ifdef notyet
|
||||
struct mii_data *mii;
|
||||
|
||||
mii = sc->mii_pdata;
|
||||
if ((mii->mii_media.ifm_media & IFM_ETH_MASTER) != 0)
|
||||
gig |= GTCR_MAN_MS | GTCR_MAN_ADV;
|
||||
#endif
|
||||
PHY_WRITE(sc, MII_100T2CR, gig);
|
||||
}
|
||||
PHY_WRITE(sc, MII_ANAR, anar | ANAR_CSMA);
|
||||
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_AUTOEN | BMCR_STARTNEG);
|
||||
|
||||
return EJUSTRETURN;
|
||||
}
|
||||
|
|
@ -0,0 +1,116 @@
|
|||
/* $NetBSD: jmphyreg.h,v 1.1 2019/10/30 12:06:26 msaitoh Exp $ */
|
||||
/* $OpenBSD: jmphyreg.h,v 1.1 2008/09/26 10:35:15 jsg Exp $ */
|
||||
/*-
|
||||
* Copyright (c) 2008, Pyun YongHyeon
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice unmodified, this list of conditions, and the following
|
||||
* disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD: src/sys/dev/mii/jmphyreg.h,v 1.1 2008/05/27 01:16:40 yongari Exp $
|
||||
* $DragonFly: src/sys/dev/netif/mii_layer/jmphyreg.h,v 1.2 2008/09/13 04:04:39 sephe Exp $
|
||||
*/
|
||||
|
||||
#ifndef _DEV_MII_JMPHYREG_H_
|
||||
#define _DEV_MII_JMPHYREG_H_
|
||||
|
||||
/*
|
||||
* Registers for the JMicron JMC250 Gigabit PHY.
|
||||
*/
|
||||
|
||||
/* PHY specific status register. */
|
||||
#define JMPHY_SSR 0x11
|
||||
#define JMPHY_SSR_SPEED_1000 0x8000
|
||||
#define JMPHY_SSR_SPEED_100 0x4000
|
||||
#define JMPHY_SSR_SPEED_10 0x0000
|
||||
#define JMPHY_SSR_SPEED_MASK 0xC000
|
||||
#define JMPHY_SSR_DUPLEX 0x2000
|
||||
#define JMPHY_SSR_SPD_DPLX_RESOLVED 0x0800
|
||||
#define JMPHY_SSR_LINK_UP 0x0400
|
||||
#define JMPHY_SSR_MDI_XOVER 0x0040
|
||||
#define JMPHY_SSR_INV_POLARITY 0x0002
|
||||
|
||||
/* PHY specific cable length status register. */
|
||||
#define JMPHY_SCL 0x17
|
||||
#define JMPHY_SCL_CHAN_D_MASK 0xF000
|
||||
#define JMPHY_SCL_CHAN_C_MASK 0x0F00
|
||||
#define JMPHY_SCL_CHAN_B_MASK 0x00F0
|
||||
#define JMPHY_SCL_CHAN_A_MASK 0x000F
|
||||
#define JMPHY_SCL_LEN_35 0
|
||||
#define JMPHY_SCL_LEN_40 1
|
||||
#define JMPHY_SCL_LEN_50 2
|
||||
#define JMPHY_SCL_LEN_60 3
|
||||
#define JMPHY_SCL_LEN_70 4
|
||||
#define JMPHY_SCL_LEN_80 5
|
||||
#define JMPHY_SCL_LEN_90 6
|
||||
#define JMPHY_SCL_LEN_100 7
|
||||
#define JMPHY_SCL_LEN_110 8
|
||||
#define JMPHY_SCL_LEN_120 9
|
||||
#define JMPHY_SCL_LEN_130 10
|
||||
#define JMPHY_SCL_LEN_140 11
|
||||
#define JMPHY_SCL_LEN_150 12
|
||||
#define JMPHY_SCL_LEN_160 13
|
||||
#define JMPHY_SCL_LEN_170 14
|
||||
#define JMPHY_SCL_RSVD 15
|
||||
|
||||
/* PHY specific LED control register 1. */
|
||||
#define JMPHY_LED_CTL1 0x18
|
||||
#define JMPHY_LED_BLINK_42MS 0x0000
|
||||
#define JMPHY_LED_BLINK_84MS 0x2000
|
||||
#define JMPHY_LED_BLINK_170MS 0x4000
|
||||
#define JMPHY_LED_BLINK_340MS 0x6000
|
||||
#define JMPHY_LED_BLINK_670MS 0x8000
|
||||
#define JMPHY_LED_BLINK_MASK 0xE000
|
||||
#define JMPHY_LED_FLP_GAP_MASK 0x1F00
|
||||
#define JMPHY_LED_FLP_GAP_DEFULT 0x1000
|
||||
#define JMPHY_LED2_POLARITY_MASK 0x0030
|
||||
#define JMPHY_LED1_POLARITY_MASK 0x000C
|
||||
#define JMPHY_LED0_POLARITY_MASK 0x0003
|
||||
#define JMPHY_LED_ON_LO_OFF_HI 0
|
||||
#define JMPHY_LED_ON_HI_OFF_HI 1
|
||||
#define JMPHY_LED_ON_LO_OFF_TS 2
|
||||
#define JMPHY_LED_ON_HI_OFF_TS 3
|
||||
|
||||
/* PHY specific LED control register 2. */
|
||||
#define JMPHY_LED_CTL2 0x19
|
||||
#define JMPHY_LED_NO_STRETCH 0x0000
|
||||
#define JMPHY_LED_STRETCH_42MS 0x2000
|
||||
#define JMPHY_LED_STRETCH_84MS 0x4000
|
||||
#define JMPHY_LED_STRETCH_170MS 0x6000
|
||||
#define JMPHY_LED_STRETCH_340MS 0x8000
|
||||
#define JMPHY_LED_STRETCH_670MS 0xB000
|
||||
#define JMPHY_LED_STRETCH_1300MS 0xC000
|
||||
#define JMPHY_LED_STRETCH_2700MS 0xE000
|
||||
#define JMPHY_LED2_MODE_MASK 0x0F00
|
||||
#define JMPHY_LED1_MODE_MASK 0x00F0
|
||||
#define JMPHY_LED0_MODE_MASK 0x000F
|
||||
|
||||
/* PHY specific test mode control register. */
|
||||
#define JMPHY_TMCTL 0x1A
|
||||
#define JMPHY_TMCTL_SLEEP_ENB 0x1000
|
||||
|
||||
/* PHY specific configuration */
|
||||
#define JMPHY_CONF 0x1B
|
||||
#define JMPHY_CONF_EXTFIFO 0x0000 /* use extended fifo */
|
||||
#define JMPHY_CONF_DEFFIFO 0x0004 /* use default fifo */
|
||||
|
||||
#endif /* _DEV_MII_JMPHYREG_H_ */
|
||||
Loading…
Reference in New Issue