import GCC-4.1 branch from 20070110 (revision 120647). this fixes the

44 GCC PR's listed below (some have already been applied to NetBSD GCC)
and at least one NetBSD PR:

	PR bootstrap/28400
	PR c++/27369
	PR c/25795
	PR c/25993
	PR c/29092
	PR c/29736
	PR c/30360
	PR debug/26964
	PR libstdc++/11953
	PR middle-end/21032
	PR middle-end/26306
	PR middle-end/27826
	PR middle-end/28116
	PR middle-end/29241
	PR middle-end/29250
	PR middle-end/29584
	PR middle-end/29695
	PR middle-end/29753
	PR middle-end/30286
	PR rtl-optimization/25514
	PR rtl-optimization/27736
	PR rtl-optimization/27761
	PR rtl-optimization/28970
	PR rtl-optimization/29631
	PR rtl-optimization/29797
	PR target/18553
	PR target/24036
	PR target/29114
	PR target/29319
	PR target/29377
	PR target/29449
	PR target/30039
	PR target/30173
	PR target/30185
	PR target/30230
	PR tree-opt/28545
	PR tree-opt/29788
	PR tree-opt/29964
	PR tree-optimization/27891
	PR tree-optimization/28888
	PR tree-optimization/29581
	PR tree-optimization/29610
	PR tree-optimization/29637
	PR tree-optimization/30212

gnu/dist/gcc4/gcc/config/arm/ieee754-df.S

@@ -326,7 +326,7 @@ LSYM(Lad_s):
 	beq	1f
 
 	@ Result is x + 0.0 = x or 0.0 + y = y.
-	teq	r4, #0
+	orrs	ip, r4, xl
 	moveq	xh, yh
 	moveq	xl, yl
 	RETLDM	"r4, r5"

gnu/dist/gcc4/gcc/config/avr/avr.h

@@ -866,3 +866,7 @@ extern int avr_case_values_threshold;
 #define ZERO_REGNO 1
 
 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
+
+#define DWARF2_DEBUGGING_INFO 1
+
+#define OBJECT_FORMAT_ELF

gnu/dist/gcc4/gcc/config/bfin/bfin.h

@@ -39,8 +39,8 @@ extern int target_flags;
 #define TARGET_CPU_CPP_BUILTINS()               \
   do                                            \
     {                                           \
-      builtin_define ("bfin");                  \
+      builtin_define_std ("bfin");              \
-      builtin_define ("BFIN");                  \
+      builtin_define_std ("BFIN");              \
       if (flag_pic)				\
 	{					\
 	  builtin_define ("__PIC__");		\
@@ -1109,11 +1109,13 @@ do { 						\
 #define ASM_COMMENT_START "//"
 
 #define FUNCTION_PROFILER(FILE, LABELNO)	\
-  do {\
+  do {						\
-    fprintf (FILE, "\tP1.l =LP$%d; P1.h =LP$%d; call mcount;\n", \
+    fprintf (FILE, "\tCALL __mcount;\n");	\
-       LABELNO, LABELNO);\
   } while(0)
 
+#undef NO_PROFILE_COUNTERS
+#define NO_PROFILE_COUNTERS 1
+
 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) fprintf (FILE, "[SP--] = %s;\n", reg_names[REGNO])
 #define ASM_OUTPUT_REG_POP(FILE, REGNO)  fprintf (FILE, "%s = [SP++];\n", reg_names[REGNO])
 

gnu/dist/gcc4/gcc/config/h8300/h8300.c

@@ -83,8 +83,8 @@ static int h8300_interrupt_function_p (tree);
 static int h8300_saveall_function_p (tree);
 static int h8300_monitor_function_p (tree);
 static int h8300_os_task_function_p (tree);
-static void h8300_emit_stack_adjustment (int, unsigned int);
+static void h8300_emit_stack_adjustment (int, HOST_WIDE_INT);
-static int round_frame_size (int);
+static HOST_WIDE_INT round_frame_size (HOST_WIDE_INT);
 static unsigned int compute_saved_regs (void);
 static void push (int);
 static void pop (int);
@@ -510,7 +510,7 @@ byte_reg (rtx x, int b)
    SIZE to adjust the stack pointer.  */
 
 static void
-h8300_emit_stack_adjustment (int sign, unsigned int size)
+h8300_emit_stack_adjustment (int sign, HOST_WIDE_INT size)
 {
   /* If the frame size is 0, we don't have anything to do.  */
   if (size == 0)
@@ -546,8 +546,8 @@ h8300_emit_stack_adjustment (int sign, unsigned int size)
 
 /* Round up frame size SIZE.  */
 
-static int
+static HOST_WIDE_INT
-round_frame_size (int size)
+round_frame_size (HOST_WIDE_INT size)
 {
   return ((size + STACK_BOUNDARY / BITS_PER_UNIT - 1)
 	  & -STACK_BOUNDARY / BITS_PER_UNIT);

gnu/dist/gcc4/gcc/config/i386/i386.c

@@ -2212,10 +2212,10 @@ ix86_function_regparm (tree type, tree decl)
   return regparm;
 }
 
-/* Return 1 or 2, if we can pass up to 8 SFmode (1) and DFmode (2) arguments
+/* Return 1 or 2, if we can pass up to SSE_REGPARM_MAX SFmode (1) and
-   in SSE registers for a function with the indicated TYPE and DECL.
+   DFmode (2) arguments in SSE registers for a function with the
-   DECL may be NULL when calling function indirectly
+   indicated TYPE and DECL.  DECL may be NULL when calling function
-   or considering a libcall.  Otherwise return 0.  */
+   indirectly or considering a libcall.  Otherwise return 0.  */
 
 static int
 ix86_function_sseregparm (tree type, tree decl)
@@ -2240,9 +2240,9 @@ ix86_function_sseregparm (tree type, tree decl)
       return 2;
     }
 
-  /* For local functions, pass SFmode (and DFmode for SSE2) arguments
+  /* For local functions, pass up to SSE_REGPARM_MAX SFmode
-     in SSE registers even for 32-bit mode and not just 3, but up to
+     (and DFmode for SSE2) arguments in SSE registers,
-     8 SSE arguments in registers.  */
+     even for 32-bit targets.  */
   if (!TARGET_64BIT && decl
       && TARGET_SSE_MATH && flag_unit_at_a_time && !profile_flag)
     {

gnu/dist/gcc4/gcc/config/i386/i386.h

@@ -827,6 +827,15 @@ do {									\
       ? (TARGET_64BIT ? 4 : 6)						\
       : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
 
+#define HARD_REGNO_NREGS_HAS_PADDING(REGNO, MODE)			\
+  ((TARGET_128BIT_LONG_DOUBLE && !TARGET_64BIT)				\
+   ? (FP_REGNO_P (REGNO) || SSE_REGNO_P (REGNO) || MMX_REGNO_P (REGNO)	\
+      ? 0								\
+      : ((MODE) == XFmode || (MODE) == XCmode))				\
+   : 0)
+
+#define HARD_REGNO_NREGS_WITH_PADDING(REGNO, MODE) ((MODE) == XFmode ? 4 : 8)
+
 #define VALID_SSE2_REG_MODE(MODE) \
     ((MODE) == V16QImode || (MODE) == V8HImode || (MODE) == V2DFmode    \
      || (MODE) == V2DImode || (MODE) == DFmode)

gnu/dist/gcc4/gcc/config/ia64/hpux.h

@@ -53,6 +53,7 @@ do {							\
 	    builtin_define("_HPUX_SOURCE");		\
 	    builtin_define("__STDC_EXT__");		\
 	    builtin_define("__STDCPP__");		\
+	    builtin_define("_INCLUDE__STDC_A1_SOURCE");	\
 	  }						\
 	if (TARGET_ILP32)				\
 	  builtin_define("_ILP32");			\
@@ -71,7 +72,9 @@ do {							\
 #undef ENDFILE_SPEC
 
 #undef STARTFILE_SPEC
-#define STARTFILE_SPEC "%{!shared:%{static:crt0%O%s}}"
+#define STARTFILE_SPEC "%{!shared:%{static:crt0%O%s} \
+			  %{mlp64:/usr/lib/hpux64/unix98%O%s} \
+			  %{!mlp64:/usr/lib/hpux32/unix98%O%s}}"
 
 #undef LINK_SPEC
 #define LINK_SPEC \

gnu/dist/gcc4/gcc/config/ia64/ia64.c

@@ -7007,6 +7007,53 @@ get_next_important_insn (rtx insn, rtx tail)
   return NULL_RTX;
 }
 
+/* Add a bundle selector TEMPLATE0 before INSN.  */
+
+static void
+ia64_add_bundle_selector_before (int template0, rtx insn)
+{
+  rtx b = gen_bundle_selector (GEN_INT (template0));
+
+  ia64_emit_insn_before (b, insn);
+#if NR_BUNDLES == 10
+  if ((template0 == 4 || template0 == 5)
+      && (flag_unwind_tables || (flag_exceptions && !USING_SJLJ_EXCEPTIONS)))
+    {
+      int i;
+      rtx note = NULL_RTX;
+
+      /* In .mbb and .bbb bundles, check if CALL_INSN isn't in the
+	 first or second slot.  If it is and has REG_EH_NOTE set, copy it
+	 to following nops, as br.call sets rp to the address of following
+	 bundle and therefore an EH region end must be on a bundle
+	 boundary.  */
+      insn = PREV_INSN (insn);
+      for (i = 0; i < 3; i++)
+	{
+	  do
+	    insn = next_active_insn (insn);
+	  while (GET_CODE (insn) == INSN
+		 && get_attr_empty (insn) == EMPTY_YES);
+	  if (GET_CODE (insn) == CALL_INSN)
+	    note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
+	  else if (note)
+	    {
+	      int code;
+
+	      gcc_assert ((code = recog_memoized (insn)) == CODE_FOR_nop
+			  || code == CODE_FOR_nop_b);
+	      if (find_reg_note (insn, REG_EH_REGION, NULL_RTX))
+		note = NULL_RTX;
+	      else
+		REG_NOTES (insn)
+		  = gen_rtx_EXPR_LIST (REG_EH_REGION, XEXP (note, 0),
+				       REG_NOTES (insn));
+	    }
+	}
+    }
+#endif
+}
+
 /* The following function does insn bundling.  Bundling means
    inserting templates and nop insns to fit insn groups into permitted
    templates.  Instruction scheduling uses NDFA (non-deterministic
@@ -7288,8 +7335,7 @@ bundling (FILE *dump, int verbose, rtx prev_head_insn, rtx tail)
 		/* We are at the start of a bundle: emit the template
 		   (it should be defined).  */
 		gcc_assert (template0 >= 0);
-		b = gen_bundle_selector (GEN_INT (template0));
+		ia64_add_bundle_selector_before (template0, nop);
-		ia64_emit_insn_before (b, nop);
 		/* If we have two bundle window, we make one bundle
 		   rotation.  Otherwise template0 will be undefined
 		   (negative value).  */
@@ -7315,8 +7361,7 @@ bundling (FILE *dump, int verbose, rtx prev_head_insn, rtx tail)
 	  /* The current insn is at the bundle start: emit the
 	     template.  */
 	  gcc_assert (template0 >= 0);
-	  b = gen_bundle_selector (GEN_INT (template0));
+	  ia64_add_bundle_selector_before (template0, insn);
-	  ia64_emit_insn_before (b, insn);
 	  b = PREV_INSN (insn);
 	  insn = b;
 	  /* See comment above in analogous place for emitting nops
@@ -7338,8 +7383,7 @@ bundling (FILE *dump, int verbose, rtx prev_head_insn, rtx tail)
 	      /* See comment above in analogous place for emitting nops
 		 after the insn.  */
 	      gcc_assert (template0 >= 0);
-	      b = gen_bundle_selector (GEN_INT (template0));
+	      ia64_add_bundle_selector_before (template0, insn);
-	      ia64_emit_insn_before (b, insn);
 	      b = PREV_INSN (insn);
 	      insn = b;
 	      template0 = template1;
@@ -7433,8 +7477,7 @@ bundling (FILE *dump, int verbose, rtx prev_head_insn, rtx tail)
 	      }
 	    /* Put the MM-insn in the same slot of a bundle with the
 	       same template as the original one.  */
-	    ia64_emit_insn_before (gen_bundle_selector (GEN_INT (template0)),
+	    ia64_add_bundle_selector_before (template0, insn);
-				   insn);
 	    /* To put the insn in the same slot, add necessary number
 	       of nops.  */
 	    for (j = n; j > 0; j --)

gnu/dist/gcc4/gcc/config/ia64/linux.h

@@ -46,6 +46,7 @@ do {						\
       %{!dynamic-linker:-dynamic-linker /lib/ld-linux-ia64.so.2}} \
       %{static:-static}}"
 
+#define CPP_SPEC "%{posix:-D_POSIX_SOURCE} %{pthread:-D_REENTRANT}"
 
 #define JMP_BUF_SIZE  76
 

gnu/dist/gcc4/gcc/config/ia64/t-hpux

@@ -7,6 +7,12 @@ MULTILIB_OPTIONS = milp32/mlp64
 MULTILIB_DIRNAMES = hpux32 hpux64
 MULTILIB_MATCHES =
 
+# On HP-UX we do not want _fixtfdi, _fixunstfdi, or _floatditf from
+# LIB1ASMSRC.  These functions map the 128 bit conversion function names
+# to 80 bit conversions and were done for Linux backwards compatibility.
+
+LIB1ASMFUNCS := $(filter-out _fixtfdi _fixunstfdi _floatditf,$(LIB1ASMFUNCS))
+
 # Support routines for HP-UX 128 bit floats.
 
 LIB2FUNCS_EXTRA=quadlib.c

gnu/dist/gcc4/gcc/config/mips/linux.h

@@ -95,7 +95,7 @@ Boston, MA 02110-1301, USA.  */
   } while (0)
 
 #undef  SUBTARGET_CPP_SPEC
-#define SUBTARGET_CPP_SPEC "%{pthread:-D_REENTRANT}"
+#define SUBTARGET_CPP_SPEC "%{posix:-D_POSIX_SOURCE} %{pthread:-D_REENTRANT}"
 
 /* From iris5.h */
 /* -G is incompatible with -KPIC which is the default, so only allow objects

gnu/dist/gcc4/gcc/config/rs6000/eabispe.h

@@ -21,7 +21,8 @@
    MA 02110-1301, USA.  */
 
 #undef  TARGET_DEFAULT
-#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_EABI)
+#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_EABI	\
+  | MASK_STRICT_ALIGN)
 
 #undef  TARGET_VERSION
 #define TARGET_VERSION fprintf (stderr, " (PowerPC Embedded SPE)");

gnu/dist/gcc4/gcc/config/rs6000/linuxspe.h

@@ -25,7 +25,7 @@
 
 /* Override rs6000.h and sysv4.h definition.  */
 #undef	TARGET_DEFAULT
-#define	TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS)
+#define	TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_STRICT_ALIGN)
 
 #undef TARGET_SPE_ABI
 #undef TARGET_SPE

gnu/dist/gcc4/gcc/config/rs6000/predicates.md

@@ -84,10 +84,12 @@
 ;; Return 1 if op is a register that is not special.
 (define_predicate "gpc_reg_operand"
    (and (match_operand 0 "register_operand")
-	(match_test "GET_CODE (op) != REG
+	(match_test "(GET_CODE (op) != REG
 		      || (REGNO (op) >= ARG_POINTER_REGNUM
 			  && !XER_REGNO_P (REGNO (op)))
-		     || REGNO (op) < MQ_REGNO")))
+		      || REGNO (op) < MQ_REGNO)
+		     && !((TARGET_E500_DOUBLE || TARGET_SPE)
+			  && invalid_e500_subreg (op, mode))")))
 
 ;; Return 1 if op is a register that is a condition register field.
 (define_predicate "cc_reg_operand"
@@ -719,6 +721,12 @@
       && easy_vector_constant (op, mode))
     return 1;
 
+  /* Do not allow invalid E500 subregs.  */
+  if ((TARGET_E500_DOUBLE || TARGET_SPE)
+      && GET_CODE (op) == SUBREG
+      && invalid_e500_subreg (op, mode))
+    return 0;
+
   /* For floating-point or multi-word mode, the only remaining valid type
      is a register.  */
   if (GET_MODE_CLASS (mode) == MODE_FLOAT
@@ -753,7 +761,7 @@
 (define_predicate "rs6000_nonimmediate_operand"
   (match_code "reg,subreg,mem")
 {
-  if (TARGET_E500_DOUBLE
+  if ((TARGET_E500_DOUBLE || TARGET_SPE)
       && GET_CODE (op) == SUBREG
       && invalid_e500_subreg (op, mode))
     return 0;

gnu/dist/gcc4/gcc/config/rs6000/rs6000-c.c

@@ -125,6 +125,9 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfile)
   /* Used by lwarx/stwcx. errata work-around.  */
   if (rs6000_cpu == PROCESSOR_PPC405)
     builtin_define ("__PPC405__");
+  /* Used by libstdc++.  */
+  if (TARGET_NO_LWSYNC)
+    builtin_define ("__NO_LWSYNC__");
 
   /* May be overridden by target configuration.  */
   RS6000_CPU_CPP_ENDIAN_BUILTINS();

gnu/dist/gcc4/gcc/config/rs6000/rs6000.h

@@ -330,6 +330,9 @@ extern enum rs6000_nop_insertion rs6000_sched_insert_nops;
 #define TARGET_E500_SINGLE 0
 #define TARGET_E500_DOUBLE 0
 
+/* E500 processors only support plain "sync", not lwsync.  */
+#define TARGET_NO_LWSYNC TARGET_E500
+
 /* Sometimes certain combinations of command options do not make sense
    on a particular target machine.  You can define a macro
    `OVERRIDE_OPTIONS' to take account of this.  This macro, if

gnu/dist/gcc4/gcc/config/rs6000/rs6000.md

@@ -1883,7 +1883,7 @@
     ;
   else if (TARGET_POWERPC)
     {
-      operands[2] = force_reg (SImode, operands[2]);
+      operands[2] = force_reg (<MODE>mode, operands[2]);
       if (TARGET_POWER)
 	{
 	  emit_insn (gen_divsi3_mq (operands[0], operands[1], operands[2]));
@@ -2856,9 +2856,12 @@
 {
   /* Do not handle 16/8 bit structures that fit in HI/QI modes directly, since
      the (SUBREG:SI (REG:HI xxx)) that is otherwise generated can confuse the
-     compiler if the address of the structure is taken later.  */
+     compiler if the address of the structure is taken later.  Likewise, do
+     not handle invalid E500 subregs.  */
   if (GET_CODE (operands[0]) == SUBREG
-      && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (operands[0]))) < UNITS_PER_WORD))
+      && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (operands[0]))) < UNITS_PER_WORD
+	  || ((TARGET_E500_DOUBLE || TARGET_SPE)
+	      && invalid_e500_subreg (operands[0], GET_MODE (operands[0])))))
     FAIL;
 
   if (TARGET_POWERPC64 && GET_MODE (operands[0]) == DImode)
@@ -7786,8 +7789,7 @@
 (define_expand "movtf"
   [(set (match_operand:TF 0 "general_operand" "")
 	(match_operand:TF 1 "any_operand" ""))]
-  "!TARGET_IEEEQUAD
+  "!TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128"
-   && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
   "{ rs6000_emit_move (operands[0], operands[1], TFmode); DONE; }")
 
 ; It's important to list the o->f and f->o moves before f->f because
@@ -7806,6 +7808,19 @@
 { rs6000_split_multireg_move (operands[0], operands[1]); DONE; }
   [(set_attr "length" "8,8,8,20,20,16")])
 
+(define_insn_and_split "*movtf_softfloat"
+  [(set (match_operand:TF 0 "nonimmediate_operand" "=r,Y,r")
+	(match_operand:TF 1 "input_operand"         "YGHF,r,r"))]
+  "!TARGET_IEEEQUAD
+   && (TARGET_SOFT_FLOAT || !TARGET_FPRS) && TARGET_LONG_DOUBLE_128
+   && (gpc_reg_operand (operands[0], TFmode)
+       || gpc_reg_operand (operands[1], TFmode))"
+  "#"
+  "&& reload_completed"
+  [(pc)]
+{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; }
+  [(set_attr "length" "20,20,16")])
+
 (define_expand "extenddftf2"
   [(parallel [(set (match_operand:TF 0 "nonimmediate_operand" "")
 		   (float_extend:TF (match_operand:DF 1 "input_operand" "")))

gnu/dist/gcc4/gcc/config/rs6000/spe.md

@@ -32,6 +32,9 @@
    (E500_CR_IOR_COMPARE 1012)
    ])
 
+;; Modes using a 64-bit register.
+(define_mode_macro SPE64 [DF V4HI V2SF V1DI V2SI])
+
 (define_insn "*negsf2_gpr"
   [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
         (neg:SF (match_operand:SF 1 "gpc_reg_operand" "r")))]
@@ -2223,6 +2226,11 @@
     case 0:
       return \"evmergehi %0,%1,%1\;mr %L0,%1\";
     case 1:
+      /* If the address is not offsettable we need to load the whole
+	 doubleword into a 64-bit register and then copy the high word
+	 to form the correct output layout.  */
+      if (!offsettable_nonstrict_memref_p (operands[1]))
+	return \"evldd%X1 %L0,%y1\;evmergehi %0,%L0,%L0\";
       /* If the low-address word is used in the address, we must load
 	it last.  Otherwise, load it first.  Note that we cannot have
 	auto-increment in that case since the address register is
@@ -2236,17 +2244,39 @@
 }"
   [(set_attr "length" "8,8")])
 
-(define_insn "*mov_sidf_e500_subreg0"
+(define_insn "*mov_si<mode>_e500_subreg0"
-  [(set (subreg:SI (match_operand:DF 0 "register_operand" "+r") 0)
+  [(set (subreg:SI (match_operand:SPE64 0 "register_operand" "+r,&r") 0)
-	(match_operand:SI 1 "register_operand" "r"))]
+	(match_operand:SI 1 "input_operand" "r,m"))]
-  "TARGET_E500_DOUBLE"
+  "(TARGET_E500_DOUBLE && <MODE>mode == DFmode) || (TARGET_SPE && <MODE>mode != DFmode)"
-  "evmergelo %0,%1,%0")
+  "@
+   evmergelo %0,%1,%0
+   evmergelohi %0,%0,%0\;{l%U1%X1|lwz%U1%X1} %0,%1\;evmergelohi %0,%0,%0")
 
-(define_insn "*mov_sidf_e500_subreg4"
+;; ??? Could use evstwwe for memory stores in some cases, depending on
-  [(set (subreg:SI (match_operand:DF 0 "register_operand" "+r") 4)
+;; the offset.
-	(match_operand:SI 1 "register_operand" "r"))]
+(define_insn "*mov_si<mode>_e500_subreg0_2"
-  "TARGET_E500_DOUBLE"
+  [(set (match_operand:SI 0 "rs6000_nonimmediate_operand" "+r,m")
-  "mr %0,%1")
+	(subreg:SI (match_operand:SPE64 1 "register_operand" "+r,&r") 0))]
+  "(TARGET_E500_DOUBLE && <MODE>mode == DFmode) || (TARGET_SPE && <MODE>mode != DFmode)"
+  "@
+   evmergehi %0,%0,%1
+   evmergelohi %1,%1,%1\;{st%U0%X0|stw%U0%X0} %1,%0")
+
+(define_insn "*mov_si<mode>_e500_subreg4"
+  [(set (subreg:SI (match_operand:SPE64 0 "register_operand" "+r,r") 4)
+	(match_operand:SI 1 "input_operand" "r,m"))]
+  "(TARGET_E500_DOUBLE && <MODE>mode == DFmode) || (TARGET_SPE && <MODE>mode != DFmode)"
+  "@
+   mr %0,%1
+   {l%U1%X1|lwz%U1%X1} %0,%1")
+
+(define_insn "*mov_si<mode>_e500_subreg4_2"
+  [(set (match_operand:SI 0 "rs6000_nonimmediate_operand" "+r,m")
+	(subreg:SI (match_operand:SPE64 1 "register_operand" "r,r") 4))]
+  "(TARGET_E500_DOUBLE && <MODE>mode == DFmode) || (TARGET_SPE && <MODE>mode != DFmode)"
+  "@
+   mr %0,%1
+   {st%U0%X0|stw%U0%X0} %1,%0")
 
 ;; FIXME: Allow r=CONST0.
 (define_insn "*movdf_e500_double"
@@ -2387,15 +2417,16 @@
   "{ rs6000_emit_move (operands[0], operands[1], V4HImode); DONE; }")
 
 (define_insn "*movv4hi_internal"
-  [(set (match_operand:V4HI 0 "nonimmediate_operand" "=m,r,r")
+  [(set (match_operand:V4HI 0 "nonimmediate_operand" "=m,r,r,r")
-	(match_operand:V4HI 1 "input_operand" "r,m,r"))]
+	(match_operand:V4HI 1 "input_operand" "r,m,r,W"))]
   "TARGET_SPE
    && (gpc_reg_operand (operands[0], V4HImode)
        || gpc_reg_operand (operands[1], V4HImode))"
   "@
    evstdd%X0 %1,%y0
    evldd%X1 %0,%y1
-   evor %0,%1,%1"
+   evor %0,%1,%1
+   evxor %0,%0,%0"
   [(set_attr "type" "vecload")])
 
 (define_expand "movv2sf"

gnu/dist/gcc4/gcc/config/rs6000/sync.md

@@ -569,6 +569,11 @@
   [(set (mem:BLK (match_scratch 0 "X"))
 	(unspec_volatile:BLK [(mem:BLK (match_scratch 1 "X"))] UNSPEC_LWSYNC))]
   ""
-  ".long 0x7c2004ac"
+{
+  if (TARGET_NO_LWSYNC)
+    return "sync";
+  else
+    return ".long 0x7c2004ac";
+}
   [(set_attr "type" "sync")])
 

gnu/dist/gcc4/gcc/config/s390/linux.h

@@ -89,6 +89,7 @@ Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
           %{m31:-dynamic-linker /lib/ld.so.1} \
           %{m64:-dynamic-linker /lib/ld64.so.1}}}}"
 
+#define CPP_SPEC "%{posix:-D_POSIX_SOURCE} %{pthread:-D_REENTRANT}"
 
 #define TARGET_ASM_FILE_END file_end_indicate_exec_stack
 

gnu/dist/gcc4/gcc/config/s390/predicates.md

@@ -62,7 +62,8 @@
 ;; Allow SYMBOL_REFs and @PLT stubs.
 
 (define_special_predicate "bras_sym_operand"
-  (ior (match_code "symbol_ref")
+  (ior (and (match_code "symbol_ref")
+	    (match_test "!flag_pic || SYMBOL_REF_LOCAL_P (op)"))
        (and (match_code "const")
 	    (and (match_test "GET_CODE (XEXP (op, 0)) == UNSPEC")
 		 (match_test "XINT (XEXP (op, 0), 1) == UNSPEC_PLT")))))
@@ -125,8 +126,8 @@
       if (GET_CODE (XEXP (op, 1)) != CONST_INT
           || (INTVAL (XEXP (op, 1)) & 1) != 0)
         return false;
-      if (INTVAL (XEXP (op, 1)) >= (HOST_WIDE_INT)1 << 32
+      if (INTVAL (XEXP (op, 1)) >= (HOST_WIDE_INT)1 << 31
-	  || INTVAL (XEXP (op, 1)) < -((HOST_WIDE_INT)1 << 32))
+	  || INTVAL (XEXP (op, 1)) < -((HOST_WIDE_INT)1 << 31))
         return false;
       op = XEXP (op, 0);
     }

gnu/dist/gcc4/gcc/config/s390/s390.c

@@ -767,6 +767,24 @@ s390_emit_compare (enum rtx_code code, rtx op0, rtx op1)
   return ret;
 }
 
+/* Emit a SImode compare and swap instruction setting MEM to NEW if OLD
+   matches CMP.
+   Return the correct condition RTL to be placed in the IF_THEN_ELSE of the
+   conditional branch testing the result.  */
+
+static rtx
+s390_emit_compare_and_swap (enum rtx_code code, rtx old, rtx mem, rtx cmp, rtx new)
+{
+  rtx ret;
+
+  emit_insn (gen_sync_compare_and_swap_ccsi (old, mem, cmp, new));
+  ret = gen_rtx_fmt_ee (code, VOIDmode, s390_compare_emitted, const0_rtx);
+
+  s390_compare_emitted = NULL_RTX;
+
+  return ret;
+}
+
 /* Emit a jump instruction to TARGET.  If COND is NULL_RTX, emit an
    unconditional jump, else a conditional jump under condition COND.  */
 
@@ -2987,7 +3005,10 @@ legitimize_pic_address (rtx orig, rtx reg)
 		|| (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (op0)))
 	      && GET_CODE (op1) == CONST_INT)
 	    {
-              if (TARGET_CPU_ZARCH && larl_operand (op0, VOIDmode))
+              if (TARGET_CPU_ZARCH
+		  && larl_operand (op0, VOIDmode)
+		  && INTVAL (op1) < (HOST_WIDE_INT)1 << 31
+		  && INTVAL (op1) >= -((HOST_WIDE_INT)1 << 31))
                 {
                   if (INTVAL (op1) & 1)
                     {
@@ -2997,7 +3018,7 @@ legitimize_pic_address (rtx orig, rtx reg)
 
                       if (!DISP_IN_RANGE (INTVAL (op1)))
                         {
-                          int even = INTVAL (op1) - 1;
+                          HOST_WIDE_INT even = INTVAL (op1) - 1;
                           op0 = gen_rtx_PLUS (Pmode, op0, GEN_INT (even));
 			  op0 = gen_rtx_CONST (Pmode, op0);
                           op1 = const1_rtx;
@@ -4172,11 +4193,9 @@ s390_expand_cs_hqi (enum machine_mode mode, rtx target, rtx mem, rtx cmp, rtx ne
     newv = force_reg (SImode, expand_simple_binop (SImode, IOR, new, val,
 						   NULL_RTX, 1, OPTAB_DIRECT));
 
-  /* Emit compare_and_swap pattern.  */
-  emit_insn (gen_sync_compare_and_swap_ccsi (res, ac.memsi, cmpv, newv));
-      
   /* Jump to end if we're done (likely?).  */
-  s390_emit_jump (csend, s390_emit_compare (EQ, cmpv, ac.memsi));
+  s390_emit_jump (csend, s390_emit_compare_and_swap (EQ, res, ac.memsi,
+						     cmpv, newv));
 
   /* Check for changes outside mode.  */
   resv = expand_simple_binop (SImode, AND, res, ac.modemaski, 
@@ -4269,13 +4288,9 @@ s390_expand_atomic (enum machine_mode mode, enum rtx_code code,
     default:
       gcc_unreachable ();
     }
-  /* Emit compare_and_swap pattern.  */
-  emit_insn (gen_sync_compare_and_swap_ccsi (cmp, ac.memsi, cmp, new));
 
-  /* Loop until swapped (unlikely?).  */
+  s390_emit_jump (csloop, s390_emit_compare_and_swap (NE, cmp,
-  s390_emit_jump (csloop, gen_rtx_fmt_ee (NE, CCZ1mode,
+						      ac.memsi, cmp, new));
-					  gen_rtx_REG (CCZ1mode, CC_REGNUM),
-					  const0_rtx));
 
   /* Return the correct part of the bitfield.  */
   if (target)
@@ -6702,8 +6717,8 @@ s390_init_frame_layout (void)
       /* Try to predict whether we'll need the base register.  */
       base_used = cfun->machine->split_branches_pending_p
 		  || current_function_uses_const_pool
-		  || (!DISP_IN_RANGE (-frame_size)
+		  || (!DISP_IN_RANGE (frame_size)
-		      && !CONST_OK_FOR_K (-frame_size));
+		      && !CONST_OK_FOR_K (frame_size));
 
       /* Decide which register to use as literal pool base.  In small
 	 leaf functions, try to use an unused call-clobbered register

gnu/dist/gcc4/libcpp/ChangeLog

@@ -1,3 +1,9 @@
+2006-12-29  Jakub Jelinek  <jakub@redhat.com>
+
+	PR preprocessor/29612
+	* directives.c (do_linemarker): Set pfile->buffer->sysp always, not
+	only when new_sysp is non-zero.
+
 2006-05-24  Release Manager
 
 	* GCC 4.1.1 released.

gnu/dist/gcc4/libcpp/directives.c

@@ -951,8 +951,8 @@ do_linemarker (cpp_reader *pfile)
 	  flag = read_flag (pfile, flag);
 	  if (flag == 4)
 	    new_sysp = 2;
-	  pfile->buffer->sysp = new_sysp;
 	}
+      pfile->buffer->sysp = new_sysp;
 
       check_eol (pfile);
     }

gnu/dist/gcc4/libstdc++-v3/ChangeLog

@@ -1,3 +1,76 @@
+2006-12-12  Benjamin Kosnik  <bkoz@redhat.com>
+
+        PR libstdc++/28265
+        * crossconfig.m4: Remove GLIBCXX_CHECK_ICONV_SUPPORT call for
+        mingw crosses.
+        * configure: Regenerate.
+
+2006-12-12  Benjamin Kosnik  <bkoz@redhat.com>
+
+	PR libstdc++/26497
+	* crossconfig.m4: Add GLIBCXX_CHECK_LINKER_FEATURES for Solaris.
+	* acinclude.m4 (GLIBCXX_CHECK_LINKER_FEATURES): Set
+	glibcxx_gnu_ld_version only when with GNU ld confirmed.	
+	* configure: Regenerate.
+
+2006-12-11  Benjamin Kosnik  <bkoz@redhat.com>
+
+	PR libstdc++/28125
+	* acinclude.m4 (GLIBCXX_CHECK_ICONV_SUPPORT): Remove link test, ie
+	AC_CHECK_LIB for libiconv. Instead, use bits of AM_ICONV.
+        * configure: Regenerate.
+        * scripts/testsuite_flags.in (cxxflags): Add LIBICONV bits.
+
+2006-12-10  Mark Mitchell  <mark@codesourcery.com>
+
+	PR c++/29732
+	* testsuite/ext/pb_assoc/example/mapping_level_neg.cc: Tweak error
+	markers. 
+
+2006-12-08  Jakub Jelinek  <jakub@redhat.com>
+
+	* testsuite/testsuite_hooks.cc (set_memory_limits): Don't set
+	RLIMIT_AS below 16MB on x86_64-linux.
+
+2006-11-18  Joseph Myers  <joseph@codesourcery.com>
+
+	* config/cpu/powerpc/atomic_word.h (_GLIBCXX_WRITE_MEM_BARRIER):
+	Use plain sync if __NO_LWSYNC__.
+
+2006-11-14  Joseph Myers  <joseph@codesourcery.com>
+
+	* testsuite/26_numerics/complex/13450.cc: Do not test long double
+	in IBM long double case.
+
+2006-11-13  Paolo Carlini  <pcarlini@suse.de>
+
+	* src/debug.cc (_Safe_sequence_base::_M_revalidate_singular): Fix
+	pasto, advance __iter only once per iteration.
+
+2006-11-10  Jakub Jelinek  <jakub@redhat.com>
+
+	* config/locale/gnu/c_locale.cc (__convert_to_v): Prefer
+	strtold_l over __strtold_l if available.
+
+2006-10-30  Paolo Carlini  <pcarlini@suse.de>
+
+	* testsuite/tr1/6_containers/array/capacity/max_size.cc: Actually
+	do test max_size().
+
+2006-10-28  Paolo Carlini  <pcarlini@suse.de>
+	
+	* include/tr1/array (array<>::_M_at): New.
+	(array<>::at): Fix off-by-one bug, use the above.
+	* testsuite/tr1/6_containers/array/element_access/
+	at_out_of_range.cc: Adjust.
+
+	* include/tr1/array (class array<>): Remove non-conforming default
+	for the second parameter.
+	* include/ext/array_allocator.h: Adjust.
+
+	* include/tr1/array (array<>::front, array<>::back): Do not return
+	a reference to memory not belonging to the array when _Nm == 0.
+
 2006-10-16  Jakub Jelinek  <jakub@redhat.com>
 
 	* include/bits/basic_string.tcc (_Rep::_S_create): Call

gnu/dist/gcc4/libstdc++-v3/acinclude.m4

@@ -222,12 +222,14 @@ AC_DEFUN([GLIBCXX_CHECK_LINKER_FEATURES], [
 
   # Start by getting the version number.  I think the libtool test already
   # does some of this, but throws away the result.
+  if test x"$with_gnu_ld" = x"yes"; then
     changequote(,)
     ldver=`$LD --version 2>/dev/null | head -1 | \
            sed -e 's/GNU ld version \([0-9.][0-9.]*\).*/\1/'`
     changequote([,])
     glibcxx_gnu_ld_version=`echo $ldver | \
            $AWK -F. '{ if (NF<3) [$]3=0; print ([$]1*100+[$]2)*100+[$]3 }'`
+  fi
 
   # Set --gc-sections.
   if test "$with_gnu_ld" = "notbroken"; then
@@ -307,20 +309,30 @@ AC_DEFUN([GLIBCXX_CHECK_ICONV_SUPPORT], [
   # Only continue checking if the ISO C99 headers exist and support is on.
   if test x"$enable_wchar_t" = xyes; then
 
+    # From Bruno Haible's AM_ICONV, but without link tests.
+    # Check for existence of libiconv.a providing XPG2 wchar_t support.
+    # Some systems have iconv in libc, some have it in libiconv (OSF/1 and
+    # those with the standalone portable GNU libiconv installed).
+    AC_ARG_WITH([libiconv-prefix],
+[  --with-libiconv-prefix=DIR  search for libiconv in DIR/include and DIR/lib], [  for dir in `echo "$withval" | tr : ' '`; do
+      if test -d $dir/include; then CPPFLAGS="$CPPFLAGS -I$dir/include"; fi
+      if test -d $dir/lib; then LIBICONV="$LIBICONV -L$dir/lib"; fi
+    done
+    LIBICONV="$LIBICONV -liconv"
+   ])
+   if test x"$LIBICONV" != x; then
+     AC_MSG_NOTICE([--with-libiconv-prefix is $LIBICONV])
+   fi
+
     # Use iconv for wchar_t to char conversions. As such, check for
     # X/Open Portability Guide, version 2 features (XPG2).
     AC_CHECK_HEADER(iconv.h, ac_has_iconv_h=yes, ac_has_iconv_h=no)
     AC_CHECK_HEADER(langinfo.h, ac_has_langinfo_h=yes, ac_has_langinfo_h=no)
 
-    # Check for existence of libiconv.a providing XPG2 wchar_t support.
-    AC_CHECK_LIB(iconv, iconv, LIBICONV="-liconv")
     ac_save_LIBS="$LIBS"
     LIBS="$LIBS $LIBICONV"
-    AC_SUBST(LIBICONV)
-
     AC_CHECK_FUNCS([iconv_open iconv_close iconv nl_langinfo],
     [ac_XPG2funcs=yes], [ac_XPG2funcs=no])
-
     LIBS="$ac_save_LIBS"
 
     if test x"$ac_has_iconv_h" = xyes &&
@@ -330,6 +342,7 @@ AC_DEFUN([GLIBCXX_CHECK_ICONV_SUPPORT], [
       AC_DEFINE([_GLIBCXX_USE_ICONV],1,
 	        [Define if iconv and related functions exist and are usable.])
       enable_iconv=yes
+      AC_SUBST(LIBICONV)
     fi
   fi
   AC_MSG_CHECKING([for enabled iconv specializations])

gnu/dist/gcc4/libstdc++-v3/config/cpu/powerpc/atomic_word.h

@@ -33,6 +33,10 @@
 typedef int _Atomic_word;
 
 #define _GLIBCXX_READ_MEM_BARRIER __asm __volatile ("isync":::"memory")
+#ifdef __NO_LWSYNC__
+#define _GLIBCXX_WRITE_MEM_BARRIER __asm __volatile ("sync":::"memory")
+#else
 #define _GLIBCXX_WRITE_MEM_BARRIER __asm __volatile ("lwsync":::"memory")
+#endif
 
 #endif 

gnu/dist/gcc4/libstdc++-v3/config/locale/gnu/c_locale.cc

@@ -77,7 +77,13 @@ namespace std
     {
       char* __sanity;
       errno = 0;
+#if __GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ > 2)
+      // Prefer strtold_l, as __strtold_l isn't prototyped in more recent
+      // glibc versions.
+      long double __ld = strtold_l(__s, &__sanity, __cloc);
+#else
       long double __ld = __strtold_l(__s, &__sanity, __cloc);
+#endif
       if (__sanity != __s && errno != ERANGE)
 	__v = __ld;
       else

gnu/dist/gcc4/libstdc++-v3/include/ext/array_allocator.h

@@ -1,6 +1,6 @@
 // array allocator -*- C++ -*-
 
-// Copyright (C) 2004, 2005 Free Software Foundation, Inc.
+// Copyright (C) 2004, 2005, 2006 Free Software Foundation, Inc.
 //
 // This file is part of the GNU ISO C++ Library.  This library is free
 // software; you can redistribute it and/or modify it under the
@@ -84,7 +84,7 @@ namespace __gnu_cxx
    *  @brief  An allocator that uses previously allocated memory.
    *  This memory can be externally, globally, or otherwise allocated.
    */
-  template<typename _Tp, typename _Array = std::tr1::array<_Tp> >
+  template<typename _Tp, typename _Array = std::tr1::array<_Tp, 1> >
     class array_allocator : public array_allocator_base<_Tp>
     {
     public:

gnu/dist/gcc4/libstdc++-v3/include/tr1/array

@@ -47,7 +47,7 @@ namespace tr1
 {
   /// @brief  struct array [6.2.2].
   /// NB: Requires complete type _Tp.
-  template<typename _Tp, std::size_t _Nm = 1>
+  template<typename _Tp, std::size_t _Nm>
     struct array
     {
       typedef _Tp 	    			      value_type;
@@ -60,9 +60,6 @@ namespace tr1
       typedef std::reverse_iterator<iterator>	      reverse_iterator;
       typedef std::reverse_iterator<const_iterator>   const_reverse_iterator;
 
-      // Compile time constant without other dependencies.
-      enum { _S_index = _Nm };
-
       // Support for zero-sized arrays mandatory.
       value_type _M_instance[_Nm ? _Nm : 1] __attribute__((__aligned__));
 
@@ -128,21 +125,13 @@ namespace tr1
       operator[](size_type __n) const
       { return _M_instance[__n]; }
 
-      const_reference 
-      at(size_type __n) const
-      { 
-	if (__builtin_expect(__n > _Nm, false))
-	  std::__throw_out_of_range("array::at");
-	return _M_instance[__n]; 
-      }
-
       reference
       at(size_type __n)
-      { 
+      { return _M_at<_Nm>(__n); }
-	if (__builtin_expect(__n > _Nm, false))
+
-	  std::__throw_out_of_range("array::at");
+      const_reference
-	return _M_instance[__n]; 
+      at(size_type __n) const
-      }
+      { return _M_at<_Nm>(__n); }
 
       reference 
       front()
@@ -154,11 +143,11 @@ namespace tr1
 
       reference 
       back()
-      { return *(end() - 1); }
+      { return _Nm ? *(end() - 1) : *end(); }
 
       const_reference 
       back() const
-      { return *(end() - 1); }
+      { return _Nm ? *(end() - 1) : *end(); }
 
       _Tp* 
       data()
@@ -167,6 +156,42 @@ namespace tr1
       const _Tp* 
       data() const
       { return &_M_instance[0]; }
+
+    private:
+      template<std::size_t _Mm>
+        typename std::__enable_if<reference, _Mm>::__type
+        _M_at(size_type __n)
+        {
+	  if (__builtin_expect(__n >= _Mm, false))
+	    std::__throw_out_of_range("array::_M_at");
+	  return _M_instance[__n];
+	}
+
+      // Avoid "unsigned comparison with zero" warnings.
+      template<std::size_t _Mm>
+        typename std::__enable_if<reference, !_Mm>::__type
+        _M_at(size_type)
+        {
+	  std::__throw_out_of_range("array::_M_at");
+	  return _M_instance[0];
+	}
+
+      template<std::size_t _Mm>
+        typename std::__enable_if<const_reference, _Mm>::__type
+        _M_at(size_type __n) const
+        {
+	  if (__builtin_expect(__n >= _Mm, false))
+	    std::__throw_out_of_range("array::_M_at");
+	  return _M_instance[__n];
+	}
+
+      template<std::size_t _Mm>
+        typename std::__enable_if<const_reference, !_Mm>::__type
+        _M_at(size_type) const
+        {
+	  std::__throw_out_of_range("array::_M_at");
+	  return _M_instance[0];
+	}     
     };
 
   // Array comparisons.

gnu/dist/gcc4/libstdc++-v3/scripts/testsuite_flags.in

@@ -48,7 +48,8 @@ case ${query} in
       ;;
     --cxxflags)
       CXXFLAGS_save="-g -O2 -D_GLIBCXX_ASSERT"
-      CXXFLAGS_config='@SECTION_FLAGS@ @SECTION_LDFLAGS@ -fmessage-length=0 
+      CXXFLAGS_config='@SECTION_FLAGS@ @SECTION_LDFLAGS@ @LIBICONV@
+                       -fmessage-length=0 
  		       @EXTRA_CXX_FLAGS@ -DLOCALEDIR="@glibcxx_localedir@" '
       echo ${CXXFLAGS_save} ${CXXFLAGS_config}
       ;;

gnu/dist/gcc4/libstdc++-v3/src/debug.cc

@@ -151,18 +151,13 @@ namespace __gnu_debug
   _Safe_sequence_base::
   _M_revalidate_singular()
   {
-    _Safe_iterator_base* __iter;
+    for (_Safe_iterator_base* __iter = _M_iterators; __iter;
-    for (__iter = _M_iterators; __iter; __iter = __iter->_M_next)
+	 __iter = __iter->_M_next)
-      {
       __iter->_M_version = _M_version;
-	__iter = __iter->_M_next;
-      }
 
-    for (__iter = _M_const_iterators; __iter; __iter = __iter->_M_next)
+    for (_Safe_iterator_base* __iter2 = _M_const_iterators; __iter2;
-      {
+	 __iter2 = __iter2->_M_next)
-	__iter->_M_version = _M_version;
+      __iter2->_M_version = _M_version;
-	__iter = __iter->_M_next;
-      }
   }
 
   void 

gnu/dist/gcc4/libstdc++-v3/testsuite/26_numerics/complex/13450.cc

@@ -61,6 +61,11 @@ void test01()
   d2 = 1.4;
   test01_do(d1, d2);
 
+#if __LDBL_MANT_DIG__ != 106
+  /* For IBM long double, epsilon is too small (since 1.0 plus any
+     double is representable) to be able to expect results within
+     epsilon * 100 (which may be much less than 1ulp for a particular
+     long double value).  */
   long double ld1 = -1.0l;
   long double ld2 = 0.5l;
   test01_do(ld1, ld2);
@@ -68,6 +73,7 @@ void test01()
   ld1 = -3.2l;
   ld2 = 1.4l;
   test01_do(ld1, ld2);
+#endif
 }
 
 int main()

gnu/dist/gcc4/libstdc++-v3/testsuite/ext/pb_assoc/example/mapping_level_neg.cc

@@ -77,7 +77,7 @@ main()
    * t1 is a "map" type, and cannot be rebound.
    **/
 
-  typedef t_1::rebind<1>::other t_1_rebound; // { dg-error "expected" }
+  typedef t_1::rebind<1>::other t_1_rebound; // { dg-error "parameter-lists" }
 }
 
 

gnu/dist/gcc4/libstdc++-v3/testsuite/testsuite_hooks.cc

@@ -89,6 +89,16 @@ namespace __gnu_test
 #endif
 
     // Virtual memory.
+    // On x86_64-linux, the default is -z max-page-size=0x200000
+    // which means up to 2MB of address space are accounted for
+    // PROT_NONE mappings between text and data segments of
+    // each shared library.  There are 4 shared libs involved
+    // in addition to the dynamic linker.  Use at least 16MB address space
+    // limit.
+#if defined(__x86_64__) && defined(__linux__)
+    if (limit < 16777216)
+      limit = 16777216;
+#endif
     // On HP-UX 11.23, a trivial C++ program that sets RLIMIT_AS to
     // anything less than 128MB cannot "malloc" even 1K of memory.
     // Therefore, we skip RLIMIT_AS on HP-UX.

gnu/dist/gcc4/libstdc++-v3/testsuite/tr1/6_containers/array/capacity/max_size.cc

@@ -1,6 +1,6 @@
 // 2004-10-20  Benjamin Kosnik  <bkoz@redhat.com>
 //
-// Copyright (C) 2004 Free Software Foundation, Inc.
+// Copyright (C) 2004, 2005, 2006 Free Software Foundation, Inc.
 //
 // This file is part of the GNU ISO C++ Library.  This library is free
 // software; you can redistribute it and/or modify it under the
@@ -32,7 +32,7 @@ test01()
     bool test __attribute__((unused)) = true;
     array_type a = { 0, 1, 2, 3, 4 };
     
-    VERIFY( a.size() == len );
+    VERIFY( a.max_size() == len );
   }
 
   {
@@ -41,7 +41,7 @@ test01()
     bool test __attribute__((unused)) = true;
     array_type a;
     
-    VERIFY( a.size() == len );
+    VERIFY( a.max_size() == len );
   }
 }
 
@@ -50,4 +50,3 @@ int main()
   test01();
   return 0;
 }
-

gnu/dist/gcc4/libstdc++-v3/testsuite/tr1/6_containers/array/element_access/at_out_of_range.cc

@@ -1,6 +1,6 @@
 // 2004-10-20  Benjamin Kosnik  <bkoz@redhat.com>
 //
-// Copyright (C) 2004 Free Software Foundation, Inc.
+// Copyright (C) 2004, 2005, 2006 Free Software Foundation, Inc.
 //
 // This file is part of the GNU ISO C++ Library.  This library is free
 // software; you can redistribute it and/or modify it under the
@@ -22,6 +22,7 @@
 
 #include <tr1/array>
 #include <stdexcept>
+#include <testsuite_hooks.h>
 
 void
 test01() 
@@ -34,15 +35,17 @@ test01()
   try
     {
       a.at(len);
+      VERIFY( false );
     }
   catch(std::out_of_range& obj)
     {
       // Expected.
+      VERIFY( true );
     }
   catch(...)
     {
       // Failed.
-      throw;
+      VERIFY( false );
     }
 }
 
@@ -51,4 +54,3 @@ int main()
   test01();
   return 0;
 }
-