midway update:
[1] add EN_ENIDMAFIX - the byte-aligner on the ENI version of the card appears to lose under heavy load so avoid using it. see comment in midway.c for full details. note that the Adaptec version of the card works properly under load. detected by Kenjiro Cho <kjc@csl.sony.co.jp> [confirmed by chuck] fix by chuck & kjc [2] update some freebsd specific code [from kjc] [3] for circular buffers: ensure there is always one free slot so that we can easily tell the difference between a full and empty list. re-structure a few loops to reflect this. fixes a problem with mbufs being free'd while still in DMA, and makes drive a bit more robust. detected and fixed by kjc
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chuck
parent
9f482818bc
commit
d3a7613827
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@ -1,5 +1,5 @@
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/* $NetBSD: midway.c,v 1.29 1997/07/07 22:52:17 cgd Exp $ */
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/* (sync'd to midway.c 1.67) */
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/* $NetBSD: midway.c,v 1.30 1997/09/29 17:40:38 chuck Exp $ */
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/* (sync'd to midway.c 1.68) */
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/*
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*
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@ -61,6 +61,33 @@
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#define EN_NOWMAYBE 1 /* hook to disable word maybe DMA */
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/* XXX: WMAYBE doesn't work, needs debugging */
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#define EN_DDBHOOK 1 /* compile in ddb functions */
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#if defined(MIDWAY_ADPONLY)
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#define EN_ENIDMAFIX 0 /* no ENI cards to worry about */
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#else
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#define EN_ENIDMAFIX 1 /* avoid byte DMA on the ENI card (see below) */
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#endif
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/*
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* note on EN_ENIDMAFIX: the byte aligner on the ENI version of the card
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* appears to be broken. it works just fine if there is no load... however
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* when the card is loaded the data get corrupted. to see this, one only
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* has to use "telnet" over ATM. do the following command in "telnet":
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* cat /usr/share/misc/termcap
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* "telnet" seems to generate lots of 1023 byte mbufs (which make great
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* use of the byte aligner). watch "netstat -s" for checksum errors.
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*
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* I further tested this by adding a function that compared the transmit
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* data on the card's SRAM with the data in the mbuf chain _after_ the
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* "transmit DMA complete" interrupt. using the "telnet" test I got data
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* mismatches where the byte-aligned data should have been. using ddb
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* and en_dumpmem() I verified that the DTQs fed into the card were
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* absolutely correct. thus, we are forced to concluded that the ENI
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* hardware is buggy. note that the Adaptec version of the card works
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* just fine with byte DMA.
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*
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* bottom line: we set EN_ENIDMAFIX to 1 to avoid byte DMAs on the ENI
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* card.
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*/
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#if defined(DIAGNOSTIC) && !defined(EN_DIAG)
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#define EN_DIAG /* link in with master DIAG option */
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@ -93,7 +120,11 @@
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#if defined(__NetBSD__) || defined(__OpenBSD__) || defined(__bsdi__)
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#include <sys/device.h>
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#endif
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#if defined(__FreeBSD__)
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#include <sys/sockio.h>
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#else
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#include <sys/ioctl.h>
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#endif
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <sys/socketvar.h>
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@ -128,8 +159,8 @@
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#elif defined(__FreeBSD__)
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#include <machine/cpufunc.h> /* for rdtsc proto for clock.h below */
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#include <machine/clock.h> /* for DELAY */
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#include <pci/midwayreg.h>
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#include <pci/midwayvar.h>
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#include <dev/en/midwayreg.h>
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#include <dev/en/midwayvar.h>
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#include <vm/pmap.h> /* for vtophys proto */
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/*
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@ -755,6 +786,14 @@ done_probe:
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printf("%s: EN_NTX/EN_TXSZ/EN_RXSZ too big\n", sc->sc_dev.dv_xname);
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return;
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}
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/*
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* ensure that there is always one VC slot on the service list free
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* so that we can tell the difference between a full and empty list.
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*/
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if (sc->en_nrx >= MID_N_VC)
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sc->en_nrx = MID_N_VC - 1;
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for (lcv = 0 ; lcv < sc->en_nrx ; lcv++) {
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sc->rxslot[lcv].rxhand = NULL;
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sc->rxslot[lcv].oth_flags = ENOTHER_FREE;
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@ -1336,20 +1375,30 @@ struct en_softc *sc;
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/*
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* init obmem data structures: vc tab, dma q's, slist.
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*
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* note that we set drq_free/dtq_free to one less than the total number
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* of DTQ/DRQs present. we do this because the card uses the condition
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* (drq_chip == drq_us) to mean "list is empty"... but if you allow the
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* circular list to be completely full then (drq_chip == drq_us) [i.e.
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* the drq_us pointer will wrap all the way around]. by restricting
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* the number of active requests to (N - 1) we prevent the list from
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* becoming completely full. note that the card will sometimes give
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* us an interrupt for a DTQ/DRQ we have already processes... this helps
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* keep that interrupt from messing us up.
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*/
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for (vc = 0 ; vc < MID_N_VC ; vc++)
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en_loadvc(sc, vc);
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bzero(&sc->drq, sizeof(sc->drq));
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sc->drq_free = MID_DRQ_N;
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sc->drq_free = MID_DRQ_N - 1; /* N - 1 */
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sc->drq_chip = MID_DRQ_REG2A(EN_READ(sc, MID_DMA_RDRX));
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EN_WRITE(sc, MID_DMA_WRRX, MID_DRQ_A2REG(sc->drq_chip));
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/* ensure zero queue */
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sc->drq_us = sc->drq_chip;
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bzero(&sc->dtq, sizeof(sc->dtq));
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sc->dtq_free = MID_DTQ_N;
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sc->dtq_free = MID_DTQ_N - 1; /* N - 1 */
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sc->dtq_chip = MID_DTQ_REG2A(EN_READ(sc, MID_DMA_RDTX));
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EN_WRITE(sc, MID_DMA_WRTX, MID_DRQ_A2REG(sc->dtq_chip));
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/* ensure zero queue */
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@ -1474,7 +1523,8 @@ struct ifnet *ifp;
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mlen = 0;
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prev = NULL;
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while (1) {
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if (EN_NOTXDMA || !en_dma) { /* no DMA? */
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/* no DMA? */
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if ((!sc->is_adaptec && EN_ENIDMAFIX) || EN_NOTXDMA || !en_dma) {
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if ( (mtod(lastm, unsigned long) % sizeof(u_int32_t)) != 0 ||
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((lastm->m_len % sizeof(u_int32_t)) != 0 && lastm->m_next)) {
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first = (lastm == m);
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@ -2336,7 +2386,7 @@ void *arg;
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printf("%s: cleared need DTQ condition\n", sc->sc_dev.dv_xname);
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#endif
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}
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do { /* while idx != val */
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while (idx != val) {
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sc->dtq_free++;
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if ((dtq = sc->dtq[idx]) != 0) {
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sc->dtq[idx] = 0; /* don't forget to zero it out when done */
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@ -2352,7 +2402,7 @@ void *arg;
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m_freem(m);
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}
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EN_WRAPADD(0, MID_DTQ_N, idx, 1);
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} while (idx != val);
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}
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sc->dtq_chip = MID_DTQ_REG2A(val); /* sync softc */
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}
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@ -2384,7 +2434,7 @@ void *arg;
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if (reg & MID_INT_DMA_RX) {
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val = EN_READ(sc, MID_DMA_RDRX); /* chip's current location */
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idx = MID_DRQ_A2REG(sc->drq_chip);/* where we last saw chip */
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do { /* while (idx != val) */
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while (idx != val) {
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sc->drq_free++;
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if ((drq = sc->drq[idx]) != 0) {
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sc->drq[idx] = 0; /* don't forget to zero it out when done */
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@ -2431,7 +2481,7 @@ void *arg;
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}
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EN_WRAPADD(0, MID_DRQ_N, idx, 1);
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} while (idx != val);
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}
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sc->drq_chip = MID_DRQ_REG2A(val); /* sync softc */
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if (sc->need_drqs) { /* true if we had a DRQ shortage */
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@ -2450,7 +2500,7 @@ void *arg;
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if (reg & MID_INT_SERVICE) {
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chip = MID_SL_REG2A(EN_READ(sc, MID_SERV_WRITE));
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do { /* while sc->hwslistp != chip */
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while (sc->hwslistp != chip) {
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/* fetch and remove it from hardware service list */
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vci = EN_READ(sc, sc->hwslistp);
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@ -2483,7 +2533,7 @@ void *arg;
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printf("%s: added VCI %d to swslist\n", sc->sc_dev.dv_xname, vci);
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#endif
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}
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} while (sc->hwslistp != chip);
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}
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}
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/*
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@ -2633,8 +2683,8 @@ defer: /* defer processing */
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pdu = EN_READ(sc, pdu); /* get PDU in correct byte order */
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fill = tlen - MID_RBD_SIZE - MID_PDU_LEN(pdu);
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if (fill < 0 || (rbd & MID_RBD_CRCERR) != 0) {
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printf("%s: invalid AAL5 PDU length or CRC detected, dropping frame\n",
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sc->sc_dev.dv_xname);
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printf("%s: %s, dropping frame\n", sc->sc_dev.dv_xname,
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(rbd & MID_RBD_CRCERR) ? "CRC error" : "invalid AAL5 PDU length");
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printf("%s: got %d cells (%d bytes), AAL5 len is %d bytes (pdu=0x%x)\n",
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sc->sc_dev.dv_xname, MID_RBD_CNT(rbd), tlen - MID_RBD_SIZE,
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MID_PDU_LEN(pdu), pdu);
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