From d35fd4d21277c6746b1dafd58b911c0089079bad Mon Sep 17 00:00:00 2001
From: msaitoh <msaitoh@NetBSD.org>
Date: Fri, 15 May 2015 08:44:24 +0000
Subject: [PATCH]  Print operable voltage with aprint_verbose(). OK'ed by
 pgoyette@.

---
 sys/dev/ic/spdmem.c    | 17 +++++++++++++++--
 sys/dev/ic/spdmemvar.h |  4 ++--
 2 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/sys/dev/ic/spdmem.c b/sys/dev/ic/spdmem.c
index 65588c795a10..3a820ead631a 100644
--- a/sys/dev/ic/spdmem.c
+++ b/sys/dev/ic/spdmem.c
@@ -1,4 +1,4 @@
-/* $NetBSD: spdmem.c,v 1.13 2015/04/20 02:55:14 pgoyette Exp $ */
+/* $NetBSD: spdmem.c,v 1.14 2015/05/15 08:44:24 msaitoh Exp $ */
 
 /*
  * Copyright (c) 2007 Nicolas Joly
@@ -35,7 +35,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: spdmem.c,v 1.13 2015/04/20 02:55:14 pgoyette Exp $");
+__KERNEL_RCSID(0, "$NetBSD: spdmem.c,v 1.14 2015/05/15 08:44:24 msaitoh Exp $");
 
 #include <sys/param.h>
 #include <sys/device.h>
@@ -763,6 +763,19 @@ decode_ddr3(const struct sysctlnode *node, device_t self, struct spdmem *s) {
 		    s->sm_ddr3.ddr3_tCKmin);
 
 #undef	__DDR3_CYCLES
+
+	/* For DDR3, Voltage is written in another area */
+	if (!s->sm_ddr3.ddr3_NOT15V || s->sm_ddr3.ddr3_135V
+	    || s->sm_ddr3.ddr3_125V) {
+		aprint_verbose("%s:", device_xname(self));
+		if (!s->sm_ddr3.ddr3_NOT15V)
+			aprint_verbose(" 1.5V");
+		if (s->sm_ddr3.ddr3_135V)
+			aprint_verbose(" 1.35V");
+		if (s->sm_ddr3.ddr3_125V)
+			aprint_verbose(" 1.25V");
+		aprint_verbose(" operable\n");
+	}
 }
 
 static void
diff --git a/sys/dev/ic/spdmemvar.h b/sys/dev/ic/spdmemvar.h
index c2aa54e61b0f..7e8103fc10f0 100644
--- a/sys/dev/ic/spdmemvar.h
+++ b/sys/dev/ic/spdmemvar.h
@@ -1,4 +1,4 @@
-/* $NetBSD: spdmemvar.h,v 1.6 2015/04/20 07:51:36 ozaki-r Exp $ */
+/* $NetBSD: spdmemvar.h,v 1.7 2015/05/15 08:44:24 msaitoh Exp $ */
 
 /*
  * Copyright (c) 2007 Paul Goyette
@@ -437,7 +437,7 @@ struct spdmem_ddr3 {				/* Dual Data Rate 3 SDRAM */
 	SPD_BITFIELD(				\
 		uint8_t ddr3_NOT15V:1,		\
 		uint8_t ddr3_135V:1,		\
-		uint8_t ddr3_12XV:1,		\
+		uint8_t ddr3_125V:1,		\
 		uint8_t	ddr3_unused2:5		\
 	);
 	/* chipwidth in bits offset by 2: 0 = X4, 1 = X8, 2 = X16 */