From d34a5755d1da6184486fb14c3108db69640bbaa4 Mon Sep 17 00:00:00 2001 From: matt Date: Sat, 7 Sep 2013 22:51:03 +0000 Subject: [PATCH] start adding NFC registers fix AWIN_AHB_GATING0_USB_OHCI0 --- sys/arch/arm/allwinner/awin_reg.h | 93 +++++++++++++++++++++++++++++-- 1 file changed, 87 insertions(+), 6 deletions(-) diff --git a/sys/arch/arm/allwinner/awin_reg.h b/sys/arch/arm/allwinner/awin_reg.h index 58aa0c471fde..7b21c1c48400 100644 --- a/sys/arch/arm/allwinner/awin_reg.h +++ b/sys/arch/arm/allwinner/awin_reg.h @@ -224,6 +224,87 @@ #define AWIN_DRAM_HPCR_PRIORITY_LEVEL __BIT(2) #define AWIN_DRAM_HPCR_ACCESS_EN __BIT(0) +#define AWIN_NFC_CTL_REG 0x0000 +#define AWIN_NFC_ST_REG 0x0004 +#define AWIN_NFC_INT_REG 0x0008 +#define AWIN_NFC_TIMING_CTL_REG 0x000C +#define AWIN_NFC_TIMING_CFG_REG 0x0010 +#define AWIN_NFC_ADDR_LOW_REG 0x0014 +#define AWIN_NFC_ADDR_HIGH_REG 0x0018 +#define AWIN_NFC_SECTOR_NUM_REG 0x001C +#define AWIN_NFC_CNT_REG 0x0020 +#define AWIN_NFC_CMD_REG 0x0024 +#define AWIN_NFC_READ_CMD_SET_REG 0x0028 +#define AWIN_NFC_WRITE_CMD_SET_REG 0x002C +#define AWIN_NFC_IO_DATA_REG 0x0030 +#define AWIN_NFC_ECC_CTL_REG 0x0034 +#define AWIN_NFC_ECC_ST_REG 0x0038 +#define AWIN_NFC_DEBUG_REG 0x003C +#define AWIN_NFC_ECC_CNT0_REG 0x0040 +#define AWIN_NFC_ECC_CNT1_REG 0x0044 +#define AWIN_NFC_ECC_CNT2_REG 0x0048 +#define AWIN_NFC_ECC_CNT3_REG 0x004C +#define AWIN_NFC_USER_DB_REG 0x0050 +#define AWIN_NFC_RAM0_REG 0x0400 +#define AWIN_NFC_RAM1_REG 0x0800 + +#define AWIN_NFC_CTL_DEBUG __BIT(31) +#define AWIN_NFC_CTL_CE_SEL __BITS(26,24) +#define AWIN_NFC_CTL_RAM_METHOD __BIT(14) +#define AWIN_NFC_CTL_SAM __BIT(12) +#define AWIN_NFC_CTL_PAGE_SIZE __BITS(11,8) +#define AWIN_NFC_CTL_PAGE_SIZE_1K 0 +#define AWIN_NFC_CTL_PAGE_SIZE_2K 1 +#define AWIN_NFC_CTL_PAGE_SIZE_4K 2 +#define AWIN_NFC_CTL_PAGE_SIZE_8K 3 +#define AWIN_NFC_CTL_PAGE_SIZE_16K 4 +#define AWIN_NFC_CTL_CE_CTL1 __BIT(7) +#define AWIN_NFC_CTL_CE_CTL0 __BIT(6) +#define AWIN_NFC_CTL_RB_SEL1 __BIT(3) +#define AWIN_NFC_CTL_BUS_WIDTH16 __BIT(2) +#define AWIN_NFC_CTL_RESET __BIT(1) +#define AWIN_NFC_CTL_EN __BIT(0) + +#define AWIN_NFC_ST_STATE3 __BIT(11) +#define AWIN_NFC_ST_STATE2 __BIT(10) +#define AWIN_NFC_ST_STATE1 __BIT(9) +#define AWIN_NFC_ST_STATE0 __BIT(8) +#define AWIN_NFC_ST_MATCH_INT __BIT(5) +#define AWIN_NFC_ST_STAT __BIT(4) +#define AWIN_MFC_ST_CMD_FIFO __BIT(3) +#define AWIN_MFC_ST_DMA_INT __BIT(2) +#define AWIN_MFC_ST_CMD_INT __BIT(1) +#define AWIN_MFC_ST_RB_B2R __BIT(0) + +#define AWIN_NFC_INT_DMA_EN __BIT(2) +#define AWIN_NFC_INT_CMD_EN __BIT(1) +#define AWIN_NFC_INT_B2R_EN __BIT(0) + +#define AWIN_NFC_CMD_CMD_TYPE __BITS(31,30) +#define AWIN_NFC_CMD_SEND_CMD3 __BIT(29) +#define AWIN_NFC_CMD_SEND_CMD2 __BIT(28) +#define AWIN_NFC_CMD_ROW_AUTO_INC __BIT(27) +#define AWIN_NFC_CMD_DATA_SWAP __BIT(26) +#define AWIN_NFC_CMD_SEQ __BIT(25) +#define AWIN_NFC_CMD_SEND_CMD1 __BIT(24) +#define AWIN_NFC_CMD_WAIT_FLAG __BIT(23) +#define AWIN_NFC_CMD_SEND_CMD0 __BIT(22) +#define AWIN_NFC_CMD_DATA_TRANS __BIT(21) +#define AWIN_NFC_CMD_XS_DIR __BIT(20) +#define AWIN_NFC_CMD_SEND_ADDR __BIT(19) +#define AWIN_NFC_CMD_ADDR_NUM __BITS(18,16) +#define AWIN_NFC_CMD_HIGH __BITS(15,8) +#define AWIN_NFC_CMD_LOW __BITS(7,0) + +#define AWIN_NFC_READ_CMD_SET_RAMDOM_CMD1 __BITS(23,16) +#define AWIN_NFC_READ_CMD_SET_RANDOM_CMD0 __BITS(15,8) +#define AWIN_NFC_READ_CMD_SET_CMD __BITS(7,0) + +#define AWIN_NFC_WRITE_CMD_SET_RANDOM_CMD0 __BITS(15,8) +#define AWIN_NFC_WRITE_CMD_SET_CMD __BITS(7,0) + +#define AWIN_ECC_CTL_EN __BIT(0) + #define AWIN_EMAC_CTL_REG 0x0000 #define AWIN_EMAC_TX_MODE_REG 0x0004 #define AWIN_EMAC_TX_FLOW_REG 0x0008 @@ -416,7 +497,7 @@ #define AWIN_AHB_GATING0_SS __BIT(5) #define AWIN_AHB_GATING0_USB_OHCI1 __BIT(4) #define AWIN_AHB_GATING0_USB_EHCI1 __BIT(3) -#define AWIN_AHB_GATING0_USB_OHCI0 __BIT(1) +#define AWIN_AHB_GATING0_USB_OHCI0 __BIT(2) #define AWIN_AHB_GATING0_USB_EHCI0 __BIT(1) #define AWIN_AHB_GATING0_USB0 __BIT(0) @@ -532,7 +613,7 @@ #define AWIN_EHCI_SIZE 0x0400 #define AWIN_OHCI_OFFSET 0x0400 #define AWIN_OHCI_SIZE 0x0400 -#define AWIN_USB_PMU_IRQ_REG 0x0800 +#define AWIN_USB_PMU_IRQ_REG 0x0800 #define AWIN_USB0_PHY_CSR_ADDR __BITS(15,8) #define AWIN_USB0_PHY_CSR_DAT __BIT(7) @@ -540,10 +621,10 @@ #define AWIN_USB0_PHY_CSR_CLK1 __BIT(1) #define AWIN_USB0_PHY_CSR_CLK0 __BIT(0) -#define AWIN_USB_PMU_IRQ_AHB_INCR8 __BIT(10) -#define AWIN_USB_PMU_IRQ_AHB_INCR4 __BIT(9) -#define AWIN_USB_PMU_IRQ_AHB_INCRX __BIT(8) -#define AWIN_USB_PMU_IRQ_ULPI_BYPASS __BIT(0) +#define AWIN_USB_PMU_IRQ_AHB_INCR8 __BIT(10) +#define AWIN_USB_PMU_IRQ_AHB_INCR4 __BIT(9) +#define AWIN_USB_PMU_IRQ_AHB_INCRX __BIT(8) +#define AWIN_USB_PMU_IRQ_ULPI_BYPASS __BIT(0) /* PATA Definitions */ #define AWIN_PATA_CTL_REG 0x0100 /* XXX Bogus */