* Remove ineffective and incorrect cache flush in viking_mmuenable().
* A bunch of cosmetic changes.
This commit is contained in:
pk
parent
09b3ed084e
commit
d3028dd4a2
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.c,v 1.39 1997/04/14 21:05:13 pk Exp $ */
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/* $NetBSD: cpu.c,v 1.40 1997/04/18 19:51:05 pk Exp $ */
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/*
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* Copyright (c) 1996
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@ -257,45 +257,41 @@ void
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cache_print(sc)
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struct cpu_softc *sc;
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{
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struct cacheinfo *ci = &sc->cacheinfo;
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char *sep;
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printf("%s:", sc->dv.dv_xname);
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sep = " ";
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if (sc->cacheinfo.c_split) {
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printf("%s:%s", sc->dv.dv_xname,
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(sc->cacheinfo.c_physical ? " physical" : ""));
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if (sc->cacheinfo.ic_totalsize > 0) {
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if (ci->c_split) {
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printf("%s", (ci->c_physical ? " physical" : ""));
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if (ci->ic_totalsize > 0) {
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printf("%s%dK instruction (%d b/l)", sep,
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sc->cacheinfo.ic_totalsize/1024,
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sc->cacheinfo.ic_linesize);
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ci->ic_totalsize/1024, ci->ic_linesize);
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sep = ", ";
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}
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if (sc->cacheinfo.dc_totalsize > 0) {
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if (ci->dc_totalsize > 0) {
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printf("%s%dK data (%d b/l)", sep,
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sc->cacheinfo.dc_totalsize/1024,
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sc->cacheinfo.dc_linesize);
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ci->dc_totalsize/1024, ci->dc_linesize);
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sep = ", ";
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}
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printf(" ");
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} else if (sc->cacheinfo.c_physical) {
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} else if (ci->c_physical) {
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/* combined, physical */
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printf("%s: physical %dK combined cache (%d bytes/line) ",
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sc->dv.dv_xname,
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sc->cacheinfo.c_totalsize/1024,
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sc->cacheinfo.c_linesize);
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printf(" physical %dK combined cache (%d bytes/line) ",
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ci->c_totalsize/1024, ci->c_linesize);
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} else {
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/* combined, virtual */
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printf("%s: %d byte write-%s, %d bytes/line, %cw flush ",
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sc->dv.dv_xname, sc->cacheinfo.c_totalsize,
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(sc->cacheinfo.c_vactype == VAC_WRITETHROUGH)
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? "through" : "back",
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sc->cacheinfo.c_linesize,
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sc->cacheinfo.c_hwflush ? 'h' : 's');
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printf(" %d byte write-%s, %d bytes/line, %cw flush ",
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ci->c_totalsize,
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(ci->c_vactype == VAC_WRITETHROUGH) ? "through" : "back",
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ci->c_linesize,
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ci->c_hwflush ? 'h' : 's');
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}
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if (sc->cacheinfo.ec_totalsize > 0) {
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if (ci->ec_totalsize > 0) {
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printf(", %dK external (%d b/l)",
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sc->cacheinfo.ec_totalsize/1024,
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sc->cacheinfo.ec_linesize);
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ci->ec_totalsize/1024, ci->ec_linesize);
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}
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}
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@ -372,15 +368,17 @@ getcacheinfo_sun4(sc, node)
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struct cpu_softc *sc;
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int node;
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{
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struct cacheinfo *ci = &sc->cacheinfo;
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switch (sc->cpu_type) {
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case CPUTYP_4_100:
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sc->cacheinfo.c_vactype = VAC_NONE;
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sc->cacheinfo.c_totalsize = 0;
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sc->cacheinfo.c_hwflush = 0;
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sc->cacheinfo.c_linesize = 0;
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sc->cacheinfo.c_l2linesize = 0;
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sc->cacheinfo.c_split = 0;
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sc->cacheinfo.c_nlines = 0;
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ci->c_vactype = VAC_NONE;
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ci->c_totalsize = 0;
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ci->c_hwflush = 0;
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ci->c_linesize = 0;
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ci->c_l2linesize = 0;
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ci->c_split = 0;
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ci->c_nlines = 0;
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/* Override cache flush functions */
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sc->cache_flush = noop_cache_flush;
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@ -390,35 +388,32 @@ getcacheinfo_sun4(sc, node)
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sc->vcache_flush_context = noop_vcache_flush_context;
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break;
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case CPUTYP_4_200:
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sc->cacheinfo.c_vactype = VAC_WRITEBACK;
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sc->cacheinfo.c_totalsize = 128*1024;
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sc->cacheinfo.c_hwflush = 0;
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sc->cacheinfo.c_linesize = 16;
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sc->cacheinfo.c_l2linesize = 4;
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sc->cacheinfo.c_split = 0;
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sc->cacheinfo.c_nlines =
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sc->cacheinfo.c_totalsize << sc->cacheinfo.c_l2linesize;
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ci->c_vactype = VAC_WRITEBACK;
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ci->c_totalsize = 128*1024;
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ci->c_hwflush = 0;
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ci->c_linesize = 16;
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ci->c_l2linesize = 4;
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ci->c_split = 0;
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ci->c_nlines = ci->c_totalsize << ci->c_l2linesize;
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break;
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case CPUTYP_4_300:
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sc->cacheinfo.c_vactype = VAC_WRITEBACK;
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sc->cacheinfo.c_totalsize = 128*1024;
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sc->cacheinfo.c_hwflush = 0;
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sc->cacheinfo.c_linesize = 16;
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sc->cacheinfo.c_l2linesize = 4;
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sc->cacheinfo.c_split = 0;
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sc->cacheinfo.c_nlines =
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sc->cacheinfo.c_totalsize << sc->cacheinfo.c_l2linesize;
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ci->c_vactype = VAC_WRITEBACK;
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ci->c_totalsize = 128*1024;
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ci->c_hwflush = 0;
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ci->c_linesize = 16;
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ci->c_l2linesize = 4;
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ci->c_split = 0;
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ci->c_nlines = ci->c_totalsize << ci->c_l2linesize;
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sc->flags |= CPUFLG_SUN4CACHEBUG;
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break;
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case CPUTYP_4_400:
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sc->cacheinfo.c_vactype = VAC_WRITEBACK;
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sc->cacheinfo.c_totalsize = 128 * 1024;
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sc->cacheinfo.c_hwflush = 0;
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sc->cacheinfo.c_linesize = 32;
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sc->cacheinfo.c_l2linesize = 5;
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sc->cacheinfo.c_split = 0;
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sc->cacheinfo.c_nlines =
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sc->cacheinfo.c_totalsize << sc->cacheinfo.c_l2linesize;
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ci->c_vactype = VAC_WRITEBACK;
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ci->c_totalsize = 128 * 1024;
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ci->c_hwflush = 0;
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ci->c_linesize = 32;
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ci->c_l2linesize = 5;
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ci->c_split = 0;
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ci->c_nlines = ci->c_totalsize << ci->c_l2linesize;
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break;
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}
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}
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@ -510,6 +505,7 @@ getcacheinfo_sun4c(sc, node)
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struct cpu_softc *sc;
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int node;
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{
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struct cacheinfo *ci = &sc->cacheinfo;
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int i, l;
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if (node == 0)
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@ -517,26 +513,26 @@ getcacheinfo_sun4c(sc, node)
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return;
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/* Sun4c's have only virtually-addressed caches */
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sc->cacheinfo.c_physical = 0;
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sc->cacheinfo.c_totalsize = getpropint(node, "vac-size", 65536);
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ci->c_physical = 0;
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ci->c_totalsize = getpropint(node, "vac-size", 65536);
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/*
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* Note: vac-hwflush is spelled with an underscore
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* on the 4/75s.
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*/
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sc->cacheinfo.c_hwflush =
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ci->c_hwflush =
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getpropint(node, "vac_hwflush", 0) |
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getpropint(node, "vac-hwflush", 0);
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sc->cacheinfo.c_linesize = l = getpropint(node, "vac-linesize", 16);
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ci->c_linesize = l = getpropint(node, "vac-linesize", 16);
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for (i = 0; (1 << i) < l; i++)
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/* void */;
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if ((1 << i) != l)
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panic("bad cache line size %d", l);
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sc->cacheinfo.c_l2linesize = i;
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sc->cacheinfo.c_associativity = 1;
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sc->cacheinfo.c_nlines = sc->cacheinfo.c_totalsize << i;
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ci->c_l2linesize = i;
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ci->c_associativity = 1;
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ci->c_nlines = ci->c_totalsize << i;
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sc->cacheinfo.c_vactype = VAC_WRITETHROUGH;
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ci->c_vactype = VAC_WRITETHROUGH;
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/*
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* Machines with "buserr-type" 1 have a bug in the cache
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@ -562,9 +558,10 @@ sun4_hotfix(sc)
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#if defined(SUN4M)
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void
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getcacheinfo_obp(sc, node)
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struct cpu_softc *sc;
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struct cpu_softc *sc;
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int node;
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{
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struct cacheinfo *ci = &sc->cacheinfo;
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int i, l;
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if (node == 0)
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@ -574,94 +571,79 @@ getcacheinfo_obp(sc, node)
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/*
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* Determine the Sun4m cache organization
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*/
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sc->cacheinfo.c_physical = node_has_property(node, "cache-physical?");
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if (sc->cacheinfo.c_physical == 0 &&
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sc->cacheinfo.c_vactype == VAC_NONE)
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sc->cacheinfo.c_vactype = VAC_WRITETHROUGH; /*???*/
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ci->c_physical = node_has_property(node, "cache-physical?");
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if (ci->c_physical == 0 &&
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ci->c_vactype == VAC_NONE)
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ci->c_vactype = VAC_WRITETHROUGH; /*???*/
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if (getpropint(node, "ncaches", 1) == 2)
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sc->cacheinfo.c_split = 1;
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ci->c_split = 1;
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else
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sc->cacheinfo.c_split = 0;
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ci->c_split = 0;
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/* hwflush is used only by sun4/4c code */
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sc->cacheinfo.c_hwflush = 0;
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ci->c_hwflush = 0;
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if (node_has_property(node, "icache-nlines") &&
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node_has_property(node, "dcache-nlines") &&
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sc->cacheinfo.c_split) {
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ci->c_split) {
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/* Harvard architecture: get I and D cache sizes */
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sc->cacheinfo.ic_nlines = getpropint(node, "icache-nlines", 0);
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sc->cacheinfo.ic_linesize = l =
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ci->ic_nlines = getpropint(node, "icache-nlines", 0);
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ci->ic_linesize = l =
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getpropint(node, "icache-line-size", 0);
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for (i = 0; (1 << i) < l && l; i++)
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/* void */;
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if ((1 << i) != l && l)
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panic("bad icache line size %d", l);
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sc->cacheinfo.ic_l2linesize = i;
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sc->cacheinfo.ic_associativity =
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ci->ic_l2linesize = i;
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ci->ic_associativity =
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getpropint(node, "icache-associativity", 1);
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sc->cacheinfo.ic_totalsize = l *
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sc->cacheinfo.ic_nlines *
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sc->cacheinfo.ic_associativity;
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ci->ic_totalsize = l * ci->ic_nlines * ci->ic_associativity;
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sc->cacheinfo.dc_nlines = getpropint(node, "dcache-nlines", 0);
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sc->cacheinfo.dc_linesize = l =
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ci->dc_nlines = getpropint(node, "dcache-nlines", 0);
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ci->dc_linesize = l =
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getpropint(node, "dcache-line-size",0);
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for (i = 0; (1 << i) < l && l; i++)
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/* void */;
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if ((1 << i) != l && l)
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panic("bad dcache line size %d", l);
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sc->cacheinfo.dc_l2linesize = i;
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sc->cacheinfo.dc_associativity =
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ci->dc_l2linesize = i;
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ci->dc_associativity =
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getpropint(node, "dcache-associativity", 1);
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sc->cacheinfo.dc_totalsize = l *
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sc->cacheinfo.dc_nlines *
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sc->cacheinfo.dc_associativity;
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ci->dc_totalsize = l * ci->dc_nlines * ci->dc_associativity;
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sc->cacheinfo.c_l2linesize =
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min(sc->cacheinfo.ic_l2linesize,
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sc->cacheinfo.dc_l2linesize);
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sc->cacheinfo.c_linesize =
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min(sc->cacheinfo.ic_linesize,
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sc->cacheinfo.dc_linesize);
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sc->cacheinfo.c_totalsize =
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sc->cacheinfo.ic_totalsize +
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sc->cacheinfo.dc_totalsize;
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ci->c_l2linesize = min(ci->ic_l2linesize, ci->dc_l2linesize);
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ci->c_linesize = min(ci->ic_linesize, ci->dc_linesize);
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ci->c_totalsize = ci->ic_totalsize + ci->dc_totalsize;
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} else {
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/* unified I/D cache */
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sc->cacheinfo.c_nlines = getpropint(node, "cache-nlines", 128);
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sc->cacheinfo.c_linesize = l =
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ci->c_nlines = getpropint(node, "cache-nlines", 128);
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ci->c_linesize = l =
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getpropint(node, "cache-line-size", 0);
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for (i = 0; (1 << i) < l && l; i++)
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/* void */;
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if ((1 << i) != l && l)
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panic("bad cache line size %d", l);
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sc->cacheinfo.c_l2linesize = i;
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sc->cacheinfo.c_totalsize = l *
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sc->cacheinfo.c_nlines *
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ci->c_l2linesize = i;
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ci->c_totalsize = l *
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ci->c_nlines *
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getpropint(node, "cache-associativity", 1);
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}
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if (node_has_property(node, "ecache-nlines")) {
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/* we have a L2 "e"xternal cache */
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sc->cacheinfo.ec_nlines =
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getpropint(node, "ecache-nlines", 32768);
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sc->cacheinfo.ec_linesize = l =
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getpropint(node, "ecache-line-size", 0);
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ci->ec_nlines = getpropint(node, "ecache-nlines", 32768);
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ci->ec_linesize = l = getpropint(node, "ecache-line-size", 0);
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for (i = 0; (1 << i) < l && l; i++)
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/* void */;
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if ((1 << i) != l && l)
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panic("bad ecache line size %d", l);
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sc->cacheinfo.ec_l2linesize = i;
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sc->cacheinfo.ec_associativity =
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ci->ec_l2linesize = i;
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ci->ec_associativity =
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getpropint(node, "ecache-associativity", 1);
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sc->cacheinfo.ec_totalsize = l *
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sc->cacheinfo.ec_nlines *
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sc->cacheinfo.ec_associativity;
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ci->ec_totalsize = l * ci->ec_nlines * ci->ec_associativity;
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}
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if (sc->cacheinfo.c_totalsize == 0)
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if (ci->c_totalsize == 0)
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printf("warning: couldn't identify cache\n");
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}
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@ -823,14 +805,8 @@ viking_mmu_enable()
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{
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int pcr;
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/*
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* Before enabling the MMU, flush the data cache so the
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* in-memory MMU page tables are up-to-date.
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*/
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sta(0x80000000, ASI_DCACHECLR, 0); /* Unlock */
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sta(0, ASI_DCACHECLR, 0);
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pcr = lda(SRMMU_PCR, ASI_SRMMU);
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if (cpuinfo.mxcc)
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pcr |= VIKING_PCR_TC;
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else
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@ -1064,7 +1040,7 @@ getcpuinfo(sc, node)
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* Try to find it in the OpenPROM root...
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*/
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sc->hz = getpropint(findroot(),
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"clock-frequency", 0);
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"clock-frequency", 0);
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}
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}
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