Make sure to disable interrupts, as U-Boot may call us with interrupts
enabled, causing quite unpleasant effects (e.g. by decrementer interrupts). When DEBUG is defined, an exception handler will be installed, which reports about all exceptions while altboot is running, including register dump and stack frame backtrace.
This commit is contained in:
phx
parent
1309a94f0a
commit
d250ff0e1c
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@ -1,4 +1,4 @@
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# $NetBSD: Makefile,v 1.11 2011/05/25 19:26:21 phx Exp $
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# $NetBSD: Makefile,v 1.12 2011/10/30 20:42:09 phx Exp $
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S= ${.CURDIR}/../../../..
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@ -8,7 +8,7 @@ NOMAN= # defined
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SRCS= entry.S main.c brdsetup.c pci.c devopen.c dev_net.c memfs.c
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SRCS+= nif.c fxp.c tlp.c rge.c skg.c stg.c
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SRCS+= dsk.c pciide.c siisata.c
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SRCS+= vers.c
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SRCS+= exception.c vers.c
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CLEANFILES+= vers.c ${PROG} ${PROG}.bin ${PROG}.img
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CFLAGS+= -Wall -Wno-main -ffreestanding -msoft-float -mmultiple
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CFLAGS+= -Wmissing-prototypes -Wstrict-prototypes -Wpointer-arith
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@ -1,4 +1,4 @@
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/* $NetBSD: entry.S,v 1.3 2011/03/13 15:23:43 phx Exp $ */
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/* $NetBSD: entry.S,v 1.4 2011/10/30 20:42:09 phx Exp $ */
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#include <powerpc/psl.h>
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#include <powerpc/spr.h>
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@ -20,13 +20,20 @@ _start:
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mr 28,6
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mr 29,7
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/* Disable interrupts and everything except the MMU. */
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mfmsr 3
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andi. 3,3,PSL_DR|PSL_IR
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mtmsr 3
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isync
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/*
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* U-Boot/PPCBoot forgets to flush the cache when using the "bootm"
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* command, so we have to do that now.
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*/
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lis 11,_start@ha
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addi 11,11,_start@l
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andi. 11,11,~31@l
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li 10,-32
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and 11,11,10
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lis 12,(_edata+31)@ha
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addi 12,12,(_edata+31)@l
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bl syncicache
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@ -41,8 +48,8 @@ _start:
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mfmsr 0
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andi. 0,0,PSL_DR
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beq 2f
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lis 5, 0xfec00000@ha /* CONFIG_ADDR of PCI */
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lis 6, 0xfee00000@ha /* CONFIG_DATA of PCI */
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lis 5,0xfec00000@ha /* CONFIG_ADDR of PCI */
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lis 6,0xfee00000@ha /* CONFIG_DATA of PCI */
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mfspr 3,SPR_DBAT0U
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mfspr 4,SPR_DBAT0L
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bl dbat_sanity_check
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@ -104,13 +111,18 @@ _start:
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b 5b
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6:
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/* prepare stack at +1MB from _start. */
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lis 1,_start@h
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ori 1,1,_start@l
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addis 1,1,0x10
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addi 1,1,-4
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/* prepare stack at +1MB from _start, 16-byte aligned */
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lis 1,_start@ha
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addi 1,1,_start@l
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addis 1,1,0x100000@ha
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li 10,-16
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and 1,1,10
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stw 0,0(1)
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bl brdsetup
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#ifdef DEBUG
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bl init_vectors
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#endif
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mr 3,30
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mr 4,31
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mr 5,28
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@ -152,7 +164,7 @@ dbat_sanity_check:
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*/
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.globl run
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run:
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mtctr 7 /* hat trick jump to entry point */
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mtctr 7 /* hat trick jump to entry point */
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bctr
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/*
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@ -198,38 +210,115 @@ newaltboot_end:
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/*
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* reverse endian access to mimic outw/outl/inw/inl
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*/
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.globl out16rb
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.globl iohtole16
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.globl out16rb
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.globl iohtole16
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out16rb:
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iohtole16:
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sthbrx 4,0,3
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eieio
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blr
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.globl out32rb
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.globl iohtole32
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.globl out32rb
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.globl iohtole32
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out32rb:
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iohtole32:
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stwbrx 4,0,3
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eieio
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blr
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.global in16rb
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.global iole16toh
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.globl in16rb
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.globl iole16toh
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in16rb:
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iole16toh:
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lhbrx 3,0,3
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eieio
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blr
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.global in32rb
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.global iole32toh
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.globl in32rb
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.globl iole32toh
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in32rb:
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iole32toh:
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lwbrx 3,0,3
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eieio
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blr
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#ifdef DEBUG
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/*
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* Call an exception handler, which prints out all information
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* about the type of exception, cpu registers, stack frame
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* backtrace, etc.
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* Use a new stack at 0x2000 and make room for 32 GPRs, and 15
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* special registers. The layout will be:
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* 0x00: link area
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* 0x10: R0
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* ...
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* 0x8c: R31
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* 0x90: CR, XER, LR, CTR
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* 0xa0: SRR0, SRR1, DAR, DSISR
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* 0xb0: DMISS, DCMP, HASH1, HASH2
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* 0xc0: IMISS, ICMP, RPA
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*
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*/
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.globl trap
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trap:
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mtsprg1 1
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mfmsr 1
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andis. 1,1,PSL_TGPR@h
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beq 1f
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andi. 1,1,0xffff /* make sure TGPR is disabled */
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mtmsr 1
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isync
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mtsprg1 1 /* and save the real r1 again */
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1: li 1,0x2000-16-(32*4+15*4)
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stmw 2,24(1) /* save r2..r31 */
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stw 0,16(1) /* save r0 */
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mfsprg1 3
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stw 3,20(1) /* and finally r1 */
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mfcr 3
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stw 3,0x90(1)
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mfxer 3
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stw 3,0x94(1)
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mflr 3
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stw 3,0x98(1)
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mfctr 3
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stw 3,0x9c(1)
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mfsrr0 3
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stw 3,0xa0(1)
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mfsrr1 3
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stw 3,0xa4(1)
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mfdar 3
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stw 3,0xa8(1)
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mfdsisr 3
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stw 3,0xac(1)
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mfspr 3,976
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stw 3,0xb0(1)
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mfspr 3,977
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stw 3,0xb4(1)
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mfspr 3,978
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stw 3,0xb8(1)
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mfspr 3,979
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stw 3,0xbc(1)
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mfspr 3,980
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stw 3,0xc0(1)
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mfspr 3,981
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stw 3,0xc4(1)
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mfspr 3,982
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stw 3,0xc8(1)
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bl call_handler
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call_handler:
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lis 11,exception_handler@ha
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addi 11,11,exception_handler@l
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mtsrr0 11
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li 0,PSL_DR|PSL_IR
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mtsrr1 0
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mflr 3
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subi 3,3,call_handler-trap
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addi 4,1,16
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rfi
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.globl trap_end
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trap_end:
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#endif
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.data
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#define xBATL(pa, wimg, pp) \
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((pa) | (wimg) | (pp))
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@ -0,0 +1,116 @@
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/* $NetBSD: exception.c,v 1.1 2011/10/30 20:42:09 phx Exp $ */
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/*-
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* Copyright (c) 2011 Frank Wille.
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* All rights reserved.
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*
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* Written by Frank Wille for The NetBSD Project.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <lib/libsa/stand.h>
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#include <lib/libsa/loadfile.h>
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#include <lib/libkern/libkern.h>
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#include "globals.h"
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#ifdef DEBUG
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struct cpu_state {
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uint32_t gpr[32];
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uint32_t cr, xer, lr, ctr;
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uint32_t srr0, srr1, dar, dsisr;
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uint32_t dmiss, dcmp, hash1, hash2;
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uint32_t imiss, icmp, rpa;
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};
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void init_vectors(void); /* called from early startup */
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void exception_handler(unsigned, struct cpu_state *);
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void
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init_vectors(void)
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{
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extern uint8_t trap[], trap_end[];
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uint8_t *exc;
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uint32_t *ip;
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/* install exception handlers */
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for (exc = (uint8_t *)0x100; exc <= (uint8_t *)0x1400; exc += 0x100)
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memcpy(exc, trap, trap_end - trap);
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/* handle NULL-ptr calls from 0x0 to 0xfc */
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for (ip = 0; ip < (uint32_t *)0x100; ip++)
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*ip = 0x48000002 | (uint32_t)trap;
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__syncicache(0, 0x1400);
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}
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void
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exception_handler(unsigned vector, struct cpu_state *st)
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{
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static bool in_exception = false;
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uint32_t *fp;
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int i;
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if (vector > 0x1400)
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printf("\nCALL TO NULL POINTER FROM %08x\n", st->lr - 4);
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else
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printf("\nEXCEPTION VECTOR %04x\n", vector);
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if (in_exception) {
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printf("caused in exception handler! Restarting...\n");
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_rtt();
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}
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in_exception = true;
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/* register dump */
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printf("\n SRR0=%08x SRR1=%08x DAR=%08x DSISR=%08x\n"
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" CR=%08x XER=%08x LR=%08x CTR=%08x\n"
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"DMISS=%08x DCMP=%08x HASH1=%08x HASH2=%08x\n"
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"IMISS=%08x ICMP=%08x RPA=%08x\n\n",
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st->srr0, st->srr1, st->dar, st->dsisr,
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st->cr, st->xer, st->lr, st->ctr,
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st->dmiss,st->dcmp,st->hash1,st->hash2,
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st->imiss,st->icmp,st->rpa);
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for (i = 0; i < 32; i++) {
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if ((i & 7) == 0)
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printf("GPR%02d:", i);
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printf("%c%08x", (i & 7) == 4 ? ':' : ' ', st->gpr[i]);
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if ((i & 7) == 7)
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printf("\n");
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}
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/* V.4-ABI stack frame back trace */
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printf("\nBacktrace:\n");
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i = 0;
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fp = (uint32_t *)st->gpr[1];
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while ((fp = *(uint32_t **)fp) != NULL && i++ < 10)
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printf("%p: called from %08x\n", fp, *(fp + 1) - 4);
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printf("\nHit any key to reboot.\n");
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(void)getchar();
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_rtt();
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}
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#endif /* DEBUG */
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