don't attempt to size Host Bridge BARs. (it's a good way to die.)
provide a clue about 16-bit vs. 32-bit I/O BARs.
This commit is contained in:
cgd
parent
6a22a36219
commit
cfd89531b4
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@ -1,4 +1,4 @@
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/* $NetBSD: pci_subr.c,v 1.37 2000/08/03 19:58:55 nathanw Exp $ */
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/* $NetBSD: pci_subr.c,v 1.38 2000/09/02 00:48:20 cgd Exp $ */
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/*
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* Copyright (c) 1997 Zubin D. Dittia. All rights reserved.
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@ -53,15 +53,15 @@
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static void pci_conf_print_common __P((pci_chipset_tag_t, pcitag_t,
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const pcireg_t *regs));
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static int pci_conf_print_bar __P((pci_chipset_tag_t, pcitag_t,
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const pcireg_t *regs, int, const char *));
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const pcireg_t *regs, int, const char *, int));
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static void pci_conf_print_regs __P((const pcireg_t *regs, int first,
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int pastlast));
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static void pci_conf_print_type0 __P((pci_chipset_tag_t, pcitag_t,
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const pcireg_t *regs));
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const pcireg_t *regs, int sizebars));
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static void pci_conf_print_type1 __P((pci_chipset_tag_t, pcitag_t,
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const pcireg_t *regs));
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const pcireg_t *regs, int sizebars));
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static void pci_conf_print_type2 __P((pci_chipset_tag_t, pcitag_t,
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const pcireg_t *regs));
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const pcireg_t *regs, int sizebars));
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/*
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* Descriptions of known PCI classes and subclasses.
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@ -529,12 +529,13 @@ pci_conf_print_common(pc, tag, regs)
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}
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static int
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pci_conf_print_bar(pc, tag, regs, reg, name)
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pci_conf_print_bar(pc, tag, regs, reg, name, sizebar)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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const pcireg_t *regs;
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int reg;
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const char *name;
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int sizebar;
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{
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int s, width;
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pcireg_t mask, rval;
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@ -553,7 +554,8 @@ pci_conf_print_bar(pc, tag, regs, reg, name)
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* we write all 1s and see what we get back.
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*/
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rval = regs[o2i(reg)];
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if (rval != 0) {
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/* XXX don't size unknown memory type? */
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if (rval != 0 && sizebar) {
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/*
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* The following sequence seems to make some devices
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* (e.g. host bus bridges, which don't normally
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@ -612,26 +614,40 @@ pci_conf_print_bar(pc, tag, regs, reg, name)
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printf("%s %sprefetchable memory\n", type, prefetch);
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switch (PCI_MAPREG_MEM_TYPE(rval)) {
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case PCI_MAPREG_MEM_TYPE_64BIT:
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printf(" base: 0x%016llx, size: 0x%016llx\n",
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printf(" base: 0x%016llx, ",
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PCI_MAPREG_MEM64_ADDR(
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((((long long) rval64h) << 32) | rval)),
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PCI_MAPREG_MEM64_SIZE(
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((((long long) mask64h) << 32) | mask)));
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((((long long) rval64h) << 32) | rval)));
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if (sizebar)
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printf("size: 0x%016llx",
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PCI_MAPREG_MEM64_SIZE(
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((((long long) mask64h) << 32) | mask)));
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else
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printf("not sized");
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printf("\n");
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break;
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case PCI_MAPREG_MEM_TYPE_32BIT:
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case PCI_MAPREG_MEM_TYPE_32BIT_1M:
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default:
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printf(" base: 0x%08x, size: 0x%08x\n",
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PCI_MAPREG_MEM_ADDR(rval),
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PCI_MAPREG_MEM_SIZE(mask));
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printf(" base: 0x%08x, ",
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PCI_MAPREG_MEM_ADDR(rval));
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if (sizebar)
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printf("size: 0x%08x",
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PCI_MAPREG_MEM_SIZE(mask));
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else
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printf("not sized");
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printf("\n");
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break;
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}
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} else {
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if (sizebar)
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printf("%d-bit ", mask & ~0x0000ffff ? 32 : 16);
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printf("i/o\n");
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printf(" base: 0x%08x, size: 0x%08x\n",
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PCI_MAPREG_IO_ADDR(rval),
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PCI_MAPREG_IO_SIZE(mask));
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printf(" base: 0x%08x, ", PCI_MAPREG_IO_ADDR(rval));
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if (sizebar)
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printf("size: 0x%08x", PCI_MAPREG_IO_SIZE(mask));
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else
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printf("not sized");
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printf("\n");
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}
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return width;
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@ -663,16 +679,17 @@ pci_conf_print_regs(regs, first, pastlast)
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}
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static void
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pci_conf_print_type0(pc, tag, regs)
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pci_conf_print_type0(pc, tag, regs, sizebars)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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const pcireg_t *regs;
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int sizebars;
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{
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int off, width;
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pcireg_t rval;
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for (off = PCI_MAPREG_START; off < PCI_MAPREG_END; off += width)
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width = pci_conf_print_bar(pc, tag, regs, off, NULL);
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width = pci_conf_print_bar(pc, tag, regs, off, NULL, sizebars);
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printf(" Cardbus CIS Pointer: 0x%08x\n", regs[o2i(0x28)]);
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@ -757,10 +774,11 @@ pci_conf_print_type0(pc, tag, regs)
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}
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static void
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pci_conf_print_type1(pc, tag, regs)
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pci_conf_print_type1(pc, tag, regs, sizebars)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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const pcireg_t *regs;
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int sizebars;
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{
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int off, width;
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pcireg_t rval;
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@ -775,7 +793,7 @@ pci_conf_print_type1(pc, tag, regs)
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*/
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for (off = 0x10; off < 0x18; off += width)
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width = pci_conf_print_bar(pc, tag, regs, off, NULL);
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width = pci_conf_print_bar(pc, tag, regs, off, NULL, sizebars);
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printf(" Primary bus number: 0x%02x\n",
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(regs[o2i(0x18)] >> 0) & 0xff);
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@ -882,10 +900,11 @@ pci_conf_print_type1(pc, tag, regs)
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}
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static void
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pci_conf_print_type2(pc, tag, regs)
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pci_conf_print_type2(pc, tag, regs, sizebars)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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const pcireg_t *regs;
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int sizebars;
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{
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pcireg_t rval;
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@ -899,7 +918,7 @@ pci_conf_print_type2(pc, tag, regs)
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*/
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pci_conf_print_bar(pc, tag, regs, 0x10,
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"CardBus socket/ExCA registers");
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"CardBus socket/ExCA registers", sizebars);
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printf(" Reserved @ 0x14: 0x%04x\n",
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(regs[o2i(0x14)] >> 0) & 0xffff);
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@ -1000,7 +1019,8 @@ pci_conf_print_type2(pc, tag, regs)
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printf(" Subsystem vendor ID: 0x%04x\n", PCI_VENDOR(rval));
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printf(" Subsystem ID: 0x%04x\n", PCI_PRODUCT(rval));
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pci_conf_print_bar(pc, tag, regs, 0x44, "legacy-mode registers");
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pci_conf_print_bar(pc, tag, regs, 0x44, "legacy-mode registers",
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sizebars);
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}
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void
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@ -1012,13 +1032,19 @@ pci_conf_print(pc, tag, printfn)
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pcireg_t regs[o2i(256)];
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int off, endoff, hdrtype;
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const char *typename;
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void (*typeprintfn)(pci_chipset_tag_t, pcitag_t, const pcireg_t *);
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void (*typeprintfn)(pci_chipset_tag_t, pcitag_t, const pcireg_t *, int);
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int sizebars;
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printf("PCI configuration registers:\n");
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for (off = 0; off < 256; off += 4)
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regs[o2i(off)] = pci_conf_read(pc, tag, off);
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sizebars = 1;
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if (PCI_CLASS(regs[o2i(PCI_CLASS_REG)]) == PCI_CLASS_BRIDGE &&
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PCI_SUBCLASS(regs[o2i(PCI_CLASS_REG)]) == PCI_SUBCLASS_BRIDGE_HOST)
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sizebars = 0;
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/* common header */
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printf(" Common header:\n");
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pci_conf_print_regs(regs, 0, 16);
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@ -1061,7 +1087,7 @@ pci_conf_print(pc, tag, printfn)
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pci_conf_print_regs(regs, 16, endoff);
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printf("\n");
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if (typeprintfn)
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(*typeprintfn)(pc, tag, regs);
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(*typeprintfn)(pc, tag, regs, sizebars);
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else
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printf(" Don't know how to pretty-print type %d header.\n",
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hdrtype);
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