The data abort handler now fixes the base register in co-processor
data transfer instructions that use writeback. i.e. LDC/STC instructions. Hardware LDF/STF instructions are now correctly handled.
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@ -1,4 +1,4 @@
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/* $NetBSD: fault.c,v 1.1 1996/01/31 23:15:51 mark Exp $ */
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/* $NetBSD: fault.c,v 1.2 1996/02/05 17:31:33 mark Exp $ */
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/*
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* Copyright (c) 1994,1995 Mark Brinicombe.
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@ -43,7 +43,7 @@
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* Created : 28/11/94
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* Last updated : 28/08/95
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*
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* $Id: fault.c,v 1.1 1996/01/31 23:15:51 mark Exp $
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* $Id: fault.c,v 1.2 1996/02/05 17:31:33 mark Exp $
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*/
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/*
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@ -330,8 +330,6 @@ data_abort_handler(frame)
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int count;
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int *registers = &frame->tf_r0;
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/* REGISTER CORRECTION IS REQUIRED FOR THESE INSTRUCTIONS */
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#ifdef DEBUG_FAULT_CORRECTION
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if (pmap_debug_level >= 0) {
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printf("LDM/STM\n");
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@ -380,24 +378,38 @@ data_abort_handler(frame)
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/* REGISTER CORRECTION IS REQUIRED FOR THESE INSTRUCTIONS */
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printf("LDC/STC\n");
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disassemble(fault_pc);
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#ifdef DEBUG_FAULT_CORRECTION
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if (pmap_debug_level >= 0) {
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printf("LDC/STC\n");
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disassemble(fault_pc);
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}
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#endif
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/* Test for write back */
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/* Only need to fix registers if write back is turned on */
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if ((fault_instruction & (1 << 21)) != 0) {
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base = (fault_instruction >> 16) & 0x0f;
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if (base == 13 && (frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) {
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disassemble(fault_pc);
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panic("Abort handler cannot fix this :-(\n");
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}
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if (base == 15) {
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disassemble(fault_pc);
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panic("Abort handler cannot fix this :-(\n");
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}
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offset = (fault_instruction & 0xff) << 2;
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printf("r%d=%08x\n", base, registers[base]);
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if (pmap_debug_level >= 0)
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printf("r%d=%08x\n", base, registers[base]);
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if ((fault_instruction & (1 << 23)) != 0)
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offset = -offset;
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registers[base] += offset;
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printf("r%d=%08x\n", base, registers[base]);
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panic("LDC/STC not fixed\n");
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if (pmap_debug_level >= 0)
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printf("r%d=%08x\n", base, registers[base]);
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}
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} else if ((fault_instruction & 0x0e000000) == 0x0c000000) {
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disassemble(fault_pc);
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panic("How did this happen ?\n");
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panic("How did this happen ...\nWe have faulted on a non data transfer instruction");
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}
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/*
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